The value assigned from vcn_v4_0_stop_dbg_mode to r is overwritten
before it can be used. Remove this assignment.
Addresses-Coverity: 1504988 ("Unused value")
Fixes: 8da1170a16e4 ("drm/amdgpu: add VCN4 ip block support")
Signed-off-by: Khalid Masum
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 2 +
On 8/13/22 15:00, ira.we...@intel.com wrote:
> From: Ira Weiny
>
> kmap() and kmap_atomic() are being deprecated in favor of
> kmap_local_page().
>
> There are two main problems with kmap(): (1) It comes with an overhead
> as mapping space is restricted and protected by a global lock for
> synch
在 2022/8/12 18:55, Christian König 写道:
Am 11.08.22 um 09:25 schrieb Zhenneng Li:
Although radeon card fence and wait for gpu to finish processing
current batch rings,
there is still a corner case that radeon lockup work queue may not be
fully flushed,
and meanwhile the radeon_suspend_kms() fu
Hi Noralf,
Thanks for your review
On Mon, Aug 08, 2022 at 02:30:42PM +0200, Noralf Trønnes wrote:
> Den 29.07.2022 18.34, skrev Maxime Ripard:
> > The subconnector property was created by drm_mode_create_tv_properties(),
> > but wasn't exposed to the userspace through the generic
> > atomic_get/s
On Thu, 11 Aug 2022 22:16:23 -0500, Samuel Holland wrote:
> Currently, the packet overhead is subtracted using unsigned arithmetic.
> With a short sync pulse, this could underflow and wrap around to near
> the maximal u16 value. Fix this by using signed subtraction. The call to
> max() will correct
A remove callback that just returns 0 is equivalent to no callback at all
as can be seen in i2c_device_remove(). So simplify accordingly.
Signed-off-by: Uwe Kleine-König
---
drivers/gpu/drm/i2c/sil164_drv.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i2c/sil164_drv.
Hello,
as promised there comes the series that does
- int (*remove)(struct i2c_client *client);
+ void (*remove)(struct i2c_client *client);
in struct i2c_driver. Returning an error code has no (relevant) effect,
as in the Linux device model removal cannot be stopped. So the
possibil
On Fri, 12 Aug 2022 17:57:46 -0300, Maíra Canal wrote:
> This driver includes the deprecated OF GPIO header
> yet fail to use symbols from it, so drop the include.
>
>
Applied to drm/drm-misc (drm-misc-next).
Thanks!
Maxime
Hi,
On Fri, Jul 29, 2022 at 07:16:31PM +0200, Mateusz Kwiatkowski wrote:
> I'm pretty sure that PAL-60 and SECAM-60 should be tied to the 480i mode.
> Those are non-standard "norms" that use 60 Hz sync (which is largely
> synonymous with 480i in the analog TV world) with PAL/SECAM color encoding.
Hi,
On Fri, Jul 29, 2022 at 07:55:30PM +0200, Mateusz Kwiatkowski wrote:
> Hi Maxime,
>
> I think that declaring PAL-B and SECAM-B as the only supported 576i
> norms is a bit random.
Starting with this patch, PAL-N should be supported as well, right?
> Norms B, D, G, H, I, K, K1 and L (for both
Hi Thomas,
On Tue, Aug 02, 2022 at 12:14:29PM +0200, Thomas Zimmermann wrote:
> Am 29.07.22 um 18:34 schrieb Maxime Ripard:
> > drm_connector_pick_cmdline_mode() is in charge of finding a proper
> > drm_display_mode from the definition we got in the video= command line
> > argument.
> >
> > Let's
v2 of https://patchwork.freedesktop.org/series/96017/
Jani Nikula (2):
drm/dp: add drm_dp_phy_name() for getting DP PHY name
drm/i915/dp: use drm_dp_phy_name() for logging
drivers/gpu/drm/display/drm_dp_helper.c | 32 +++
.../drm/i915/display/intel_dp_link_training.c | 83 -
Drop the local intel_dp_phy_name() function, and replace with
drm_dp_phy_name(). This lets us drop a number of local buffers.
v2: Rebase
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä # v1
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_dp_link_training.c | 83 ---
1 f
From: ChiaEn Wu
I apologize for using the wrong mail list to send the wrong emails
for the last v8 patchset...
This patch series add MediaTek MT6370 PMIC support and add a index macro
to . The MT6370 is a highly-integrated smart power management
IC, which includes a single cell Li-Ion/Li-Polymer
From: ChiaEn Wu
Add MediaTek MT6370 Charger binding documentation.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: ChiaEn Wu
---
.../power/supply/mediatek,mt6370-charger.yaml | 88 +++
1 file changed, 88 insertions(+)
create mode 100644
Documentation/devicetree/bindings/powe
From: ChiYuan Huang
Add MediaTek MT6370 TCPC binding documentation.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: ChiYuan Huang
Signed-off-by: ChiaEn Wu
---
.../bindings/usb/mediatek,mt6370-tcpc.yaml| 36 +++
1 file changed, 36 insertions(+)
create mode 100644
Documen
From: Alice Chen
Add MediaTek MT6370 flashlight binding documentation.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Alice Chen
Signed-off-by: ChiaEn Wu
---
.../leds/mediatek,mt6370-flashlight.yaml | 41 +++
1 file changed, 41 insertions(+)
create mode 100644
Documen
From: ChiYuan Huang
Add MT6370 backlight binding documentation.
Reviewed-by: Rob Herring
Signed-off-by: ChiYuan Huang
Signed-off-by: ChiaEn Wu
---
.../backlight/mediatek,mt6370-backlight.yaml | 121 ++
1 file changed, 121 insertions(+)
create mode 100644
Documentation/devi
From: ChiaEn Wu
MediaTek MT6370 is a SubPMIC consisting of a single cell battery charger
with ADC monitoring, RGB LEDs, dual channel flashlight, WLED backlight
driver, display bias voltage supply, one general purpose LDO, and the
USB Type-C & PD controller complies with the latest USB Type-C and
From: ChiaEn Wu
Add linear_range_idx macro for declaring the linear_range struct simply.
Signed-off-by: ChiaEn Wu
---
include/linux/linear_range.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/linux/linear_range.h b/include/linux/linear_range.h
index fd3d0b358f22..fb53ea1
From: ChiaEn Wu
MediaTek MT6370 is a SubPMIC consisting of a single cell battery charger
with ADC monitoring, RGB LEDs, dual channel flashlight, WLED backlight
driver, display bias voltage supply, one general purpose LDO, and the
USB Type-C & PD controller complies with the latest USB Type-C and
From: ChiYuan Huang
The MediaTek MT6370 is a highly-integrated smart power management IC,
which includes a single cell Li-Ion/Li-Polymer switching battery
charger, a USB Type-C & Power Delivery (PD) controller, dual
Flash LED current sources, a RGB LED driver, a backlight WLED driver,
a display b
From: Alice Chen
The MediaTek MT6370 is a highly-integrated smart power management IC,
which includes a single cell Li-Ion/Li-Polymer switching battery
charger, a USB Type-C & Power Delivery (PD) controller, dual Flash
LED current sources, a RGB LED driver, a backlight WLED driver,
a display bias
From: ChiaEn Wu
MediaTek MT6370 is a SubPMIC consisting of a single cell battery charger
with ADC monitoring, RGB LEDs, dual channel flashlight, WLED backlight
driver, display bias voltage supply, one general purpose LDO, and the
USB Type-C & PD controller complies with the latest USB Type-C and
On Sat, 13 Aug 2022, min tang wrote:
> There is no semicolon after '}' in line 648.
>
> Signed-off-by: min tang
> ---
> drivers/gpu/drm/i915/gt/intel_migrate.c | 2 +-
This part is fine.
> tools/power/x86/intel-speed-select/hfi-events.c | 2 +-
> tools/testing/selftests/timers/nanoslee
The double reset power-on sequence is a workaround for the hardware
flaw in some chip that SPI Clock output glitch and cause internal MPU
unable to read firmware correctly. The sequence is suggested in ps8640
application note.
Signed-off-by: Hsin-Yi Wang
---
drivers/gpu/drm/bridge/parade-ps8640.
This patch adds ast specific codes for DRM prime feature.
Add the prime function to solve the xorg conflict problem when AST
and AMD are in place at the same time, so that both can be displayed.
Signed-off-by: oushixiong
Reported-by: kernel test robot
---
drivers/gpu/drm/ast/ast_drv.c | 22 ++
Am 15.08.22 um 11:54 schrieb Dmitry Osipenko:
Higher order pages allocated using alloc_pages() aren't refcounted and they
need to be refcounted, otherwise it's impossible to map them by KVM. This
patch sets the refcount of the tail pages and fixes the KVM memory mapping
faults.
Without this chan
On Mon, Aug 15, 2022 at 05:01:25PM +0800, ChiaEn Wu wrote:
> From: ChiaEn Wu
>
> MediaTek MT6370 is a SubPMIC consisting of a single cell battery charger
> with ADC monitoring, RGB LEDs, dual channel flashlight, WLED backlight
> driver, display bias voltage supply, one general purpose LDO, and the
On 8/15/22 13:05, Christian König wrote:
> Am 15.08.22 um 11:54 schrieb Dmitry Osipenko:
>> Higher order pages allocated using alloc_pages() aren't refcounted and
>> they
>> need to be refcounted, otherwise it's impossible to map them by KVM. This
>> patch sets the refcount of the tail pages and fi
On Mon, Aug 15, 2022 at 05:01:18PM +0800, ChiaEn Wu wrote:
> From: ChiYuan Huang
>
> Add MT6370 backlight binding documentation.
>
> Reviewed-by: Rob Herring
> Signed-off-by: ChiYuan Huang
> Signed-off-by: ChiaEn Wu
Reviewed-by: Daniel Thompson
Daniel.
Am 15.08.22 um 12:09 schrieb Dmitry Osipenko:
On 8/15/22 13:05, Christian König wrote:
Am 15.08.22 um 11:54 schrieb Dmitry Osipenko:
Higher order pages allocated using alloc_pages() aren't refcounted and
they
need to be refcounted, otherwise it's impossible to map them by KVM. This
patch sets t
Am 15.08.22 um 12:11 schrieb Christian König:
Am 15.08.22 um 12:09 schrieb Dmitry Osipenko:
On 8/15/22 13:05, Christian König wrote:
Am 15.08.22 um 11:54 schrieb Dmitry Osipenko:
Higher order pages allocated using alloc_pages() aren't refcounted and
they
need to be refcounted, otherwise it's i
On 8/15/22 13:14, Christian König wrote:
> Am 15.08.22 um 12:11 schrieb Christian König:
>> Am 15.08.22 um 12:09 schrieb Dmitry Osipenko:
>>> On 8/15/22 13:05, Christian König wrote:
Am 15.08.22 um 11:54 schrieb Dmitry Osipenko:
> Higher order pages allocated using alloc_pages() aren't ref
On Mon, Aug 15, 2022 at 5:20 AM Maíra Canal wrote:
>
> Hi Mikhail
>
> Looks like this use-after-free problem was introduced on
> 90af0ca047f3049c4b46e902f432ad6ef1e2ded6. Checking this patch it seems
> like: if amdgpu_cs_vm_handling return r != 0, then it will unlock
> bo_list_mutex inside the fun
Hi,
On Mon, Aug 08, 2022 at 02:49:08PM +0200, Noralf Trønnes wrote:
> Den 29.07.2022 18.34, skrev Maxime Ripard:
> > The drm_create_tv_properties() will create the TV mode property
> > unconditionally.
> >
> > However, since we'll gradually phase it out, let's register it only if we
> > have a li
Am 15.08.22 um 12:18 schrieb Dmitry Osipenko:
On 8/15/22 13:14, Christian König wrote:
Am 15.08.22 um 12:11 schrieb Christian König:
Am 15.08.22 um 12:09 schrieb Dmitry Osipenko:
On 8/15/22 13:05, Christian König wrote:
Am 15.08.22 um 11:54 schrieb Dmitry Osipenko:
Higher order pages allocat
On 8/15/22 13:18, Dmitry Osipenko wrote:
> On 8/15/22 13:14, Christian König wrote:
>> Am 15.08.22 um 12:11 schrieb Christian König:
>>> Am 15.08.22 um 12:09 schrieb Dmitry Osipenko:
On 8/15/22 13:05, Christian König wrote:
> Am 15.08.22 um 11:54 schrieb Dmitry Osipenko:
>> Higher orde
Den 15.08.2022 09.35, skrev Maxime Ripard:
> Hi Noralf,
>
> Thanks for your review
>
> On Mon, Aug 08, 2022 at 02:30:42PM +0200, Noralf Trønnes wrote:
>> Den 29.07.2022 18.34, skrev Maxime Ripard:
>>> The subconnector property was created by drm_mode_create_tv_properties(),
>>> but wasn't expo
Den 15.08.2022 12.40, skrev Maxime Ripard:
> Hi,
>
> On Mon, Aug 08, 2022 at 02:49:08PM +0200, Noralf Trønnes wrote:
>> Den 29.07.2022 18.34, skrev Maxime Ripard:
>>> The drm_create_tv_properties() will create the TV mode property
>>> unconditionally.
>>>
>>> However, since we'll gradually phas
Am 15.08.22 um 12:47 schrieb Dmitry Osipenko:
On 8/15/22 13:18, Dmitry Osipenko wrote:
On 8/15/22 13:14, Christian König wrote:
Am 15.08.22 um 12:11 schrieb Christian König:
Am 15.08.22 um 12:09 schrieb Dmitry Osipenko:
On 8/15/22 13:05, Christian König wrote:
Am 15.08.22 um 11:54 schrieb Dm
On 08/14, Maíra Canal wrote:
> Hi Mikhail
>
> Looks like this use-after-free problem was introduced on
> 90af0ca047f3049c4b46e902f432ad6ef1e2ded6. Checking this patch it seems
> like: if amdgpu_cs_vm_handling return r != 0, then it will unlock
> bo_list_mutex inside the function amdgpu_cs_vm_handl
Am 15.08.22 um 12:55 schrieb Melissa Wen:
On 08/14, Maíra Canal wrote:
Hi Mikhail
Looks like this use-after-free problem was introduced on
90af0ca047f3049c4b46e902f432ad6ef1e2ded6. Checking this patch it seems
like: if amdgpu_cs_vm_handling return r != 0, then it will unlock
bo_list_mutex insid
Am 12.08.22 um 15:30 schrieb Arunpravin Paneer Selvam:
We are adding two new callbacks to ttm resource manager
function to handle intersection and compatibility of
placement and resources.
v2: move the amdgpu and ttm_range_manager changes to
separate patches (Christian)
v3: rename "intersec
On 8/15/22 13:51, Christian König wrote:
> Am 15.08.22 um 12:47 schrieb Dmitry Osipenko:
>> On 8/15/22 13:18, Dmitry Osipenko wrote:
>>> On 8/15/22 13:14, Christian König wrote:
Am 15.08.22 um 12:11 schrieb Christian König:
> Am 15.08.22 um 12:09 schrieb Dmitry Osipenko:
>> On 8/15/22
Am 15.08.22 um 13:19 schrieb Dmitry Osipenko:
[SNIP]
I'll try to dig out the older discussions, thank you for the quick
reply!
Are you sure it was really discussed in public previously? All I can
find is yours two answers to a similar patches where you're saying that
this it's a wrong solution
If amdgpu_cs_vm_handling returns r != 0, then it will unlock the
bo_list_mutex inside the function amdgpu_cs_vm_handling and again on
amdgpu_cs_parser_fini. This problem results in the following
use-after-free problem:
[ 220.280990] [ cut here ]
[ 220.281000] refcount_t: un
On 8/15/22 14:28, Christian König wrote:
Maybe it was discussed privately? In this case I will be happy to get
more info from you about the root of the problem so I could start to
look at how to fix it properly. It's not apparent where the problem is
to a TTM newbie like me.
>>>
Hi ChiaEn,
On 8/15/22 12:01, ChiaEn Wu wrote:
From: ChiaEn Wu
Add linear_range_idx macro for declaring the linear_range struct simply.
Signed-off-by: ChiaEn Wu
---
include/linux/linear_range.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/linux/linear_range.h b/inclu
Am 15.08.22 um 13:39 schrieb Maíra Canal:
If amdgpu_cs_vm_handling returns r != 0, then it will unlock the
bo_list_mutex inside the function amdgpu_cs_vm_handling and again on
amdgpu_cs_parser_fini. This problem results in the following
use-after-free problem:
[ 220.280990] [ cut
Am 15.08.22 um 13:50 schrieb Dmitry Osipenko:
On 8/15/22 14:28, Christian König wrote:
Maybe it was discussed privately? In this case I will be happy to get
more info from you about the root of the problem so I could start to
look at how to fix it properly. It's not apparent where the problem is
TTM owns the pages it uses for backing buffer objects with system
memory. Because of this it is absolutely illegal to mess around with
the reference count of those pages.
So make sure that nobody ever tries to grab an extra reference on
pages allocated through the page pool.
Signed-off-by: Christ
Am 15.08.22 um 09:34 schrieb 李真能:
在 2022/8/12 18:55, Christian König 写道:
Am 11.08.22 um 09:25 schrieb Zhenneng Li:
Although radeon card fence and wait for gpu to finish processing
current batch rings,
there is still a corner case that radeon lockup work queue may not
be fully flushed,
and mea
The hsync/vsync polarities were not honoured for the eDP and HDMI ports.
Add the register settings to configure the polarities as requested by the
DRM_MODE_FLAG_PHSYNC/DRM_MODE_FLAG_PVSYNC flags.
Signed-off-by: Sascha Hauer
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4
1 file change
On 8/15/22 16:06, Christian König wrote:
> Am 15.08.22 um 13:50 schrieb Dmitry Osipenko:
>> On 8/15/22 14:28, Christian König wrote:
>> Maybe it was discussed privately? In this case I will be happy to get
>> more info from you about the root of the problem so I could start to
>> look a
Am 15.08.22 um 15:45 schrieb Dmitry Osipenko:
[SNIP]
Well that comment sounds like KVM is doing the right thing, so I'm
wondering what exactly is going on here.
KVM actually doesn't hold the page reference, it takes the temporal
reference during page fault and then drops the reference once page
https://bugzilla.kernel.org/show_bug.cgi?id=216143
--- Comment #10 from Erhard F. (erhar...@mailbox.org) ---
Created attachment 301573
--> https://bugzilla.kernel.org/attachment.cgi?id=301573&action=edit
kernel dmesg (kernel 6.0-rc1, AMD Ryzen 9 5950X)
No change with v6-0-rc1.
[...]
[drm:amdgpu
https://bugzilla.kernel.org/show_bug.cgi?id=216143
--- Comment #11 from Erhard F. (erhar...@mailbox.org) ---
Created attachment 301574
--> https://bugzilla.kernel.org/attachment.cgi?id=301574&action=edit
kernel .config (kernel 6.0-rc1, AMD Ryzen 9 5950X)
--
You may reply to this email to add a
[AMD Official Use Only - General]
Sorry, which "r" value was overwritten? I didn't see the point of making this
change.
Thanks
Ruijing
-Original Message-
From: Khalid Masum
Sent: Monday, August 15, 2022 3:01 AM
To: amd-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
linux
On 08/15, Maíra Canal wrote:
> If amdgpu_cs_vm_handling returns r != 0, then it will unlock the
> bo_list_mutex inside the function amdgpu_cs_vm_handling and again on
> amdgpu_cs_parser_fini. This problem results in the following
> use-after-free problem:
>
> [ 220.280990] [ cut here ]
On 8/15/22 16:53, Christian König wrote:
> Am 15.08.22 um 15:45 schrieb Dmitry Osipenko:
>> [SNIP]
>>> Well that comment sounds like KVM is doing the right thing, so I'm
>>> wondering what exactly is going on here.
>> KVM actually doesn't hold the page reference, it takes the temporal
>> reference
On 8/15/22 20:15, Dong, Ruijing wrote:
[AMD Official Use Only - General]
Sorry, which "r" value was overwritten? I didn't see the point of making this
change.
Thanks
Ruijing
-Original Message-
From: Khalid Masum
Sent: Monday, August 15, 2022 3:01 AM
To: amd-...@lists.freedesktop.org
[AMD Official Use Only - General]
If the condition was met and it came to execute vcn_4_0_stop_dpg_mode, then it
would never have a chance to go for /*wait for vcn idle*/, isn't it?
I still didn't see obvious purpose of this change.
if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) {
| 8
drivers/gpu/drm/vc4/vc4_hvs.c| 13 ++
drivers/gpu/drm/vc4/vc4_kms.c| 17 +---
include/soc/bcm2835/raspberrypi-clocks.h | 21 +
7 files changed, 138 insertions(+), 33 deletions(-)
---
base-commit: 568035b01cfb107af8d2e4bd2fb9aea22cf5b868
chan
The RaspberryPi firmware clocks driver uses in several instances a
container_of to retrieve the struct raspberrypi_clk_data from a pointer
to struct clk_hw. Let's create a small function to avoid duplicating it
all over the place.
Signed-off-by: Maxime Ripard
diff --git a/drivers/clk/bcm/clk-ras
The RaspberryPi firmware can be configured by the end user using the
config.txt file.
Some of these options will affect the kernel capabilities, and we thus
need to be able to detect it to operate reliably.
One of such parameters is the core_clock parameter that allows users to
setup the clocks i
The RaspberryPi firmware can be configured by the end user using the
config.txt file.
Some of these options will affect the kernel capabilities, and we thus
need to be able to detect it to operate reliably.
One of such parameters is the hdmi_enable_4kp60 parameter that will
setup the clocks in a
In order to support higher HDMI frequencies, users have to set the
hdmi_enable_4kp60 parameter in their config.txt file.
We were detecting this so far by calling clk_round_rate() on the core
clock with the frequency we're supposed to run at when one of those
modes is enabled. Whether or not the pa
From: Dom Cobley
At least the 4096x2160@60Hz mode requires some overclocking that isn't
available by default, even if hdmi_enable_4kp60 is enabled.
Let's add some logic to detect whether we can satisfy the core clock
requirements for that mode, and prevent it from being used otherwise.
Signed-o
In order to support higher HDMI frequencies, users have to set the
hdmi_enable_4kp60 parameter in their config.txt file.
This will have the side-effect of raising the maximum of the core clock,
tied to the HVS, and managed by the HVS driver.
However, we are querying this in the HDMI driver by pok
Following the clock rate range improvements to the clock framework,
trying to set a disjoint range on a clock will now result in an error.
Thus, we can't set a minimum rate higher than the maximum reported by
the firmware, or clk_set_min_rate() will fail.
Thus we need to clamp the rate we are abo
On Fri, 12 Aug 2022 13:08:17 +0300, Matti Vaittinen wrote:
> Devm helpers for regulator get and enable
>
> First patch in the series is actually just a simple documentation fix
> which could be taken in as it is now.
>
> A few* drivers seem to use pattern demonstrated by pseudocode:
>
> [...]
A
On Wed, 10 Aug 2022 16:13:11 +0300, Krzysztof Kozlowski wrote:
> The spi-3wire property is device specific and should be accepted only if
> device really needs them. Drop it from common spi-peripheral-props.yaml
> schema, mention in few panel drivers which use it and include instead in
> the SPI c
On 8/15/22 21:17, Dong, Ruijing wrote:
[AMD Official Use Only - General]
If the condition was met and it came to execute vcn_4_0_stop_dpg_mode, then it
would never have a chance to go for /*wait for vcn idle*/, isn't it?
Hypothetically, some other thread might set adev->pg_flags NULL and in
On 8/15/22 17:57, Dmitry Osipenko wrote:
> On 8/15/22 16:53, Christian König wrote:
>> Am 15.08.22 um 15:45 schrieb Dmitry Osipenko:
>>> [SNIP]
Well that comment sounds like KVM is doing the right thing, so I'm
wondering what exactly is going on here.
>>> KVM actually doesn't hold the pag
On Mon, Aug 15, 2022 at 04:44:44PM +0100, Mark Brown wrote:
> On Fri, 12 Aug 2022 13:08:17 +0300, Matti Vaittinen wrote:
> > Devm helpers for regulator get and enable
> >
> > First patch in the series is actually just a simple documentation fix
> > which could be taken in as it is now.
> >
> > A
On Fri, Aug 05, 2022 at 06:35:01PM +, Michael Kelley (LINUX) wrote:
> From: Christophe JAILLET Sent: Sunday, July
> 31, 2022 1:02 PM
> >
> > hyperv_setup_vram() calls vmbus_allocate_mmio().
> > This must be undone in the error handling path of the probe, as already
> > done in the remove fun
[AMD Official Use Only - General]
Then please update commit message, this change is due to "value r is never
used, and remove unnecessary assignment", that makes sense to me.
Thanks
Ruijing
-Original Message-
From: Khalid Masum
Sent: Monday, August 15, 2022 11:54 AM
To: Dong, Ruijing ;
On Mon, Aug 15, 2022 at 09:11:18PM +0600, Khalid Masum wrote:
> On 8/15/22 20:15, Dong, Ruijing wrote:
> > [AMD Official Use Only - General]
> >
> > Sorry, which "r" value was overwritten? I didn't see the point of making
> > this change.
> >
> > Thanks
> > Ruijing
> >
> > -Original Messag
On Tue, Aug 09, 2022 at 05:03:06PM -0700, Vinay Belgaumkar wrote:
> Host Turbo operates at efficient frequency when GT is not idle unless
> the user or workload has forced it to a higher level. Replicate the same
> behavior in SLPC by allowing the algorithm to use efficient frequency.
> We had disa
On 8/15/22 07:12, Maxime Ripard wrote:
On Wed, Aug 10, 2022 at 10:33:48PM +0200, Stefan Wahren wrote:
Hi Florian,
Am 09.08.22 um 21:02 schrieb Florian Fainelli:
On 8/4/22 16:11, Florian Fainelli wrote:
On 6/13/22 07:47, Maxime Ripard wrote:
From: Dave Stevenson
The BCM2835-37 found in the
On 8/15/2022 9:51 AM, Rodrigo Vivi wrote:
On Tue, Aug 09, 2022 at 05:03:06PM -0700, Vinay Belgaumkar wrote:
Host Turbo operates at efficient frequency when GT is not idle unless
the user or workload has forced it to a higher level. Replicate the same
behavior in SLPC by allowing the algorithm
On 8/15/22 22:12, Greg KH wrote:
On Mon, Aug 15, 2022 at 09:11:18PM +0600, Khalid Masum wrote:
On 8/15/22 20:15, Dong, Ruijing wrote:
[AMD Official Use Only - General]
Sorry, which "r" value was overwritten? I didn't see the point of making this
change.
Thanks
Ruijing
-Original Message
This patch adds the initial DRM driver for Imagination Technologies PowerVR
GPUs, starting with those based on our Rogue architecture. It's worth pointing
out that this is a new driver, written from the ground up, rather than a
refactored version of our existing downstream driver (pvrsrvkm).
This
Quoting Kuogee Hsieh (2022-08-11 08:20:01)
>
> On 8/10/2022 6:00 PM, Abhinav Kumar wrote:
> >
> > Even then, you do have a valid point. DRM framework should not have
> > caused the disable path to happen without an enable.
> >
> > I went through the stack mentioned in the issue.
> >
> > Lets see th
This makes the code look cleaner and easier to read.
Signed-off-by: Beniamin Sandu
---
drivers/gpu/drm/nouveau/nouveau_hwmon.c | 85 +
1 file changed, 17 insertions(+), 68 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_hwmon.c
b/drivers/gpu/drm/nouveau/nouvea
On Sun, Aug 14, 2022 at 04:46:54PM -0700, Vinay Belgaumkar wrote:
> Host Turbo operates at efficient frequency when GT is not idle unless
> the user or workload has forced it to a higher level. Replicate the same
> behavior in SLPC by allowing the algorithm to use efficient frequency.
> We had disa
Adding DP DSC register definitions, we might need for further
DSC implementation, supporting MST and DP branch pass-through mode.
v2: - Fixed checkpatch comment warning
v3: - Removed function which is not yet used(Jani Nikula)
Signed-off-by: Stanislav Lisovskiy
---
include/drm/display/drm_dp.h
Currently we have only DSC support for DP SST.
Stanislav Lisovskiy (2):
drm: Add missing DP DSC extended capability definitions.
drm/i915: Add DSC support to MST path
drivers/gpu/drm/i915/display/intel_dp.c | 76 --
drivers/gpu/drm/i915/display/intel_dp.h | 17 +++
drivers/
Whenever we are not able to get enough timeslots
for required PBN, let's try to allocate those
using DSC, just same way as we do for SST.
v2: Removed intel_dp_mst_dsc_compute_config and refactored
intel_dp_dsc_compute_config to support timeslots as a
parameter(Ville Syrjälä)
v3: - Rebased
On Mon, 15 Aug 2022, Geert Uytterhoeven wrote:
Below is the list of build error/warning regressions/improvements in
v6.0-rc1[1] compared to v5.19[2].
Summarized:
- build errors: +26/-15
+ /kisskb/src/arch/parisc/kernel/vdso32/restart_syscall.S: Error: .cfi_endproc
without corresponding .cf
From: Thomas Zimmermann
commit 009a3a52791f31c57d755a73f6bc66fbdd8bd76c upstream.
Fix a number of compile errors by including the correct header
files. Examples are shown below.
../drivers/gpu/drm/hyperv/hyperv_drm_modeset.c: In function
'hyperv_blit_to_vram_rect':
../drivers/gpu/drm/hyper
On 8/15/22 22:00, Dong, Ruijing wrote:
[AMD Official Use Only - General]
Then please update commit message, this change is due to "value r is never used, and
remove unnecessary assignment", that makes sense to me.
Thanks
Ruijing
Greg also pointed out that the function vcn_v4_0_stop_dpg_mode s
There is no point in returning an int here. It only returns 0 which
the caller never uses. Therefore return void and remove the unnecessary
assignment.
Addresses-Coverity: 1504988 ("Unused value")
Fixes: 8da1170a16e4 ("drm/amdgpu: add VCN4 ip block support")
Suggested-by: Ruijing Dong
Suggested-
[AMD Official Use Only - General]
This patch is
Reviewed-by: Ruijing Dong
Thanks,
Ruijing
-Original Message-
From: Khalid Masum
Sent: Monday, August 15, 2022 2:34 PM
To: Dong, Ruijing ; amd-...@lists.freedesktop.org;
dri-devel@lists.freedesktop.org; linux-ker...@vger.kernel.org
Cc: D
Add documentation covering both the QAIC driver, and the device that it
drives.
Change-Id: Iee519cc0a276249c4e8684507d27ae2c33e29aeb
Signed-off-by: Jeffrey Hugo
---
Documentation/gpu/drivers.rst | 1 +
Documentation/gpu/qaic.rst| 567 ++
2 files chan
The QAIC driver can advertise the state of individual dma_bridge channels
to userspace. Userspace can use this information to manage userspace
state when a channel crashes.
Change-Id: Ifc7435c53cec6aa326bdcd9bfcb77ea7f2a63bab
Signed-off-by: Jeffrey Hugo
---
drivers/gpu/drm/qaic/qaic_sysfs.c | 1
Add the QAIC driver uapi file and core driver file that binds to the PCIe
device. The core driver file also creates the drm device and manages all
the interconnections between the different parts of the driver.
Change-Id: I28854e8a5dacda217439be2f65a4ab67d4dccd1e
Signed-off-by: Jeffrey Hugo
---
A QAIC device contains a MHI interface with a number of different channels
for controlling different aspects of the device. The MHI controller works
with the MHI bus to enable and drive that interface.
Change-Id: I77363193b1a2dece7abab287a6acef3cac1b4e1b
Signed-off-by: Jeffrey Hugo
---
drivers/
Add the infrastructure that allows the QAIC driver to be built.
Change-Id: I5b609b2e91b6a99939bdac35849813263ad874af
Signed-off-by: Jeffrey Hugo
---
drivers/gpu/drm/Kconfig | 2 ++
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/qaic/Kconfig | 33 +
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