Hello Jiri,
Thanks for looking into this patch!
On 8/4/22 07:47, Jiri Slaby wrote:
> On 30. 07. 22, 20:49, Helge Deller wrote:
>> The line and column numbers for the selection need to start at 1.
>> Add the checks to prevent invalid input.
>>
>> Signed-off-by: Helge Deller
>> Reported-by: syzbot
On Tue, 2 Aug 2022 15:30:44 -0700
Niranjana Vishwanathapura wrote:
> On Fri, Jul 29, 2022 at 09:03:55AM +0200, Mauro Carvalho Chehab wrote:
> >Add a description for the TLB cache invalidation algorithm and for
> >the related kAPI functions.
> >
> >Signed-off-by: Mauro Carvalho Chehab
> >---
> >
Hi All,
The latest mainline kernel branch fails to build for alpha and mips
allmodconfig with the error:
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c: In function 'psp_v13_0_memory_training':
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c:534:23: error: implicit declaration of
function 'vmalloc'; did you mean
From: Chris Wilson
Prepare for supporting more TLB invalidation scenarios by moving
the current MMIO invalidation to its own file.
It also:
- Renames intel_gt_invalidate_tlb() to intel_gt_invalidate_tlb_full()
- Add intel_gt_init_tlb() and intel_gt_fini_tlb() abstracts.
Signed-off-by: Chris Wi
WRITE_ONCE() should happen at the original var, not on a local
copy of it.
Fixes: 5d36acb7198b ("drm/i915/gt: Batch TLB invalidations")
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH v3 0/3] at:
ht
Add a description for the TLB cache invalidation algorithm and for
the related kAPI functions.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH v3 0/3] at:
https://lore.kernel.org/all/cover.165959809
On Thu, Aug 4, 2022 at 2:54 AM Dave Airlie wrote:
>
> On Thu, 4 Aug 2022 at 06:21, Oded Gabbay wrote:
> >
> > On Wed, Aug 3, 2022 at 10:04 PM Dave Airlie wrote:
> > >
> > > On Sun, 31 Jul 2022 at 22:04, Oded Gabbay wrote:
> > > >
> > > > Hi,
> > > > Greg and I talked a couple of months ago abou
There are more things to be added to TLB invalidation. Before doing that,
move the code to its own file, and add the relevant documentation.
Patch 1 fixes vma_invalidate_tlb() logic to make it update the right var;
Patch 2 only moves the code and do some function renames. No functional
change;
P
When this file was split in
5d945cbcd4b16a29d6470a80dfb19738f9a4319f
Author: Rodrigo Siqueira
Date: Wed Jul 20 15:31:42 2022 -0400
drm/amd/display: Create a file dedicated to planes
This chunk seemed to get dropped. Linus noticed on this
rx580 and I've reproduced on FIJI which makes sense as
On 8/4/2022 1:59 AM, Rob Clark wrote:
On Wed, Aug 3, 2022 at 12:52 PM Akhil P Oommen wrote:
On 8/3/2022 10:53 PM, Rob Clark wrote:
From: Rob Clark
Don't directly restart the hangcheck timer from the timer handler, but
instead start it after the recover_worker replays remaining jobs.
If the
At both suspend and disconnect, we should rather cancel the pending
URBs immediately. For the suspend case, the display will be turned
off, so it makes no sense to process the rendering. And for the
disconnect case, the device may be no longer accessible, hence we
shouldn't do any submission.
Te
Hi,
this is a series of fixes for UDL driver to address the leftover URBs
at suspend/resume. It begins with the simplification of FIFO control
code with the standard wait queue, followed by the handling of pending
URBs, and replace BUG_ON() with WARN_ON() as a cleanup.
Takashi
===
Takashi Iwa
UDL driver uses a semaphore for controlling the emptiness of FIFO in a
slightly funky way. This patch replaces it with a wait queue and
controls the emptiness with the standard wait_event*() macro instead,
which is a more straightforward implementation.
While we are at it, drop the dead code for
We need to wait for finishing to process the all URBs after disabling
the pipe; otherwise pending URBs may stray at suspend/resume, leading
to a possible memory corruption in a worst case.
Tested-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
---
drivers/gpu/drm/udl/udl_drv.h | 1 +
dri
BUG_ON() is a tasteless choice as a sanity check for a driver like UDL
that isn't really a core code. Replace with WARN_ON() and proper
error handling instead.
Tested-by: Thomas Zimmermann
Signed-off-by: Takashi Iwai
---
drivers/gpu/drm/udl/udl_main.c | 3 ++-
drivers/gpu/drm/udl/udl_trans
On 04/08/2022 08:37, Mauro Carvalho Chehab wrote:
WRITE_ONCE() should happen at the original var, not on a local
copy of it.
Fixes: 5d36acb7198b ("drm/i915/gt: Batch TLB invalidations")
Cc: stable I think, since the above one was. So both hit 5.21 (or 6.1)
together.
Regards,
Tvrtko
Sig
Hi,
On 8/3/22 20:24, Maccraft123 wrote:
> From: Maya Matuszczyk
>
> This device is another x86 gaming handheld, and as (hopefully) there is
> only one set of DMI IDs it's using DMI_EXACT_MATCH
>
> Signed-off-by: Maya Matuszczyk
Thanks, patch looks good to me:
Reviewed-by: Hans de Goede
Sin
On 22-08-03, Adam Ford wrote:
> On Wed, Aug 3, 2022 at 1:20 AM Marco Felsch wrote:
> >
> > On 22-08-02, Adam Ford wrote:
> >
> > ...
> >
> > > > I did some reading about the internal timing generator. It appears
> > > > that it's required when video formats use fractional bytes, and it's
> > > >
On 8/4/22 09:15, Helge Deller wrote:
> Hello Jiri,
>
> Thanks for looking into this patch!
>
> On 8/4/22 07:47, Jiri Slaby wrote:
>> On 30. 07. 22, 20:49, Helge Deller wrote:
>>> The line and column numbers for the selection need to start at 1.
>>> Add the checks to prevent invalid input.
>>>
>>> S
We are adding two new callbacks to ttm resource manager
function to handle intersection and compatibility of
placement and resources.
v2: move the amdgpu and ttm_range_manager changes to
separate patches (Christian)
v3: rename "intersect" to "intersects" (Matthew)
Signed-off-by: Christian Kön
Implemented a new intersect and compatible callback functions
to ttm range manager fetching start offset from drm mm range
allocator.
Signed-off-by: Christian König
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/ttm/ttm_range_manager.c | 33 +
1 file changed
Implemented a new intersect and compatible callback function
fetching start offset from backend drm buddy allocator.
Signed-off-by: Christian König
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 38 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_m
Implemented a new intersect and compatible callback function
fetching the start offset from struct ttm_resource.
Signed-off-by: Christian König
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/nouveau/nouveau_mem.c | 29 +++
drivers/gpu/drm/nouveau/nouveau_mem
Implemented a new intersect and compatible callback function
fetching start offset from drm buddy allocator.
v3: move the bits that are specific to buddy_man (Matthew)
v4: consider the block size /range (Matthew)
Signed-off-by: Christian König
Signed-off-by: Arunpravin Paneer Selvam
---
driver
Apply new intersect and compatible callback instead
of having a generic placement range verfications.
v2: Added a separate callback for compatiblilty
checks (Christian)
Signed-off-by: Christian König
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 45 +
Hi Jani,
> >> It moves overflows_type utility macro into drm util header from i915_utils
> >> header. The overflows_type can be used to catch the truncation between data
> >> types. And it adds safe_conversion() macro which performs a type conversion
> >> (cast) of an source value into a new varia
On 04. 08. 22, 10:44, Helge Deller wrote:
On 8/4/22 09:15, Helge Deller wrote:
Hello Jiri,
Thanks for looking into this patch!
On 8/4/22 07:47, Jiri Slaby wrote:
On 30. 07. 22, 20:49, Helge Deller wrote:
The line and column numbers for the selection need to start at 1.
Add the checks to prev
Hi Dave, Adam,
On 22-08-03, Dave Stevenson wrote:
> Hi Adam
>
> On Wed, 3 Aug 2022 at 12:03, Adam Ford wrote:
...
> > > Did managed to get access to the ADV7535 programming guide? This is the
> > > black box here. Let me check if I can provide you a link with our repo
> > > so you can test our
On Wed, 03 Aug 2022, Simon Ser wrote:
> The drm_property_create_enum() call for "COLOR_RANGE" contains a tab
> character in the middle of the argument list.
>
> Signed-off-by: Simon Ser
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_color_mgmt.c | 2 +-
> 1 file changed, 1 insertion(+),
Pavel Machek 於 2022年7月31日 週日 清晨5:42寫道：
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (C) 2022 Richtek Technology Corp.
> > + *
> > + * Author: Alice Chen
> Add ">" at end of line.
>
> The series is quite big, would it be possible to submit LED changes
> in separate seri
On Tue, 19 Jul 2022, Jouni Högander wrote:
> Luminance range calculation was split out into drm_edid.c and is now
> part of edid parsing. Rely on values calculated during edid parsing and
> use these for caps->aux_max_input_signal and caps->aux_min_input_signal.
Harry, I'll merge patches 1 & 3 in
On 22-08-03, Adam Ford wrote:
> On Wed, Aug 3, 2022 at 7:17 AM Dave Stevenson
...
> > Not meaning to butt in, but I have datasheets for ADV7533 and 7535
> > from previously looking at these chips.
>
> Thanks for the feedback.
>
> > Mine fairly plainly states:
> > "The DSI receiver input support
On 22-08-03, Dave Stevenson wrote:
> On Wed, 3 Aug 2022 at 13:31, Adam Ford wrote:
...
> > Mine also states the DSI source needs to provide correct video timing
> > with start and stop sync packets.
> >
> > If I remember correctly, it seemed like Marek V wanted the hard coded
> > samsung,burst-c
Flush mechanism for DSPP blocks has changed in sc7280 family, it
allows individual sub blocks to be flushed in coordination with
master flush control.
representation: master_flush && (PCC_flush | IGC_flush .. etc )
This change adds necessary support for the above design.
Signed-off-by: Kalyan Th
Hi Marco
On Thu, 4 Aug 2022 at 10:38, Marco Felsch wrote:
>
> Hi Dave, Adam,
>
> On 22-08-03, Dave Stevenson wrote:
> > Hi Adam
> >
> > On Wed, 3 Aug 2022 at 12:03, Adam Ford wrote:
>
> ...
>
> > > > Did managed to get access to the ADV7535 programming guide? This is the
> > > > black box here.
On Fri, 29 Jul 2022, Doug Anderson wrote:
> Hi,
>
> On Thu, Jul 21, 2022 at 4:36 AM Dmitry Baryshkov
> wrote:
>>
>> On Thu, 21 Jul 2022 at 01:55, Douglas Anderson wrote:
>> >
>> > I found that writing to `/sys/kernel/debug/dri/*/eDP*/edid_override`
>> > wasn't working for me. I could see the new
On 04/08/2022 00:54, Dave Airlie wrote:
On Thu, 4 Aug 2022 at 06:21, Oded Gabbay wrote:
On Wed, Aug 3, 2022 at 10:04 PM Dave Airlie wrote:
On Sun, 31 Jul 2022 at 22:04, Oded Gabbay wrote:
Hi,
Greg and I talked a couple of months ago about preparing a new accel
subsystem for compute/acc
Hi Marco
On Thu, 4 Aug 2022 at 11:28, Marco Felsch wrote:
>
> On 22-08-03, Dave Stevenson wrote:
> > On Wed, 3 Aug 2022 at 13:31, Adam Ford wrote:
>
> ...
>
> > > Mine also states the DSI source needs to provide correct video timing
> > > with start and stop sync packets.
> > >
> > > If I rememb
If core DMA-buf framework forgets to call dma_fence_enable_signaling()
before calling the dma_fence_is_signaled(). To handle this scenario on
debug kernel the DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT needs to be checked
before checking the actual signaling status.
Signed-off-by: Arvind Yadav
---
include
Hi
Am 03.08.22 um 03:49 schrieb Kevin Brace:
Hi Thomas,
I am honestly surprised of the e-mail back and forth regarding the mainlining
of OpenChrome DRM, but let me state my position.
That's because your expectations are unrealistic. We don't know you, you
apparently have little prior kernel
In the function vt8623fb_set_par(), the value of 'screen_size' is
calculated by the user input. If the user provides the improper value,
the value of 'screen_size' may larger than 'info->screen_size', which
may cause the following bug:
[ 583.339036] BUG: unable to handle page fault for address: f
In the function arkfb_set_par(), the value of 'screen_size' is
calculated by the user input. If the user provides the improper value,
the value of 'screen_size' may larger than 'info->screen_size', which
may cause the following bug:
[ 659.399066] BUG: unable to handle page fault for address:
In the function s3fb_set_par(), the value of 'screen_size' is
calculated by the user input. If the user provides the improper value,
the value of 'screen_size' may larger than 'info->screen_size', which
may cause the following bug:
[ 54.083733] BUG: unable to handle page fault for address: c
On Thu, Jul 21, 2022 at 03:25:02PM +0300, Laurent Pinchart wrote:
> Hi Laurentiu,
>
> Thank you for the patch.
>
> On Thu, Jul 21, 2022 at 03:09:12PM +0300, Laurentiu Palcu wrote:
> > When DCSS + MIPI_DSI is used, and the last bridge in the chain supports
> > HPD, we can see a "Hot plug detection
Hi Dave,
On 22-08-04, Dave Stevenson wrote:
> Hi Marco
>
> On Thu, 4 Aug 2022 at 10:38, Marco Felsch wrote:
> >
> > Hi Dave, Adam,
> >
> > On 22-08-03, Dave Stevenson wrote:
> > > Hi Adam
> > >
> > > On Wed, 3 Aug 2022 at 12:03, Adam Ford wrote:
> >
> > ...
> >
> > > > > Did managed to get acce
In the function *_set_par(), the value of 'screen_size' is
calculated by the user input. If the user provides the improper value,
the value of 'screen_size' may larger than 'info->screen_size', which
may cause a bug in the memset_io().
Zheyu Ma (3):
video: fbdev: vt8623fb: Check the size of scre
On Thu, Aug 4, 2022 at 7:52 AM Marco Felsch wrote:
>
> Hi Dave,
>
> On 22-08-04, Dave Stevenson wrote:
> > Hi Marco
> >
> > On Thu, 4 Aug 2022 at 10:38, Marco Felsch wrote:
> > >
> > > Hi Dave, Adam,
> > >
> > > On 22-08-03, Dave Stevenson wrote:
> > > > Hi Adam
> > > >
> > > > On Wed, 3 Aug 2022
Hi Dave,
On 22-08-04, Dave Stevenson wrote:
> Hi Marco
>
> On Thu, 4 Aug 2022 at 11:28, Marco Felsch wrote:
> >
> > On 22-08-03, Dave Stevenson wrote:
> > > On Wed, 3 Aug 2022 at 13:31, Adam Ford wrote:
> >
> > ...
> >
> > > > Mine also states the DSI source needs to provide correct video timin
Negative tests can be expressed as a single parameterized test case,
which highlights that we're following the same test logic (passing
negative cmdline and expecting drm_mode_parse_command_line_for_connector
to fail), which improves readability.
Signed-off-by: Michał Winiarski
---
.../gpu/drm/t
Expecting to observe a specific value, when the function responsible for
setting the value has failed will lead to extra noise in test output.
Use assert when the situation calls for it.
Also - very small tidying up around the changed areas (whitespace /
variable locality).
Signed-off-by: Michał W
The double `the' is duplicated in the comment, remove one.
Signed-off-by: Jason Wang
---
drivers/gpu/drm/display/drm_dp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c
b/drivers/gpu/drm/display/drm_dp_helper.c
index e5bab236b3
The double `the' is duplicated in the comment, remove one.
Signed-off-by: Jason Wang
---
drivers/gpu/drm/drm_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index c40bde96cfdf..fd2790a5664d 100644
---
The double `the' is duplicated in the comment, remove one.
Signed-off-by: Jason Wang
---
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.
The double `the' is duplicated in the comment, remove one.
Signed-off-by: Jason Wang
---
drivers/gpu/drm/gma500/cdv_intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/gma500/cdv_intel_dp.c
b/drivers/gpu/drm/gma500/cdv_intel_dp.c
index bb2e9d64018a..53
Hi Adam,
On 22-08-04, Adam Ford wrote:
> On Thu, Aug 4, 2022 at 7:52 AM Marco Felsch wrote:
> >
> > Hi Dave,
> >
> > On 22-08-04, Dave Stevenson wrote:
> > > Hi Marco
> > >
> > > On Thu, 4 Aug 2022 at 10:38, Marco Felsch wrote:
> > > >
> > > > Hi Dave, Adam,
> > > >
> > > > On 22-08-03, Dave Ste
On 2022-08-04 01:50, Dave Airlie wrote:
> When this file was split in
>
> 5d945cbcd4b16a29d6470a80dfb19738f9a4319f
> Author: Rodrigo Siqueira
> Date: Wed Jul 20 15:31:42 2022 -0400
>
> drm/amd/display: Create a file dedicated to planes
>
> This chunk seemed to get dropped. Linus noticed on th
On Thu, Aug 4, 2022 at 3:29 AM Kalyan Thota wrote:
>
> +static void dpu_hw_ctl_set_dspp_hierarchical_flush(struct dpu_hw_ctl *ctx,
> + enum dpu_dspp dspp, enum dpu_dspp_sub_blk dspp_sub_blk)
> +{
> + uint32_t flushbits = 0, active = 0;
nit: don't init to 0 since you just override belo
The main goal of this series is to make a small dent in cleaning up
the way we deal with regulator loads for DSI drivers.
As of v3 of this series, the regulator API improvements needed for the
later patches in the series are merged into mainline. Thus this series
only contains the DSI changes now.
As of commit 6eabfc018e8d ("regulator: core: Allow specifying an
initial load w/ the bulk API") we can now specify the initial load in
the bulk data rather than having to manually call regulator_set_load()
on each regulator. Let's use it.
Signed-off-by: Douglas Anderson
Reviewed-by: Dmitry Barysh
The dsi_phy_driver_probe() function has a "goto fail" for no
reason. Change it to just always return directly when it sees an
error. Make this simpler by leveraging dev_err_probe() which is
designed to make code like this shorter / simpler.
NOTE: as part of this, we now pass through error codes di
As of the commit 1de452a0edda ("regulator: core: Allow drivers to
define their init data as const") we no longer need to do copying of
regulator bulk data from initdata to something dynamic. Let's take
advantage of that.
In addition to saving some code, this also moves us to using
ARRAY_SIZE() to
As of commit 5451781dadf8 ("regulator: core: Only count load for
enabled consumers"), a load isn't counted for a disabled
regulator. That means all the code in the DSI driver to specify and
set loads before disabling a regulator is not actually doing anything
useful. Let's remove it.
It should be
1 regulator is listed but the number 2 is specified. This presumably
means we try to get a regulator with no name. Fix it.
Fixes: 462f7017a691 ("drm/msm/dsi: Fix DSI and DSI PHY regulator config from
SDM660")
Signed-off-by: Douglas Anderson
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Marijn Suij
3 regulators are listed but the number 2 is specified. Fix it.
Fixes: 3a3ff88a0fc1 ("drm/msm/dsi: Add 8x96 info in dsi_cfg")
Signed-off-by: Douglas Anderson
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
Changes in v4:
- Use more gooder English in the commit description.
Changes
Hi Adam,
> Subject: Re: imx8mm lcdif->dsi->adv7535 no video, no errors
>
> On Thu, Aug 4, 2022 at 7:52 AM Marco Felsch
> wrote:
> >
> > Hi Dave,
> >
> > On 22-08-04, Dave Stevenson wrote:
> > > Hi Marco
> > >
> > > On Thu, 4 Aug 2022 at 10:38, Marco Felsch
> wrote:
> > > >
> > > > Hi Dave, Adam
On Thu, Aug 04, 2022 at 10:43:42AM +0300, Oded Gabbay wrote:
> After all, memory management services, or common device chars handling
> I can get from other subsystems (e.g. rdma) as well. I'm sure I could
> model my uAPI to be rdma uAPI compliant (I can define proprietary uAPI
> there as well), b
On Thu, 4 Aug 2022 at 13:51, Marco Felsch wrote:
>
> Hi Dave,
>
> On 22-08-04, Dave Stevenson wrote:
> > Hi Marco
> >
> > On Thu, 4 Aug 2022 at 10:38, Marco Felsch wrote:
> > >
> > > Hi Dave, Adam,
> > >
> > > On 22-08-03, Dave Stevenson wrote:
> > > > Hi Adam
> > > >
> > > > On Wed, 3 Aug 2022 a
As mentioned in the previous version, patches 1 and 2 describe DM
mapping of DRM color correction properties to DC interface and where
detached from 3D LUT RFC series [1]. Patches 3 and 4 describe MPC block
programming that matches the three DRM blend modes and came from
previous work [2][3] and di
AMDGPU DM maps DRM color management properties (degamma, ctm and gamma)
to DC color correction entities. Part of this mapping is already
documented as code comments and can be converted as kernel docs.
v2:
- rebase to amd-staging-drm-next
- fix typos (Tales)
- undo kernel-docs inside functions (Ta
Add details about color correction capabilities and explain a bit about
differences between DC hw generations and also how they are mapped
between DRM and DC interface. Two schemas for DCN 2.0 and 3.0 (converted
to svg from the original png) is included to illustrate it. They were
obtained from a d
Describe structs and enums used to set blend mode properties to MPC
blocks. Some pieces of information are already available as code
comments, and were just formatted. Others were collected and summarised
from discussions on AMD issue tracker[1][2].
[1] https://gitlab.freedesktop.org/drm/amd/-/iss
AMD GPU display manager (DM) maps DRM pixel blend modes (None,
Pre-multiplied, Coverage) to MPC hw blocks through blend configuration
options. Describe relevant elements and how to set and test them to get
the expected DRM blend mode on DCN hw.
v2:
- add ref tag (Tales)
Signed-off-by: Melissa Wen
On 8/4/2022 6:00 AM, Tvrtko Ursulin wrote:
On 04/08/2022 00:54, Dave Airlie wrote:
On Thu, 4 Aug 2022 at 06:21, Oded Gabbay wrote:
On Wed, Aug 3, 2022 at 10:04 PM Dave Airlie wrote:
On Sun, 31 Jul 2022 at 22:04, Oded Gabbay
wrote:
Hi,
Greg and I talked a couple of months ago about pre
Hi Kevin,
> 1) Get an un-accelerated driver merged without new uapi, ioctls, etc. All
> you need is there already. We already agreed to take the code mostly as-is
> and do the cleanups later on.
>
> 2a) Stay around on dri-devel, send improvements and fixes for the merged
> code.
>
> 2b) In pa
Hi
When is this relanding?
Cheers
Mike
On Mon, 18 Jul 2022 at 21:40, Dixit, Ashutosh wrote:
>
> On Thu, 14 Jul 2022 08:00:32 -0700, Christian König wrote:
> >
> > Am 14.07.22 um 15:33 schrieb Alex Deucher:
> > > On Thu, Jul 14, 2022 at 9:09 AM Christian König
> > > wrote:
> > >> Hi Mauro,
> >
On Sat, 2022-07-30 at 09:57 -0400, Tom Rix wrote:
> Remove second 'should'
>
> Spelling replacements
> aqcuire -> acquire
> applcations -> applications
> assumings -> assumes
> begining-> beginning
> commited-> committed
> contol -> control
> inbetween -> in between
> resorces
On Thu, 4 Aug 2022 at 13:29, Kalyan Thota wrote:
>
> Flush mechanism for DSPP blocks has changed in sc7280 family, it
> allows individual sub blocks to be flushed in coordination with
> master flush control.
>
> representation: master_flush && (PCC_flush | IGC_flush .. etc )
>
> This change adds n
On Fri, 29 Jul 2022 at 02:22, Doug Anderson wrote:
>
> Hi,
>
> On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
> wrote:
> >
> > Changes in v2:
> > - Use dp bridge to set psr entry/exit instead of dpu_enocder.
> > - Don't modify whitespaces.
> > - Set self refresh aware from atomic_check.
> >
Hi Thomas,
On Wed, Jul 27, 2022 at 01:33:01PM +0200, Thomas Zimmermann wrote:
> Provide drm_fb_blit() that works with struct iosys_map. Update all
> users of drm_fb_blit_toio(), which required a destination buffer in
> I/O memory. The new function's interface works with multi-plane
> color formats
On Thu, Aug 4, 2022 at 12:35 AM Sudip Mukherjee (Codethink)
wrote:
>
> I will be happy to test any patch or provide any extra log if needed.
It sounds like that file just needs to get a
#include
there, and for some reason architectures other than alpha and mips end
up getting it accidental
On Wed, Aug 3, 2022 at 10:50 PM Dave Airlie wrote:
>
> With this applied, I get gdm back.
I can confirm that it makes thing work again for me too. Applied.
Linus
On Thu, Aug 4, 2022 at 12:53 AM Akhil P Oommen wrote:
>
> On 8/4/2022 1:59 AM, Rob Clark wrote:
> > On Wed, Aug 3, 2022 at 12:52 PM Akhil P Oommen
> > wrote:
> >> On 8/3/2022 10:53 PM, Rob Clark wrote:
> >>> From: Rob Clark
> >>>
> >>> Don't directly restart the hangcheck timer from the timer h
Hi Dave and Daniel,
Here goes drm-intel-next-fixes-2022-08-04:
- disable pci resize on 32-bit systems (Nirmoy)
- don't leak the ccs state (Matt)
- TLB invalidation fixes (Chris)
Thanks,
Rodrigo.
The following changes since commit 2bc7ea71a73747a77e7f83bc085b0d2393235410:
Merge tag 'topic/nou
On Thu, Aug 4, 2022 at 5:50 PM Jason Gunthorpe wrote:
>
> On Thu, Aug 04, 2022 at 10:43:42AM +0300, Oded Gabbay wrote:
>
> > After all, memory management services, or common device chars handling
> > I can get from other subsystems (e.g. rdma) as well. I'm sure I could
> > model my uAPI to be rdma
Hi,
On Thu, Aug 4, 2022 at 9:21 AM Robert Foss wrote:
>
> On Fri, 29 Jul 2022 at 02:22, Doug Anderson wrote:
> >
> > Hi,
> >
> > On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
> > wrote:
> > >
> > > Changes in v2:
> > > - Use dp bridge to set psr entry/exit instead of dpu_enocder.
> > > - D
The builds for alpha and mips allmodconfig fails with the error:
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c:534:23:
error: implicit declaration of function 'vmalloc'; did you mean
'kvmalloc'? [-Werror=implicit-function-declaration]
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c:534:21:
error: assignmen
On Thu, Aug 4, 2022 at 6:17 PM Linus Torvalds
wrote:
>
> On Thu, Aug 4, 2022 at 12:35 AM Sudip Mukherjee (Codethink)
> wrote:
> >
> > I will be happy to test any patch or provide any extra log if needed.
>
> It sounds like that file just needs to get a
>
> #include
>
> there, and for some re
Hi All,
The latest mainline kernel branch fails to build for x86_64 allmodconfig
with clang. The errors are:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3596:6:
error: stack frame size (2216) exceeds limit (2048) in
'dml30_ModeSupportAndSystemConfigurationFull' [-We
On Thu, Aug 4, 2022 at 11:37 AM Sudip Mukherjee (Codethink)
wrote:
>
> git bisect points to 3876a8b5e241 ("drm/amd/display: Enable building new
> display engine with KCOV enabled").
Ahh. So that was presumably why it was disabled before - because it
presumably does disgusting things that make KC
On Thu, 2022-07-21 at 14:23 +0800, Slark Xiao wrote:
> Replace 'the the' with 'the' in the comment.
>
> Signed-off-by: Slark Xiao
Reviewed-by: Stuart Summers
> ---
> drivers/gpu/drm/display/drm_dp_helper.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 2 +-
> drivers/gpu/drm
Hi Mauro,
On 8/4/22 00:37, Mauro Carvalho Chehab wrote:
> Add a description for the TLB cache invalidation algorithm and for
> the related kAPI functions.
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the c
-Merge-negative-tests/20220804-212019
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
config: hexagon-randconfig-r001-20220804
(https://download.01.org/0day-ci/archive/20220805/202208050217.vhlt1udz-...@intel.com/config)
compiler: clang version 16.0.0 (https://github.com/ll
On Thu, Aug 4, 2022 at 8:52 PM Linus Torvalds
wrote:
>
> On Thu, Aug 4, 2022 at 11:37 AM Sudip Mukherjee (Codethink)
> wrote:cov_trace_cmp
> >
> > git bisect points to 3876a8b5e241 ("drm/amd/display: Enable building new
> > display engine with KCOV enabled").
>
> Ahh. So that was presumably why
Hi "Michał,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on drm-tip/drm-tip]
[cannot apply to drm/drm-next drm-exynos/exynos-drm-next
drm-intel/for-linux-next linus/master v5.19 next-20220804]
[If your
As the comment right before the mtk_dsi_stop() call advises,
mtk_dsi_stop() should only be called after
mtk_drm_crtc_atomic_disable(). That's because that function calls
drm_crtc_wait_one_vblank(), which requires the vblank irq to be enabled.
Previously mtk_dsi_stop(), being in mtk_dsi_poweroff()
Hi Thomas,
On Wed, Jul 27, 2022 at 01:33:02PM +0200, Thomas Zimmermann wrote:
> Merge drm_fb_memcpy() and drm_fb_memcpy() into drm_fb_memcpy() that
One of these is drm_fb_memcpy_toio()
> uses struct iosys_map for buffers. The new function also supports
> multi-plane color formats. Convert all user
On Thu, Aug 4, 2022 at 6:04 PM Jeffrey Hugo wrote:
>
> On 8/4/2022 6:00 AM, Tvrtko Ursulin wrote:
> >
> > On 04/08/2022 00:54, Dave Airlie wrote:
> >> On Thu, 4 Aug 2022 at 06:21, Oded Gabbay wrote:
> >>>
> >>> On Wed, Aug 3, 2022 at 10:04 PM Dave Airlie wrote:
>
> On Sun, 31 Jul 2022
Hi Thomas,
On Wed, Jul 27, 2022 at 01:33:03PM +0200, Thomas Zimmermann wrote:
> Convert drm_fb_swab() to use struct iosys_map() and convert users. The
> new interface supports multi-plane color formats.
It swabs only plane[0], sbut this is maybe enough to say so.
A few comments in the following.
Hi Thomas,
On Wed, Jul 27, 2022 at 01:33:04PM +0200, Thomas Zimmermann wrote:
> Update XRGB-to-RGB332 conversion to support struct iosys_map
> and convert all users. Although these are single-plane color formats,
> the new interface supports multi-plane formats for consistency with
> drm_fb_bl
On Wed, Jul 27, 2022 at 01:33:05PM +0200, Thomas Zimmermann wrote:
> Update XRGB-to-RGB565 conversion to support struct iosys_map
> and convert all users. Although these are single-plane color formats,
> the new interface supports multi-plane formats for consistency with
> drm_fb_blit().
>
> S
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