Fbdev firmware drivers acquire ownership of framebuffer I/O ranges and
hand them over to native drivers during the boot process. Re-implement
this mechanism with aperture helpers and remove the respective fbdev
code.
This change allows to perform hand-over from DRM firmware drivers. In a
later pat
Convert fbdev drivers from fbdev's remove_conflicting_framebuffers() to
the framework-independent aperture_remove_conflicting_devices(). Calling
this function will also remove conflicting DRM drivers.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/staging/sm7
Remove firmware devices on the PCI bus, by calling
aperture_remove_conflicting_pci_devices() in the probe function of
each related fbdev driver. iSo far, most of these drivers did not
remove conflicting VESA or EFI devices, or outride failed for
resource conflicts (i.e., matroxfb.) This must have b
Provide VGA_FB_ constants for the VGA framebuffer I/O range and convert
fbdev code. In the case of vga16fb, this is a rename of the existing
constants VGA_FB_PHYS and VGA_FB_PHYS_LEN.
v2:
* clarify relationship with old constants in vga16fb (Javier)
Signed-off-by: Thomas Zimmermann
Revie
On the primary graphics adapter, a driver might conflict with a VGA
driver that controls the VGA framebuffer I/O range. Remove the VGA
driver from the aperture helpers. Until now, this case has been
hendled by fbdev, but it should work even with fbdev disabled.
Signed-off-by: Thomas Zimmermann
Re
Move vgag16fb's option parsing into the driver's probe function and
generate the rest of the module's init/exit functions from macros.
Keep the options code, although there are no options defined.
v2:
* no options are supported, remove the code (Javier)
Signed-off-by: Thomas Zimmermann
R
Fix coding style. No functional changes.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/video/fbdev/aty/aty128fb.c| 52 ++---
drivers/video/fbdev/aty/radeon_base.c | 66 +++---
drivers/video/fbdev/chipsfb.c | 6 +-
drivers/video/fbdev/i810/i81
Remove the call to do_remove_conflicting_framebuffers() from the
framebuffer registration. Aperture helpers take care of removing
conflicting devices. With all ownership information stored in the
aperture datastrcutures, remove remove_conflicting_framebuffers()
entirely.
This change also rectifies
Move the device-creation from vga16fb to sysfb code. The driver's
videomode checks are independent from device creation, so move them
into vga16fb's probe function. This will allow to create the module
init/exit code automatically.
The vga16fb driver requires a screen_info for type VIDEO_TYPE_VGAC
Call sysfb_disable() before removing conflicting devices in aperture
helpers. Fixes sysfb state if fbdev has been disabled.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
Fixes: fb84efa28a48 ("drm/aperture: Run fbdev removal before internal helpers")
Cc: Zack Rusin
Cc: T
Remove remove_conflicting_pci_framebuffers() and implement similar
functionality in aperture_remove_conflicting_pci_device(), which was
the only caller. Removes an otherwise unused interface and streamlines
the aperture helper. No functional changes.
Signed-off-by: Thomas Zimmermann
Reviewed-by:
When registering a generic framebuffer, automatically acquire ownership
of the framebuffer's I/O range. The device will now be handled by the
aperture helpers. Fbdev-based conflict handling is no longer required.
v2:
* use fb_ prefix instead of fbm_ (Javier)
Signed-off-by: Thomas Zimmerma
On Fri, Jul 15, 2022 at 01:48:56PM +0530, Somalapuram, Amaranath wrote:
>
> On 7/14/2022 9:13 PM, André Almeida wrote:
> > Às 12:06 de 14/07/22, Sebin Sebastian escreveu:
> > > On Tue, Jul 12, 2022 at 12:14:27PM -0300, André Almeida wrote:
> > > > Hi Sebin,
> > > >
> > > > Às 10:29 de 10/07/22, S
On Sat, Jul 16, 2022 at 08:17:41PM +0200, Sam Ravnborg wrote:
> The rename is done to make it more obvious what is DRI1 drivers
> and what is other type of legacy.
>
> Signed-off-by: Sam Ravnborg
> ---
> arch/powerpc/configs/pmac32_defconfig | 2 +-
> arch/powerpc/configs/ppc6xx_defconfig | 2
Hi Thomas,
On Mon, Jul 18, 2022 at 08:56:16AM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 16.07.22 um 20:17 schrieb Sam Ravnborg:
> > While discussing the way forward for the via driver
> > Javier came up with the proposal to move all DRI1 drivers
> > to their own folder.
> >
> > The idea is to
Hi!
> From: Uwe Kleine-König
>
> The value returned by an i2c driver's remove function is mostly ignored.
> (Only an error message is printed if the value is non-zero that the
> error is ignored.)
>
> So change the prototype of the remove function to return no value. This
> way driver authors a
This patch adds ast specific codes for DRM Prime feature.
User application can get file descriptor from gem handle and also
gem handle from file descriptor.this is to allow for offloading
of rendering in one direction and outputs in the other.
Signed-off-by: oushixiong
---
drivers/gpu/drm/ast/as
On Sun, 17 Jul 2022, Pavel Machek wrote:
> Hi!
>
> > Going forward, I'll be using my kernel.org for upstream work.
> >
>
> Acked-by: Pavel Machek
>
> Let me know if you want to take it through the LED tree.
Thanks for the offer.
The plan is to take it via Backlight tree.
--
Lee Jones [李琼斯]
On Thu, 16 Jun 2022 21:52:10 +0300, Laurent Pinchart wrote:
> Add FourCCs for two missing permutations of the packed YUV 4:4:4 color
> components, namely AVUY and XVUY.
>
> These formats are needed by the NXP i.MX8 ISI. While the ISI is
> supported by a V4L2 device (corresponding formats have been
On Thu, 14 Jul 2022, Lee Jones wrote:
> Going forward, I'll be using my kernel.org for upstream work.
>
> Cc: Daniel Thompson
> Cc: Jingoo Han
> Cc: Rob Herring
> Cc: Krzysztof Kozlowski
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-l...@vger.kernel.org
> Cc: devicet...@vger.kernel.org
>
On Fri, Jul 15, 2022 at 03:10:42PM +0200, Andy Shevchenko wrote:
> On Fri, Jul 15, 2022 at 1:28 PM ChiaEn Wu wrote:
>
> > The MT6370 is a highly-integrated smart power management IC, which
> > includes a single cell Li-Ion/Li-Polymer switching battery charger,
> > a USB Type-C & Power Delivery (P
Il 15/07/22 18:29, Daniel Thompson ha scritto:
On Fri, Jul 15, 2022 at 02:38:45PM +0200, AngeloGioacchino Del Regno wrote:
Il 15/07/22 13:26, ChiaEn Wu ha scritto:
From: ChiaEn Wu
MediaTek MT6370 is a SubPMIC consisting of a single cell battery charger
with ADC monitoring, RGB LEDs, dual chan
Hi Sam
Am 18.07.22 um 09:56 schrieb Sam Ravnborg:
Hi Thomas,
On Mon, Jul 18, 2022 at 08:56:16AM +0200, Thomas Zimmermann wrote:
Hi
Am 16.07.22 um 20:17 schrieb Sam Ravnborg:
While discussing the way forward for the via driver
Javier came up with the proposal to move all DRI1 drivers
to their
On Thu, 14 Jul 2022, Maíra Canal wrote:
> Remove legacy PWM interface (pwm_config, pwm_enable, pwm_disable) and
> replace it for the atomic PWM API.
>
> Reviewed-by: Uwe Kleine-König
> Reviewed-by: Daniel Thompson
> Signed-off-by: Maíra Canal
Nit: This should be chronological.
> ---
> V1 ->
From: Dave Airlie
A recent snafu where Intel ignored upstream feedback on a firmware
change, led to a late rc6 fix being required. In order to avoid this
in the future we should document some expectations around
linux-firmware.
I was originally going to write this for drm, but it seems quite gen
A recent snafu where Intel ignored upstream feedback on a firmware
change, led to a late rc6 fix being required. In order to avoid this
in the future we should document some expectations around
linux-firmware.
I was originally going to write this for drm, but it seems quite generic
advice.
Signed
Hello Sam,
On 6/24/22 21:37, Sam Ravnborg wrote:
> Hi Javier,
>
> On Sat, Jun 18, 2022 at 07:43:38PM +0200, Javier Martinez Canillas wrote:
>> Data writes for the ssd130x 4-wire SPI protocol need special handling, due
>> the Data/Command control (D/C) pin having to be toggled prior to the write.
Split mgag200_modeset_init() into smaller helpers to initialize
the mode_config structure and the pipeline. This will be helpful
for transforming this code into per-model functions. No functional
changes.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Jocelyn Falempe
Tested-by: Jocelyn Falempe
A
Mgag200 still mixes model-specific code and generic code in the same
functions. Separate it into distinct helpers.
As part of this effort, convert the driver from simple-KMS helpers
to regular atomic helpers. The latter are way more flexible and can
be adapted easily for each hardware model.
Test
Provide an init function for each model's DAC registers. Remove
the shared helper.
The code for initializing the DAC registers consisted of a large
table of default value, plus many exceptions for the various G200
models. Providing a per-model implementation makes if more readable.
At some point,
Each model's specific code is located in a separate file. The type
field in struct mga_device is no unused. Remove it.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Jocelyn Falempe
Tested-by: Jocelyn Falempe
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/mgag200/mgag200_drv.c | 17 +++
The CRTC atomic_enable helper contains per-model branches for
G200ER, G200EV and G200SE devices. Implement a dedicated helper
for each of them and remove the branches from the shared helper.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Jocelyn Falempe
Tested-by: Jocelyn Falempe
Acked-by: Sam R
The SCROFF bit controls reading the primary plane's scanout buffer
from video memory. Set it from primary-plane code, instead of CRTC
code.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Jocelyn Falempe
Tested-by: Jocelyn Falempe
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/mgag200/mgag200_mode.
Move the BMC-related code into its own file and wire it up with device
callbacks.
While programming a new display mode, G200EW3 and G200WB have to de-
synchronize with the BMC. Synchronization is done via VIDRST pins
and controlled via VRSTEN and HRSTEN bits. Move the BMC code behind
a serviceable
Move the PIXPLLC code into per-model source files and wire it up
with per-model callbacks. No functional changes.
The PIXPLLC pixel-clock is part of the CRTC, but really separate
hardware that varies with each model of the G200. Move the PIXPLLC
code for each model into the per-model source file a
Hold I/O-register lock in atomic_commit_tail to protect all pipeline
updates at once. Protects against concurrent I/O access in get-modes
helper.
Complex modesetting operations involve mode changes, plane updates and
possibly BMC updates. Make all this atomic wrt to reading display modes
via EDID.
Move the mode-config code into model-specific code and call the
plane/CRTC helpers as needed. This will help with providing per-
model implementations of individual helpers.
Duplication of the pipeline init function is accepted. Some macros
simplify this for shared helpers.
Signed-off-by: Thomas
While currently empty, the device callbacks will allow mgag200's
modesetting code to interact with the BMC and PIXPLLC.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Jocelyn Falempe
Tested-by: Jocelyn Falempe
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/mgag200/mgag200_drv.c | 4 +++-
drive
Move around some modesetting code before dropping simple-KMS helpers.
Makes the next patch more readable. No functional changes.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Jocelyn Falempe
Tested-by: Jocelyn Falempe
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 95
Drop simple-KMS in favor of regular atomic helpers. Makes the code
more modular and hence better to adapt to per-model requirements.
The simple-KMS helpers provide few extra features, so the patch is
mostly about open-coding what simple-KMS does. The simple-KMS helpers
do mix up plane and CRTC sta
The register initialization code contains special cases for G200ER
and G200EW3 hardware. Move this to per-model code.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Jocelyn Falempe
Tested-by: Jocelyn Falempe
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/mgag200/mgag200_g200er.c | 2 ++
drivers/g
Store the primary plane's color format in the CRTC state and use
it for programming the CRTC's gamma LUTs.
Gamma tables (i.e., color management) are provided by the CRTC, but
depend in the primary plane's color format. Store the format in the
CRTC state and use it. This has not been an issue with
Hi
Am 18.07.22 um 03:45 schrieb oushixiong:
This patch adds ast specific codes for DRM Prime feature.
User application can get file descriptor from gem handle and also
gem handle from file descriptor.this is to allow for offloading
of rendering in one direction and outputs in the other.
Signed-
Hello Thomas,
On 7/18/22 08:56, Thomas Zimmermann wrote:
> Hi
>
> Am 16.07.22 um 20:17 schrieb Sam Ravnborg:
>> While discussing the way forward for the via driver
>> Javier came up with the proposal to move all DRI1 drivers
>> to their own folder.
>>
>> The idea is to move the old DRI1 drivers s
Hi Thomas,
I love your patch! Perhaps something to improve:
[auto build test WARNING on ebea934e2651857c9b56cc80bf99460ee18a3592]
url:
https://github.com/intel-lab-lkp/linux/commits/Thomas-Zimmermann/fbdev-Maintain-device-ownership-with-aperture-helpers/20220718-152559
base
Hi,
On 15/07/2022 23:54, Daniele Ceraolo Spurio wrote:
This patch re-introduces support for GuC v69 in parallel to v70. As this
is a quick fix, v69 has been re-introduced as the single "fallback" guc
version in case v70 is not available on disk. All v69 specific code has
been labeled as such f
Hi Sam
On Sun, 17 Jul 2022 at 18:58, Sam Ravnborg wrote:
>
> Add todo in the hope someone will help updating the bridge drivers.
>
> v2:
> - Updated descriptions in todo.rst
>
> Signed-off-by: Sam Ravnborg
> Acked-by: Maxime Ripard
> Cc: Laurent Pinchart
> Cc: Maarten Lankhorst
> Cc: Maxime
On 15.07.22 17:05, Alex Sierra wrote:
> [WHY]
> It makes more sense to have these helpers in zone specific header
> file, rather than the generic mm.h
>
> Signed-off-by: Alex Sierra
Acked-by: David Hildenbrand
--
Thanks,
David / dhildenb
Hi Javier
Am 18.07.22 um 11:46 schrieb Javier Martinez Canillas:
Hello Thomas,
On 7/18/22 08:56, Thomas Zimmermann wrote:
Hi
Am 16.07.22 um 20:17 schrieb Sam Ravnborg:
While discussing the way forward for the via driver
Javier came up with the proposal to move all DRI1 drivers
to their own f
On 15.07.22 17:05, Alex Sierra wrote:
> With DEVICE_COHERENT, we'll soon have vm_normal_pages() return
> device-managed anonymous pages that are not LRU pages. Although they
> behave like normal pages for purposes of mapping in CPU page, and for
> COW. They do not support LRU lists, NUMA migration
On 01/07/2022 23:50, Niranjana Vishwanathapura wrote:
Bind and unbind the mappings upon VM_BIND and VM_UNBIND calls.
Signed-off-by: Niranjana Vishwanathapura
Signed-off-by: Prathap Kumar Valsan
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/gem/i915_gem_cr
On 15.07.22 17:05, Alex Sierra wrote:
> From: Alistair Popple
>
> Currently any attempts to pin a device coherent page will fail. This is
> because device coherent pages need to be managed by a device driver, and
> pinning them would prevent a driver from migrating them off the device.
>
> Howev
On Mon, Jul 18, 2022 at 4:27 PM AngeloGioacchino Del Regno
wrote:
>
> >>
> >> Hello ChiaEn,
> >>
> >> I propose to move this one to drivers/leds (or drivers/pwm) and, instead of
> >> registering a backlight device, register a PWM device.
> >>
> >> This way you will be able to reuse the generic
On 09/07/2022 00:48, Daniele Ceraolo Spurio wrote:
The current HuC status getparam return values are a bit confusing in
regards to what happens in some scenarios. In particular, most of the
error cases cause the ioctl to return an error, but a couple of them,
INIT_FAIL and LOAD_FAIL, are not ex
Applied to drm-misc-next
Hi,
On 12/07/2022 06:00, Christoph Hellwig wrote:
On Mon, Jul 11, 2022 at 04:31:49PM -0400, Rodrigo Vivi wrote:
On Mon, Jul 11, 2022 at 10:26:14AM +0200, Christoph Hellwig wrote:
Hi i915 and nouveau maintainers,
any chance I could get some help to remove the remaining direct
driver calls in
On Fri, 15 Jul 2022 15:16:05 -0700
Joe Perches wrote:
> On Fri, 2022-07-15 at 17:35 -0400, Rodrigo Vivi wrote:
> > On Wed, Jul 13, 2022 at 09:12:12AM +0100, Mauro Carvalho Chehab wrote:
> > > This file is licensed with MIT license. Change its license text
> > > to use SPDX.
> > >
> > > Signe
On Mon, Jul 18, 2022 at 10:08 AM ChiYuan Huang wrote:
> On Fri, Jul 15, 2022 at 03:10:42PM +0200, Andy Shevchenko wrote:
> > On Fri, Jul 15, 2022 at 1:28 PM ChiaEn Wu wrote:
...
> > > This commit add support for the Type-C & Power Delivery controller in
> >
> > This commit add -> Add
> >
> Uppe
Applied series to drm-misc-next.
Hey Liang,
On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
>
> There are two refcount bugs in this funcion:
>
> BUG-1: 'pdata->mipi_host_node' will be assigned a new reference with
> of_graph_get_remote_node() which will increase the refcount of the
> object, correspondingly, we should call of_node
On Mon, 18 Jul 2022 at 13:54, Robert Foss wrote:
>
> Hey Liang,
>
>
> On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
> >
> > There are two refcount bugs in this funcion:
> >
> > BUG-1: 'pdata->mipi_host_node' will be assigned a new reference with
> > of_graph_get_remote_node() which will increase t
At 2022-07-18 19:54:18, "Robert Foss" wrote:
>Hey Liang,
>
>
>On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
>>
>> There are two refcount bugs in this funcion:
>>
>> BUG-1: 'pdata->mipi_host_node' will be assigned a new reference with
>> of_graph_get_remote_node() which will increase the refcount
At 2022-07-18 19:55:16, "Robert Foss" wrote:
>On Mon, 18 Jul 2022 at 13:54, Robert Foss wrote:
>>
>> Hey Liang,
>>
>>
>> On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
>> >
>> > There are two refcount bugs in this funcion:
>> >
>> > BUG-1: 'pdata->mipi_host_node' will be assigned a new reference
Can you use the norma commitl title prefix "drm/bridge: tc358767: "
On Thu, 7 Jul 2022 at 04:45, Liang He wrote:
>
> In tc_probe_bridge_endpoint(), we should call of_node_put() when
> breaking out of the for_each_endpoint_of_node() which will automatically
> increase and decrease the refcount.
>
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: Matthew Brost
Remove bogus GEM_BUG_ON which compared kernel context timeline seqno to
seqno in memory on engine PM unpark. If a GT reset occurred these values
might not match as a kernel context could be skipped. This bug was
hidden
On 7/18/22 12:50, Thomas Zimmermann wrote:
[...]
>>> To be honest, I still don't like this rename. Especially in the case of
>>> via, which has a KMS driver coming up. It will now have an include
>>> statement that crosses several levels in the directory hierarchy. And
>>
>> That could be avoided
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: Matthew Brost
The engine registers really shouldn't be touched during GuC submission
as the GuC owns the registers. Don't call ring_is_idle and tie
Touch being just read and it is somehow harmful?
intel_engine_is_idle strictly to
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: Matthew Brost
The GuC needs a copy of a golden context for implementing watchdog
resets (aka media resets). This context is larger on newer platforms.
So adjust the size being allocated/copied accordingly.
What were the consequence
On 13/07/2022 00:31, john.c.harri...@intel.com wrote:
From: John Harrison
When the KMD sends a CLIENT_RESET request to GuC (as part of the
suspend sequence), GuC will mark the CTB buffer as 'UNUSED'. If the
KMD then checked the CTB queue, it would see a non-zero status value
and report the bu
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Check if the device is powered down prior to any engine activity,
as, on such cases, all the TLBs were already invalidated, so an
explicit TLB invalidation is not needed, thus reducing the
performance regression impact due t
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
Add a kernel-doc markup to document this new macro.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH v2 00/21] at:
https://lore.kernel.org/all/co
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Ensure that the TLB of the OA unit is also invalidated
on gen12 HW, as just invalidating the TLB of an engine is not
enough.
Cc: sta...@vger.kernel.org
Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing sto
At 2022-07-18 19:56:09, "Liang He" wrote:
>
>At 2022-07-18 19:54:18, "Robert Foss" wrote:
>>Hey Liang,
>>
>>
>>On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
>>>
>>> There are two refcount bugs in this funcion:
>>>
>>> BUG-1: 'pdata->mipi_host_node' will be assigned a new reference with
>>> of_gr
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Don't flush TLBs when the buffer is only used in the GGTT under full
control of the kernel, as there's no risk of concurrent access
and stale access from prefetch.
We only need to invalidate the TLB if they are accessible b
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Skip all further TLB invalidations once the device is wedged and
had been reset, as, on such cases, it can no longer process instructions
on the GPU and the user no longer has access to the TLB's in each engine.
That helps
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Invalidate TLB in patch, in order to reduce performance regressions.
"in batches"?
Currently, every caller performs a full barrier around a TLB
invalidation, ignoring all other invalidations that may have already
removed
* Andrew Morton [220716 21:03]:
> On Thu, 14 Jul 2022 09:56:19 +0800 kernel test robot wrote:
>
> > lib/maple_tree.c:1522:52: warning: Parameter 'gaps' can be declared with
> > const [constParameter]
> > lib/maple_tree.c:1871:21: warning: Array index 'split' is used before
> > limits check. [a
Andy Shevchenko 於 2022年7月18日 週一 晚上7:39寫道：
>
> On Mon, Jul 18, 2022 at 10:08 AM ChiYuan Huang wrote:
> > On Fri, Jul 15, 2022 at 03:10:42PM +0200, Andy Shevchenko wrote:
> > > On Fri, Jul 15, 2022 at 1:28 PM ChiaEn Wu wrote:
>
> ...
>
> > > > This commit add support for the Type-C & Power Deliver
Il 18/07/22 07:22, Allen-KH Cheng ha scritto:
DPI is part of the display / multimedia block in MediaTek SoCs
and is managed using power controller in some platforms. We add
the power-domains property to the binding documentation.
Signed-off-by: Allen-KH Cheng
For the contents of this commit:
Am 15.07.22 um 07:20 schrieb Jason Wang:
The double `have' is duplicated in line 696, remove one.
The subject line is rather confusing since this isn't related to DMA-buf
at all.
Please change that to "drm/radeon:", apart from that the patch looks
good to me.
Christian.
Signed-off-by:
On Mon, 18 Jul 2022 14:16:10 +0100
Tvrtko Ursulin wrote:
> On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
> > From: Chris Wilson
> >
> > Check if the device is powered down prior to any engine activity,
> > as, on such cases, all the TLBs were already invalidated, so an
> > explicit TLB inva
On Mon, 18 Jul 2022 at 15:35, Liang He wrote:
>
>
> At 2022-07-18 19:56:09, "Liang He" wrote:
> >
> >At 2022-07-18 19:54:18, "Robert Foss" wrote:
> >>Hey Liang,
> >>
> >>
> >>On Thu, 7 Jul 2022 at 03:25, Liang He wrote:
> >>>
> >>> There are two refcount bugs in this funcion:
> >>>
> >>> BUG-1:
On 18/07/2022 15:53, Mauro Carvalho Chehab wrote:
On Mon, 18 Jul 2022 14:16:10 +0100
Tvrtko Ursulin wrote:
On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson
Check if the device is powered down prior to any engine activity,
as, on such cases, all the TLBs were already in
From: Mauro Carvalho Chehab
> Sent: 18 July 2022 15:54
>
> On Mon, 18 Jul 2022 14:16:10 +0100
> Tvrtko Ursulin wrote:
>
> > On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
> > > From: Chris Wilson
> > >
> > > Check if the device is powered down prior to any engine activity,
> > > as, on such
On Mon, 18 Jul 2022 14:39:17 +0100
Tvrtko Ursulin wrote:
> On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
> > From: Chris Wilson
> >
> > Don't flush TLBs when the buffer is only used in the GGTT under full
> > control of the kernel, as there's no risk of concurrent access
> > and stale acces
On Mon, 18 Jul 2022 14:45:22 +0100
Tvrtko Ursulin wrote:
> On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
> > From: Chris Wilson
> >
> > Skip all further TLB invalidations once the device is wedged and
> > had been reset, as, on such cases, it can no longer process instructions
> > on the GP
Hi Steven, once again thanks for the feedback. I was off for some time and then
busy with other stuff, but I can finally work on a new revision for the patch
On 23.06.2022 13:23, Steven Price wrote:
> On 22/06/2022 15:36, Adrián Larumbe wrote:
> > In the event of a job timeout, debug dump informat
On 7/18/2022 3:02 AM, Tvrtko Ursulin wrote:
Hi,
On 15/07/2022 23:54, Daniele Ceraolo Spurio wrote:
This patch re-introduces support for GuC v69 in parallel to v70. As this
is a quick fix, v69 has been re-introduced as the single "fallback" guc
version in case v70 is not available on disk. A
On 7/18/2022 4:26 AM, Tvrtko Ursulin wrote:
On 09/07/2022 00:48, Daniele Ceraolo Spurio wrote:
The current HuC status getparam return values are a bit confusing in
regards to what happens in some scenarios. In particular, most of the
error cases cause the ioctl to return an error, but a coup
This is v5 for a previous patch series being discussed at:
https://lore.kernel.org/dri-devel/20220622143616.1265405-1-adrian.laru...@collabora.com/T/#t
Mesa MR under review can be found at:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14034
Changes with respect to v4 of the same pat
In the event of a job timeout, debug dump information will be written into
/sys/class/devcoredump.
Inspired by etnaviv's similar feature.
Signed-off-by: Adrián Larumbe
---
drivers/gpu/drm/panfrost/Kconfig | 1 +
drivers/gpu/drm/panfrost/Makefile| 3 +-
drivers/gpu/drm/panfro
Each Panfrost job has its own job slot and MMU address space set of
registers, which are selected with a job-specific index.
Turn the shift and stride used for selection of the right register set base
into a define rather than using magic numbers.
Signed-off-by: Adrián Larumbe
---
drivers/gpu/d
On Sun, Jul 10, 2022 at 12:00:40PM +0300, Dmitry Baryshkov wrote:
> Move properties common to all DPU DT nodes to the dpu-common.yaml.
>
> Note, this removes description of individual DPU port@ nodes. However
> such definitions add no additional value. The reg values do not
> correspond to hardwar
On 2022-07-18 06:50, David Hildenbrand wrote:
On 15.07.22 17:05, Alex Sierra wrote:
[WHY]
It makes more sense to have these helpers in zone specific header
file, rather than the generic mm.h
Signed-off-by: Alex Sierra
Acked-by: David Hildenbrand
Thank you! I don't think I have the authorit
On Sun, 10 Jul 2022 12:00:34 +0300, Dmitry Baryshkov wrote:
> Move schema for qcom,sdm845-mdss from dpu-sdm845.yaml to mdss.yaml so
> that the dpu file describes only the DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/dpu-sdm845.yaml | 135 ---
>
On Sun, 10 Jul 2022 12:00:35 +0300, Dmitry Baryshkov wrote:
> Move schema for qcom,sc7180-mdss from dpu-sc7180.yaml to mdss.yaml so
> that the dpu file describes only the DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/dpu-sc7180.yaml | 149 +
On Sun, 10 Jul 2022 12:00:36 +0300, Dmitry Baryshkov wrote:
> Move schema for qcom,sc7280-mdss from dpu-sc7280.yaml to mdss.yaml so
> that the dpu file describes only the DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/dpu-sc7280.yaml | 148 +
On Sun, 10 Jul 2022 12:00:37 +0300, Dmitry Baryshkov wrote:
> Move schema for qcom,qcm2290-mdss from dpu-qcm2290.yaml to mdss.yaml so
> that the dpu file describes only the DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/dpu-qcm2290.yaml | 140 +--
On Sun, 10 Jul 2022 12:00:38 +0300, Dmitry Baryshkov wrote:
> Move schema for qcom,msm8998-mdss from dpu-msm8998.yaml to mdss.yaml so
> that the dpu file describes only the DPU schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/dpu-msm8998.yaml | 142 +--
On Sun, 10 Jul 2022 12:00:39 +0300, Dmitry Baryshkov wrote:
> Add gcc-bus clock required for the SDM845 DPU device tree node. This
> change was made in the commit 111c52854102 ("arm64: dts: qcom: sdm845:
> move bus clock to mdp node for sdm845 target"), but was not reflected in
> the schema.
>
> S
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