From: Benjamin Gaignard
Define a new compatible for rk3568 HDMI.
This version of HDMI hardware block needs two new clocks hclk_vio and hclk
to provide phy reference clocks.
Signed-off-by: Benjamin Gaignard
Reviewed-by: Rob Herring
Signed-off-by: Sascha Hauer
---
.../devicetree/bindings/displ
The RK3568 has HDMI_TX_AVDD0V9 and HDMI_TX_AVDD_1V8 supply inputs needed
for the HDMI port. add support for these to the driver for boards which
have them supplied by switchable regulators.
Signed-off-by: Sascha Hauer
Reviewed-by: Dmitry Osipenko
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
Whenever pclk_vo is enabled hclk_vo must be enabled as well. This is
described in the Reference Manual as:
| 2.8.6 NIU Clock gating reliance
|
| A part of niu clocks have a dependence on another niu clock in order to
| sharing the internal bus. When these clocks are in use, another niu
| clock mus
The VOP2 has an interface mux which decides to which encoder(s) a CRTC
is routed to. The encoders and CRTCs are connected via of_graphs in the
device tree. When given an encoder the VOP2 driver needs to know to
which internal register setting this encoder matches. For this the VOP2
binding offers d
From: Michael Riesch
Enable the RK356x Video Output Processor (VOP) 2 on the Pine64
Quartz64 Model A.
Signed-off-by: Michael Riesch
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v5:
- Drop reg property from single endpoint node
Changes since v4:
- Sort nodes alphab
The VOP2 is the display output controller on the RK3568. Add the node
for it to the dtsi file along with the required display-subsystem node
and the iommu node.
Signed-off-by: Sascha Hauer
Acked-by: Rob Herring
---
Notes:
Changes since v6:
- Change RK3568_ prefix to ROCKCHIP_ prefix
From: Andy Yan
The VOP2 unit is found on Rockchip SoCs beginning with rk3566/rk3568.
It replaces the VOP unit found in the older Rockchip SoCs.
This driver has been derived from the downstream Rockchip Kernel and
heavily modified:
- All nonstandard DRM properties have been removed
- dropped str
This enabled the VOP2 display controller along with hdmi and the
required port routes which is enough to get a picture out of the
hdmi port of the board.
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v5:
- Drop reg property from single endpoint node
Changes since v4:
None of the upstream device tree files has a "unwedge" pinctrl
specified. Make it optional.
Signed-off-by: Sascha Hauer
Acked-by: Rob Herring
---
Notes:
Changes since v4:
- Add Robs Ack
.../devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml | 1 +
1 file changed, 1 insertion
The reference clock for the HDMI controller has been renamed to 'ref',
the previous 'vpll' name is only left for compatibility in the driver.
Rename the clock to the new name.
Signed-off-by: Sascha Hauer
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 delet
The driver checks if the pixel clock of the given mode matches an entry
in the mpll config table. The frequencies in the mpll table are meant as
a frequency range up to which the entry works, not as a frequency that
must match the pixel clock. Return MODE_OK when the pixelclock is
smaller than one
"vpll" is a misnomer. A clock input to a device should be named after
the usage in the device, not after the clock that drives it. On the
rk3568 the same clock is driven by the HPLL.
To fix that, this patch renames the vpll clock to ref clock. The clock
name "vpll" is left for compatibility to old
From: Nickey Yang
add 594Mhz configuration parameters in rockchip_phy_config
Signed-off-by: Nickey Yang
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v3:
- new patch
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/dr
Current port description doesn't cover all possible cases. It currently
expects one single port with two endpoints.
When the HDMI connector is described in the device tree there can be two
ports, first one going to the VOP and the second one going to the connector.
Also on SoCs which only have a
"vpll" is a misnomer. A clock input to a device should be named after
the usage in the device, not after the clock that drives it. On the
rk3568 the same clock is driven by the HPLL.
This patch adds "ref" as a new alternative clock name for "vpll"
Signed-off-by: Sascha Hauer
Acked-by: Rob Herring
From: Douglas Anderson
The previous tables for mpll_cfg and curr_ctrl were created using the
20-pages of example settings provided by the PHY vendor. Those
example settings weren't particularly dense, so there were places
where we were guessing what the settings would be for 10-bit and
12-bit (n
The VOP2 driver needs rockchip specific information for a drm_encoder.
This patch creates a struct rockchip_encoder with a struct drm_encoder
embedded in it. This is used throughout the rockchip driver instead of
struct drm_encoder directly.
The information the VOP2 drivers needs is the of_graph
From: Douglas Anderson
Jitter was improved by lowering the MPLL bandwidth to account for high
frequency noise in the rk3288 PLL. In each case MPLL bandwidth was
lowered only enough to get us a comfortable margin. We believe that
lowering the bandwidth like this is safe given sufficient testing.
Add support for the HDMI port found on RK3568.
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v7:
- Rename hclk to niu
Changes since v5:
- Drop unnecessary #size-cells/#address-cells from nodes with only single
endpoint
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 32
From: Michael Riesch
Enable the RK356x Video Output Processor (VOP) 2 on the Radxa
ROCK3 Model A.
Signed-off-by: Michael Riesch
Reported-by: kernel test robot
Link:
https://lore.kernel.org/r/20220310210352.451136-4-michael.rie...@wolfvision.net
Signed-off-by: Sascha Hauer
---
Notes:
Cha
Add a new dw_hdmi_plat_data struct and new compatible for rk3568.
Signed-off-by: Benjamin Gaignard
Signed-off-by: Sascha Hauer
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 31 +
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
With upcoming VOP2 support VOP won't be the only choice anymore, so make
the VOP driver optional.
This also adds a dependency from ROCKCHIP_ANALOGIX_DP to ROCKCHIP_VOP,
because that driver currently only links and works with the VOP driver.
Signed-off-by: Sascha Hauer
---
Notes:
Changes sin
The RK3568 has HDMI_TX_AVDD0V9 and HDMI_TX_AVDD_1V8 supply inputs
needed for the HDMI port. Add the binding for these supplies.
Signed-off-by: Sascha Hauer
Acked-by: Rob Herring
---
Notes:
Changes since v4:
- Add Robs Ack
.../bindings/display/rockchip/rockchip,dw-hdmi.yaml | 11
The VOP2 is found on newer Rockchip SoCs like the rk3568 or the rk3566.
The binding differs slightly from the existing VOP binding, so add a new
binding file for it.
Signed-off-by: Sascha Hauer
Reviewed-by: Rob Herring
---
Notes:
Changes since v5:
- Add Robs Reviewed-by:
Change
It's v11 time. There's only one small change to v10. Discussion seems to
have settled now. Is there anything left that prevents the series from
being merged? I'd really like to have it in during the next merge
window.
This series still depends on:
drm/rockchip: Refactor IOMMU initialisation
(http
Am 21.04.22 um 23:13 schrieb Zack Rusin:
On Thu, 2022-04-21 at 12:17 +0200, Christian König wrote:
⚠ External Email
Am 20.04.22 um 21:28 schrieb Zack Rusin:
[SNIP]
To figure out what it is could you try the following code
fragment:
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_validation.c
b/dr
Hi Biju,
On Thu, Apr 21, 2022 at 6:31 PM Biju Das wrote:
> The RZ/G2L LCD controller is composed of Frame Compression Processor
> (FCPVD), Video Signal Processor (VSPD), and Display Unit (DU).
>
> The DU module supports the following hardware features
> − Display Parallel Interface (DPI) and MIPI
This series will add a support to attach & set the vrr_enabled property
for crtc based on the platform support and the request from userspace.
And userspace can also query to get the status of "vrr_enabled".
Test-with: 20220422075223.2792586-2-bhanuprakash.mo...@intel.com
Bhanuprakash Modem (2):
Modern display hardware is capable of supporting variable refresh rates.
This patch introduces helpers to attach and set "vrr_enabled" property
on the crtc to allow userspace to query VRR enabled status on that crtc.
Atomic drivers should attach this property to crtcs those are capable of
driving
This function attaches & sets the vrr_enabled property for crtc
based on the platform support and the request from userspace.
Cc: Ville Syrjälä
Cc: Manasi Navare
Signed-off-by: Bhanuprakash Modem
---
drivers/gpu/drm/i915/display/intel_crtc.c | 3 +++
drivers/gpu/drm/i915/display/intel_vrr.c |
Hi
On 4/21/22 09:13, Paul Kocialkowski wrote:
> Hi,
>
> On Wed 20 Apr 22, 16:19, Bjorn Andersson wrote:
>> On Wed 20 Apr 16:12 PDT 2022, Bjorn Andersson wrote:
>>
>> Sorry, I missed Jagan and Linus, author and reviewer of the reverted
>> patch 2, among the recipients.
> I'd be curious to have Jaga
On Mon, Apr 18, 2022 at 02:31:38PM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> On Thu, Apr 14, 2022 at 10:27 AM Xin Ji wrote:
> >
> > On Wed, Apr 13, 2022 at 04:28:51PM +0200, Robert Foss wrote:
> > > On Sat, 9 Apr 2022 at 06:47, Xin Ji wrote:
> > > >
> > > > On Mon, Apr 04, 2022 at 12:52:14PM -0500, R
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH v3 1/4] dt-bindings: display: Document Renesas RZ/G2L
> DU bindings
>
> Hi Biju,
>
> On Thu, Apr 21, 2022 at 6:31 PM Biju Das
> wrote:
> > The RZ/G2L LCD controller is composed of Frame Compression Processor
> > (FCPVD), Video Signal Pro
Hi Biju,
On Fri, Apr 22, 2022 at 10:11 AM Biju Das wrote:
> > Subject: Re: [PATCH v3 1/4] dt-bindings: display: Document Renesas RZ/G2L
> > DU bindings
> > On Thu, Apr 21, 2022 at 6:31 PM Biju Das
> > wrote:
> > > The RZ/G2L LCD controller is composed of Frame Compression Processor
> > > (FCPVD)
Hi
Am 21.04.22 um 23:59 schrieb Marek Vasut:
Hello all,
could either of you please have a look at these two panel patches ?
It is yet another DPI panel, but I would like to get some AB/RB on it
before applying.
https://patchwork.freedesktop.org/patch/482306/
https://patchwork.freedesktop.org
On 2022-04-21 at 19:07:29 +0530, Hellstrom, Thomas wrote:
> On Thu, 2022-04-21 at 17:08 +0530, Ramalingam C wrote:
> > Capture the eviction details for Flat-CCS capable lmem only objects
> > and
> > lmem objects with smem residency. This also captures the impact of
> > eviction on object's memory
Hi Daniel, Dave,
Here's this week drm-misc-fixes PR.
The two reverts for devm_drm_of_get_bridge are likely to bring more
reverts in the future.
Indeed, it introduced some code to fetch the panel automatically on
device tree child nodes as well, but that broke any driver with a child
node that wa
Hi Biju,
On Thu, Apr 21, 2022 at 6:31 PM Biju Das wrote:
> Fix typo rcar_du_vsp.h->rcar_du_vsp.c
>
> Signed-off-by: Biju Das
Thanks for your patch!
> --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2
Add 'bus-type' and 'data-lanes' define, bus-type 7 for MIPI DPI
input, others for DSI input.
Signed-off-by: Xin Ji
---
V1 -> V2: rebase on the latest code.
---
.../display/bridge/analogix,anx7625.yaml | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git
a/
As V4L2_FWNODE_BUS_TYPE_PARALLEL not properly descript for DPI
interface, this patch use new defined V4L2_FWNODE_BUS_TYPE_DPI for it.
Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add MIPI DPI input feature")
Signed-off-by: Xin Ji
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 8
1 file c
From: Lv Ruyi
The irq_of_parse_and_map() function returns 0 on failure, and does not
return an negative value.
Fixes: 8ede2ecc3e5e ("drm/msm/dp: Add DP compliance tests on Snapdragon
Chipsets")
Reported-by: Zeal Robot
Signed-off-by: Lv Ruyi
---
drivers/gpu/drm/msm/dp/dp_display.c | 2 +-
1
From: Lv Ruyi
The irq_of_parse_and_map() function returns 0 on failure, and does not
return an negative value.
Reported-by: Zeal Robot
Signed-off-by: Lv Ruyi
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/di
This series adds support for generic eDP panel over aux_bus.
These changes are dependent on the following patches:
https://patchwork.kernel.org/project/linux-arm-msm/patch/20220211224006.1797846-5-dmitry.barysh...@linaro.org/
https://patchwork.kernel.org/project/linux-arm-msm/patch/20220211224006.
This patch adds support for generic eDP sink through aux_bus. The eDP/DP
controller driver should support aux transactions originating from the
panel-edp driver and hence should be initialized and ready.
The panel bridge supporting the panel should be ready before the bridge
connector is initializ
The panel-edp enables the eDP panel power during probe, get_modes
and pre-enable. The eDP connect and disconnect interrupts for the eDP/DP
controller are directly dependent on panel power. As eDP display can be
assumed as always connected, the controller driver can skip the eDP
connect and disconne
The source device should ensure the sink is ready before proceeding to
read the sink capability or perform any aux transactions. The sink
will indicate its readiness by asserting the HPD line. The controller
driver needs to wait for the hpd line to be asserted by the sink before
it performs any aux
The eDP controller does not have a reliable way keep panel
powered on to read the sink capabilities. So, the controller
driver cannot validate if a mode can be supported by the
source. We will rely on the panel driver to populate only
the supported modes for now.
Signed-off-by: Sankeerth Billakant
When resources are allocated dynamically during an IOCTL we need to make sure
that a fence slot is reserved so that the resulting fence can be added in the
end.
Signed-off-by: Christian König
Fixes: c8d4c18bfbc4 ("dma-buf/drivers: make reserving a shared slot mandatory
v4")
---
drivers/gpu/drm/
Am 22.04.22 um 11:20 schrieb Christian König:
When resources are allocated dynamically during an IOCTL we need to make sure
that a fence slot is reserved so that the resulting fence can be added in the
end.
I should probably add that this is only compile tested.
Zack you should probably give i
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH v3 1/4] dt-bindings: display: Document Renesas RZ/G2L
> DU bindings
>
> Hi Biju,
>
> On Fri, Apr 22, 2022 at 10:11 AM Biju Das
> wrote:
> > > Subject: Re: [PATCH v3 1/4] dt-bindings: display: Document Renesas
> > > RZ/G2L DU bindings On
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH v3 2/4] drm: rcar-du: Fix typo
>
> Hi Biju,
>
> On Thu, Apr 21, 2022 at 6:31 PM Biju Das
> wrote:
> > Fix typo rcar_du_vsp.h->rcar_du_vsp.c
> >
> > Signed-off-by: Biju Das
>
> Thanks for your patch!
>
> > --- a/drivers/gpu/drm/rcar-du
Add DataImage FG040346DSSWBG04 4.3" 480x272 TFT LCD 24bit DPI panel
support.
Acked-by: Thomas Zimmermann
Signed-off-by: Marek Vasut
Cc: Sam Ravnborg
Cc: Thomas Zimmermann
To: dri-devel@lists.freedesktop.org
---
V2: Add AB from Thomas
---
drivers/gpu/drm/panel/panel-simple.c | 28 +
Add DataImage FG040346DSSWBG04 4.3" 480x272 TFT LCD 24bit DPI panel
compatible string.
Acked-by: Thomas Zimmermann
Signed-off-by: Marek Vasut
Cc: Rob Herring
Cc: Sam Ravnborg
Cc: Thomas Zimmermann
Cc: devicet...@vger.kernel.org
To: dri-devel@lists.freedesktop.org
---
V2: Add AB from Thomas
--
On 4/22/22 10:37, Thomas Zimmermann wrote:
Hi
Am 21.04.22 um 23:59 schrieb Marek Vasut:
Hello all,
could either of you please have a look at these two panel patches ?
It is yet another DPI panel, but I would like to get some AB/RB on it
before applying.
https://patchwork.freedesktop.org/pat
On Fri, 22 Apr 2022 at 04:59, Abhinav Kumar wrote:
>
>
>
> On 4/21/2022 5:22 PM, Dmitry Baryshkov wrote:
> > On Fri, 22 Apr 2022 at 02:07, Abhinav Kumar
> > wrote:
> >>
> >> Hi Dmitry
> >>
> >> Thanks for the review.
> >>
> >> One question below.
> >>
> >> On 4/21/2022 3:40 PM, Dmitry Baryshkov
On Fri, 22 Apr 2022 at 06:10, Yang Yingliang wrote:
>
> It will cause null-ptr-deref if platform_get_resource_byname() returns NULL,
> we need check the return value.
>
> Fixes: c6a57a50ad56 ("drm/msm/hdmi: add hdmi hdcp support (V3)")
> Signed-off-by: Yang Yingliang
Reviewed-by: Dmitry Baryshko
On Fri, 22 Apr 2022 at 11:50, wrote:
>
> From: Lv Ruyi
>
> The irq_of_parse_and_map() function returns 0 on failure, and does not
> return an negative value.
>
> Fixes: 8ede2ecc3e5e ("drm/msm/dp: Add DP compliance tests on Snapdragon
> Chipsets")
> Reported-by: Zeal Robot
> Signed-off-by: Lv R
On Fri, 22 Apr 2022 at 11:52, wrote:
>
> From: Lv Ruyi
>
> The irq_of_parse_and_map() function returns 0 on failure, and does not
> return an negative value.
>
> Reported-by: Zeal Robot
> Signed-off-by: Lv Ruyi
Reviewed-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c |
On Thu, 21 Apr 2022 19:07:25 +0200, José Expósito wrote:
> Once EDID is parsed, the monitor HDMI support information is available
> through drm_display_info.is_hdmi.
>
> This driver calls drm_detect_hdmi_monitor() to receive the same
> information and stores its own cached value, which is less eff
Hi,
On Mon, Mar 28, 2022 at 12:39:06AM +0200, Guillaume Ranquet wrote:
> From: Markus Schneider-Pargmann
>
> DP_INTF is similar to DPI but does not have the exact same feature set
> or register layouts.
>
> DP_INTF is the sink of the display pipeline that is connected to the
> DisplayPort contr
On 16/04/2022 04:07, Nancy.Lin wrote:
MT8195 vdosys1 has more than 32 reset bits and a different reset base
than other chips. Modify mmsys for support 64 bit and different reset
base.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/soc/mediatek/mt8195-mmsys.h
On 16/04/2022 04:07, Nancy.Lin wrote:
Add cmdq support for mtk-mmsys config API.
The mmsys config register settings need to take effect with the other
HW settings(like OVL_ADAPTOR...) at the same vblanking time.
If we use CPU to write the mmsys reg, we can't guarantee all the
settings can be
On 16/04/2022 04:07, Nancy.Lin wrote:
Add merge start/stop API for cmdq support. The ovl_adaptor merges
are configured with each drm plane update. Need to enable/disable
merge with cmdq making sure all the settings taken effect in the
same vblank.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-K
Hello Thomas,
On 4/21/22 20:17, Thomas Zimmermann wrote:
> Not all possible format conversions are supported yet. Print a
> warning on unsupported combinations.
>
> Signed-off-by: Thomas Zimmermann
> ---
Reviewed-by: Javier Martinez Canillas
--
Best regards,
Javier Martinez Canillas
Linux E
On 4/21/22 20:17, Thomas Zimmermann wrote:
> Add a format helper that converts RGB888 to XRGB. Use this
> function in drm_fb_blit_toio(). Fixes simpledrm output for this
> combination of formats.
>
I think the examples you have in the cover letter are quite illustrative,
maybe I would mention
On 4/21/22 20:17, Thomas Zimmermann wrote:
> Add a format helper that converts RGB565 to XRGB. Use this
> function in drm_fb_blit_toio(). Fixes simpledrm output for this
> combination of formats.
>
> Signed-off-by: Thomas Zimmermann
> ---
> drivers/gpu/drm/drm_format_helper.c | 46 +++
On 19/04/2022 11:41, jason-jh.lin wrote:
1. Add mt8195 mmsys compatible for 2 vdosys.
2. Add io_start into each driver data of mt8195 vdosys.
3. Add get match data function to identify mmsys by io_start.
4. Add mt8195 routing table settings of vdosys0.
Signed-off-by: jason-jh.lin
Reviewed-by
On 19/04/2022 11:41, jason-jh.lin wrote:
Add mtk-mutex support for mt8195 vdosys0.
Signed-off-by: jason-jh.lin
Acked-by: AngeloGioacchino Del Regno
Tested-by: Fei Shao
Applied thanks!
Matthias
---
drivers/soc/mediatek/mtk-mutex.c | 87 ++--
1 file change
On 22/04/2022 04:32, Jason-JH Lin wrote:
Hi CK,
Thanks for the reviews.
On Thu, 2022-04-21 at 14:50 +0800, CK Hu wrote:
Hi, Jason:
On Tue, 2022-04-19 at 17:41 +0800, jason-jh.lin wrote:
Add mtk-mutex support for mt8195 vdosys0.
Signed-off-by: jason-jh.lin
Acked-by: AngeloGioacchino Del
On 19/04/2022 11:41, jason-jh.lin wrote:
The mmsys routing table of mt8195 vdosys0 has 2 DITHER components,
so mmsys need to add DDP_COMPONENT_DITHER1 and change all usages of
DITHER enum form DDP_COMPONENT_DITHER to DDP_COMPONENT_DITHER0.
But its header need to keep DDP_COMPONENT_DITHER enum
Il 22/04/22 10:52, cgel@gmail.com ha scritto:
From: Lv Ruyi
The irq_of_parse_and_map() function returns 0 on failure, and does not
return an negative value.
Reported-by: Zeal Robot
Signed-off-by: Lv Ruyi
Reviewed-by: AngeloGioacchino Del Regno
On 19/04/2022 11:41, jason-jh.lin wrote:
After mmsys and drm change DITHER enum to DDP_COMPONENT_DITHER0,
mmsys header can remove the useless DDP_COMPONENT_DITHER enum.
Signed-off-by: jason-jh.lin
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Matthias Brugger
Chun-Kuang, I think it
On 21/04/2022 15:14, Robert Foss wrote:
it6505 depends on DRM_DP_AUX_BUS, the kconfig for it6505 should
reflect this dependency using 'select'.
Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver")
Reported-by: kernel test robot
Suggested-by: Randy Dunlap
Signed-off-by: Robert Foss
---
driv
Applied to drm-misc-next.
On Fri, 22 Apr 2022 at 10:49, Xin Ji wrote:
>
> As V4L2_FWNODE_BUS_TYPE_PARALLEL not properly descript for DPI
> interface, this patch use new defined V4L2_FWNODE_BUS_TYPE_DPI for it.
>
> Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add MIPI DPI input feature")
> Signed-off-by: Xin Ji
> ---
> driv
Hi,
On Fri, Apr 22, 2022 at 2:11 AM Sankeerth Billakanti
wrote:
>
> This patch adds support for generic eDP sink through aux_bus. The eDP/DP
> controller driver should support aux transactions originating from the
> panel-edp driver and hence should be initialized and ready.
>
> The panel bridge
On Fri, 22 Apr 2022 at 10:48, Xin Ji wrote:
>
> Add 'bus-type' and 'data-lanes' define, bus-type 7 for MIPI DPI
> input, others for DSI input.
>
> Signed-off-by: Xin Ji
>
> ---
> V1 -> V2: rebase on the latest code.
> ---
> .../display/bridge/analogix,anx7625.yaml | 19 ++-
>
Hi,
On Fri, Apr 22, 2022 at 2:11 AM Sankeerth Billakanti
wrote:
>
> The panel-edp enables the eDP panel power during probe, get_modes
> and pre-enable. The eDP connect and disconnect interrupts for the eDP/DP
> controller are directly dependent on panel power. As eDP display can be
> assumed as a
Acked-by: Robert Foss
On Fri, 22 Apr 2022 at 16:01, Robert Foss wrote:
>
> On Fri, 22 Apr 2022 at 10:49, Xin Ji wrote:
> >
> > As V4L2_FWNODE_BUS_TYPE_PARALLEL not properly descript for DPI
> > interface, this patch use new defined V4L2_FWNODE_BUS_TYPE_DPI for it.
> >
> > Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add
On Tue, 19 Apr 2022 at 03:07, Liu Ying wrote:
>
> The Northwest Logic MIPI DSI host controller embedded in i.MX8qxp
> works with a Mixel MIPI DPHY + LVDS PHY combo to support either
> a MIPI DSI display or a LVDS display. So, this patch calls
> phy_set_mode() from nwl_dsi_mode_set() to set PHY mo
On 11/04/2022 05:58, Rex-BC Chen wrote:
The driver data of MT8183 and MT8173 are different.
The value of has_gamma for MT8173 is true while the value of MT8183 is
false. Therefore, the compatible of disp_aal for MT8183 is not suitable
for the compatible for MT8173.
Signed-off-by: Rex-BC Chen
On Sat, 19 Mar 2022 at 16:10, Alvin Šipraga wrote:
>
> From: Alvin Šipraga
>
> Like the ADV7533, the ADV7535 has an offset for the CEC register map,
> and it is the same value (ADV7533_REG_CEC_OFFSET = 0x70).
>
> Rather than testing for numerous chip types in the offset calculations
> throughout
On 04/21, Harry Wentland wrote:
>
>
> On 2022-04-21 15:20, Melissa Wen wrote:
> > On 04/21, Harry Wentland wrote:
> > >
> > >
> > > On 2022-04-21 10:37, Melissa Wen wrote:
> > > > Hi all,
> > > >
> > > > I'm examining how DRM color management properties (degamma, ctm, gamma)
> > > > are applie
On Sat, 19 Mar 2022 at 16:10, Alvin Šipraga wrote:
>
> From: Alvin Šipraga
>
> The ADV7511 family of bridges supports two modes for CEC RX: legacy and
> non-legacy mode. The only difference is whether the chip uses a single
> CEC RX buffer, or uses all three available RX buffers. Currently the
>
On Wed, Apr 20, 2022 at 11:52:18PM +, T.J. Mercier wrote:
> This patch series revisits the proposal for a GPU cgroup controller to
> track and limit memory allocations by various device/allocator
> subsystems. The patch series also contains a simple prototype to
> illustrate how Android intends
Hi Dave, Daniel,
More stuff for 5.19.
The following changes since commit d68cf992ded575928cf4ddf7c64faff0d8dcce14:
drm/amd/amdgpu: Remove static from variable in RLCG Reg RW (2022-04-14
15:29:20 -0400)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
Hi Biju,
On Fri, Apr 22, 2022 at 11:31 AM Biju Das wrote:
> > Subject: Re: [PATCH v3 1/4] dt-bindings: display: Document Renesas RZ/G2L
> > DU bindings
> > On Fri, Apr 22, 2022 at 10:11 AM Biju Das
> > wrote:
> > > > Subject: Re: [PATCH v3 1/4] dt-bindings: display: Document Renesas
> > > > RZ/G
Hi,
On Mon, Mar 21, 2022 at 8:27 PM Vinod Polimera
wrote:
>
> Set mdp clock to max clock rate during probe/bind sequence from the
> opp table so that rails are not at undetermined state. Since we do not
> know what will be the rate set in boot loader, it would be ideal to
> vote at max frequency.
On Wed, Apr 20, 2022 at 10:52:58AM +0200, Javier Martinez Canillas wrote:
> Hello,
>
> The patches in this series are mostly changes suggested by Daniel Vetter
> to fix some race conditions that exists between the fbdev core (fbmem)
> and sysfb with regard to device registration and removal.
>
>
Hi,
On Fri, Apr 22, 2022 at 2:11 AM Sankeerth Billakanti
wrote:
>
> The panel-edp enables the eDP panel power during probe, get_modes
> and pre-enable. The eDP connect and disconnect interrupts for the eDP/DP
> controller are directly dependent on panel power. As eDP display can be
> assumed as a
Hi Doug
For the lockdep error, the splat looks similar to what kuogee fixed
recently.
Can you please check if below patch is present in your tree?
https://patchwork.freedesktop.org/patch/481396/
Thanks
Abhinav
On 4/22/2022 8:55 AM, Doug Anderson wrote:
Hi,
On Fri, Apr 22, 2022 at 2:11 AM
Hi,
On Fri, Apr 22, 2022 at 9:05 AM Abhinav Kumar wrote:
>
> Hi Doug
>
> For the lockdep error, the splat looks similar to what kuogee fixed
> recently.
>
> Can you please check if below patch is present in your tree?
>
> https://patchwork.freedesktop.org/patch/481396/
Indeed I did have that in
On Fri, 2022-04-22 at 11:21 +0200, Christian König wrote:
> Am 22.04.22 um 11:20 schrieb Christian König:
> > When resources are allocated dynamically during an IOCTL we need to
> > make sure
> > that a fence slot is reserved so that the resulting fence can be
> > added in the
> > end.
>
> I shoul
From: Zack Rusin
The buffer objects created by cotables were missing fence reservations.
They are created from vmw_validation_res_validate which makes them miss
the ttm_eu_reserve_buffers which is called from vmw_validation_bo_reserve.
Cotables are the only resources which create a buffer object
Hi Chenyang,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v5.18-rc3 next-20220422]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--bas
Hi Chenyang,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v5.18-rc3 next-20220422]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--bas
On 2022-04-22 10:28, Melissa Wen wrote:
On 04/21, Harry Wentland wrote:
On 2022-04-21 15:20, Melissa Wen wrote:
On 04/21, Harry Wentland wrote:
On 2022-04-21 10:37, Melissa Wen wrote:
Hi all,
I'm examining how DRM color management properties (degamma, ctm, gamma)
are applied to AMD di
04097] [feeb000e] *pgd=
[1.404400] Internal error: Oops: 805 [#1] PREEMPT ARM
[1.404648] Modules linked in:
[1.404890] CPU: 0 PID: 22 Comm: pccardd Not tainted
5.18.0-rc3-next-20220422 #1
[1.405159] Hardware name: SHARP Borzoi
[1.405319] PC is at pcmcia_init_one+0xf8/0x2
Reviewed-by: Lyude Paul
Will push upstream in a moment
On Thu, 2022-04-21 at 09:30 -0400, Tom Rix wrote:
> Smatch reports this issue
> gv100.c:46:1: warning: symbol 'gv100_gsp' was not declared. Should it be
> static?
>
> gv100_gsp is only used in gv100.c so change its
> storage-class specifier
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