[AMD Official Use Only]
Hi Christian,
There is already a string comparison in the same function. I just reference
that to port this solution.
#define ACPI_AC_CLASS "ac_adapter"
static int amdgpu_acpi_event(struct notifier_block *nb,
unsigned long val,
On 3/24/22 18:21, Matthew Auld wrote:
We only need this when allocating device local-memory, where this
influences the drm_buddy. Currently there is some funny behaviour where
an "in limbo" system memory object is lacking the relevant placement
flags etc. before we first allocate the ttm_tt, le
On 3/24/22 18:21, Matthew Auld wrote:
Move the sanity check that both src and dst are never both system
memory, which should never happen on discrete, and likely means we have
a bug. The only exception is on integrated where we trigger this path in
the selftests.
Signed-off-by: Matthew Auld
C
Hi Ryan,
we should try to avoid that and if it isn't possible at least use some
constant like ACPI_AC_CLASS.
Could be that the information isn't available otherwise. Alex should
know more about that.
Regards,
Christian.
Am 25.03.22 um 08:09 schrieb Lin, Tsung-hua (Ryan):
[AMD Official Use
Once more a ping on this here.
It's fixing a warning with sync_files and is already tested.
Regards,
Christian.
Am 21.03.22 um 11:31 schrieb Christian König:
[Adding Daniel]
Just once more a ping for this.
It's an important bug fix and the end user already reported that it
works.
Regards,
Am 24.03.22 um 11:49 schrieb Cong Liu:
qxl use ioremap to map ram_header and rom, in the arm64 implementation,
the device is mapped as DEVICE_nGnRE, it can not support unaligned
access. and qxl is a virtual device, it can be treated more like RAM
than actual MMIO registers. use ioremap_wc() repla
Am 25.03.22 um 01:06 schrieb Sean Paul:
From: Sean Paul
ATOMIC and DRIVER log categories do not typically contain per-frame log
messages. This patch re-classifies some messages in amd to chattier
categories to keep ATOMIC/DRIVER quiet.
Signed-off-by: Sean Paul
Please use drm/amdgpu for the
On 24/03/2022 18:57, Jani Nikula wrote:
On Thu, 24 Mar 2022, Tvrtko Ursulin wrote:
On 24/03/2022 11:57, Jani Nikula wrote:
On Thu, 24 Mar 2022, Tvrtko Ursulin wrote:
On 24/03/2022 09:31, Jani Nikula wrote:
On Tue, 22 Mar 2022, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
...
Signed-off
qxl use ioremap to map ram_header and rom, in the arm64 implementation,
the device is mapped as DEVICE_nGnRE, it can not support unaligned
access. and qxl is a virtual device, it can be treated more like RAM
than actual MMIO registers. use ioremap_wc() replace it.
Signed-off-by: Cong Liu
---
dri
The value actual_pix_clk_100Hz is dereferencing pointer pix_clk_params
before pix_clk_params is being null checked. Fix this by assigning
pix_clk_params->requested_pix_clk_100hz to actual_pix_clk_100Hz only if
pix_clk_params is not NULL, otherwise just NULL.
Signed-off-by: Haowen Bai
---
drivers
The pointer edid_buf is dereferencing pointer edid before edid is being
null checked. Fix this by assigning edid->raw_edid to edid_buf only if
edid is not NULL, otherwise just NULL.
Signed-off-by: Haowen Bai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
1 file changed,
Hi Christian,Can you help explain more detail under what circumstances userspace mappingwill be problematic, you mean cached mappings also need adjustment infunction ttm_prot_from_caching?Regards,Cong.
主 题：Re: 回复: Re: 回复: Re: [PATCH v1 1/2] drm/qxl: replace ioremap by ioremap_cache on arm64
ok, thanks, a lot of our customer use qxl on x86 before, so it still needto supoort qxl on arm64.
Regards,Cong.
主 题：Re: 回复: Re: 回复: Re: 回复: Re: [PATCH v1 1/2] drm/qxl: replace ioremap by ioremap_cache on arm64
日 期：2022-03-24 18:26
发件人：Gerd Hoffmann
收
Hi,I didn't understand the mapping attribute mismatch issue methioned by Gerd, we nowuse HuaWei Kunpeng-920 machine and the qxl works fine, it is Armv8.2 architecture. In order to make qxl work properly on arm64, the other modification I made are onqemu.https://lore.kernel.org/all/20220318085931.3
kzalloc() is a memory allocation function which may return NULL.
It is better to check the return value of it to catch the error in time.
Signed-off-by: QintaoShen
---
drivers/gpu/drm/omapdrm/omap_crtc.c | 3 +++
drivers/gpu/drm/omapdrm/omap_irq.c | 3 +++
2 files changed, 6 insertions(+)
diff
WARNING: Statements should start on a tabstop
WARNING: Missing a blank line after declarations
Signed-off-by: Haowen Bai
---
drivers/gpu/drm/gma500/mid_bios.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/gma500/mid_bios.c
b/drivers/gpu/drm/gma500/mid
On 25/03/2022 00:37, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-03-23 02:25:38)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 38627ccf3068..ab8a35e09bc9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/
From: Tvrtko Ursulin
UAPI with absolutely no documentation should not have been added -
clarify blob format and content will be described externally.
Fixes: 78e1fb3112c0 ("drm/i915/uapi: Add query for hwconfig blob")
Signed-off-by: Tvrtko Ursulin
Co-developed-by: Jordan Justen
Cc: Jon Bloomfie
On Fri, Mar 25, 2022 at 08:22:29AM +0100, Christian König wrote:
> Hi Ryan,
>
> we should try to avoid that and if it isn't possible at least use some
> constant like ACPI_AC_CLASS.
>
> Could be that the information isn't available otherwise. Alex should know
> more about that.
I wonder whether
On Fri, Mar 25, 2022 at 09:49:16AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> UAPI with absolutely no documentation should not have been added -
> clarify blob format and content will be described externally.
>
> Fixes: 78e1fb3112c0 ("drm/i915/uapi: Add query for hwconfig blob")
> S
Am 25.03.22 um 10:49 schrieb Daniel Vetter:
On Fri, Mar 25, 2022 at 08:22:29AM +0100, Christian König wrote:
Hi Ryan,
we should try to avoid that and if it isn't possible at least use some
constant like ACPI_AC_CLASS.
Could be that the information isn't available otherwise. Alex should know
mo
On 3/25/2022 8:16 AM, Thomas Hellström wrote:
On 3/24/22 18:21, Matthew Auld wrote:
We only need this when allocating device local-memory, where this
influences the drm_buddy. Currently there is some funny behaviour where
an "in limbo" system memory object is lacking the relevant placement
fl
On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:
> Add a general purpose helper to deep dive into dma_fence_chain/dma_fence_array
> structures and iterate over all the fences in them.
>
> This is useful when we need to flatten out all fences in those structures.
>
> Signed-off-by:
On 3/25/2022 11:03 AM, Das, Nirmoy wrote:
Reviewed-by: Nirmoy Das
Sorry, I meant this r-b for the 2nd patch and for this one Acked-by:
Nirmoy Das
On Fri, Mar 25, 2022 at 11:03:54AM +0100, Daniel Vetter wrote:
> On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:
> > Add a general purpose helper to deep dive into
> > dma_fence_chain/dma_fence_array
> > structures and iterate over all the fences in them.
> >
> > This is useful w
Am 25.03.22 um 11:07 schrieb Daniel Vetter:
On Fri, Mar 25, 2022 at 11:03:54AM +0100, Daniel Vetter wrote:
On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:
Add a general purpose helper to deep dive into dma_fence_chain/dma_fence_array
structures and iterate over all the fences i
On Fri, Mar 11, 2022 at 12:02:44PM +0100, Christian König wrote:
> The dma_fence_chain containers can show up in sync_files as well resulting in
> warnings that those can't be added to dma_fence_array containers when merging
> multiple sync_files together.
>
> Solve this by using the dma_fence_unw
On Fri, Mar 25, 2022 at 11:10:15AM +0100, Christian König wrote:
> Am 25.03.22 um 11:07 schrieb Daniel Vetter:
> > On Fri, Mar 25, 2022 at 11:03:54AM +0100, Daniel Vetter wrote:
> > > On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:
> > > > Add a general purpose helper to deep dive
On Thu, Mar 24, 2022 at 09:36:50AM -0700, Abhinav Kumar wrote:
> Hi Liviu
Hello,
>
> Thanks for the response.
>
> On 3/24/2022 3:12 AM, Liviu Dudau wrote:
> > On Wed, Mar 23, 2022 at 11:28:56AM -0700, Abhinav Kumar wrote:
> > > Hi Liviu
> >
> > Hello,
> >
> > >
> > > Thanks for the review.
>
Am 25.03.22 um 11:13 schrieb Daniel Vetter:
On Fri, Mar 11, 2022 at 12:02:44PM +0100, Christian König wrote:
The dma_fence_chain containers can show up in sync_files as well resulting in
warnings that those can't be added to dma_fence_array containers when merging
multiple sync_files together.
Hi Maxime,
On 24/03/2022 16:23, Maxime Ripard wrote:
On Thu, Mar 24, 2022 at 03:43:42PM +0200, Laurent Pinchart wrote:
On Thu, Mar 24, 2022 at 09:18:19AM +0100, Maxime Ripard wrote:
On Wed, Mar 23, 2022 at 10:38:19PM +0200, Laurent Pinchart wrote:
Hi Maxime,
(CC'ing Sakari)
Thank you for th
On 25/03/2022 09:53, Daniel Vetter wrote:
On Fri, Mar 25, 2022 at 09:49:16AM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
UAPI with absolutely no documentation should not have been added -
clarify blob format and content will be described externally.
Fixes: 78e1fb3112c0 ("drm/i915/uapi
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
drivers/gpu
Display Stream Compression (DSC) compresses the display stream in host which
is later decoded by panel. This series enables this for Qualcomm msm driver.
This was tested on Google Pixel3 phone which use LGE SW43408 panel.
The changes include DSC data and hardware block enabling for DPU1 then
supp
When DSC is enabled, we need to get the DSC parameters from the panel
driver, so add a dsc parameter in panel to fetch and pass DSC
configuration for DSI panels to DPU encoder, which will enable and
then configure DSC hardware blocks accordingly.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhin
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Reviewed-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1/dpu_hw_
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 13 ++
drivers/gpu/drm/
This adds SDM845 DSC blocks into hw_catalog
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 20 +++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog
We need to configure the encoder for DSC configuration and calculate DSC
parameters for the given timing so this patch adds that support by
adding dpu_encoder_prep_dsc() which is invoked when DSC is enabled.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
From: Dmitry Baryshkov
DPU supports different topologies for the case when multiple INTFs are
being driven by the single phys_enc. The driver defaults to using 3DMux
in such cases. Don't use it if DSC merge is used instead.
Suggested-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
Signed-off
Later gens of hardware have DSC bits moved to hw_ctl, so configure these
bits so that DSC would work there as well
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 11 ++-
drivers/gpu/drm/msm/disp/dpu1/d
For DSC to work we typically need a 2,2,1 configuration. This should
suffice for resolutions up to 4k. For more resolutions like 8k this won't
work.
Also, it is better to use 2 LMs and DSC instances as half width results
in lesser power consumption as compared to single LM, DSC at full width.
The
This add the bits in RM to enable the DSC blocks
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 56 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
Add a mode valid callback for dsi_mgr for checking mode being valid in
case of DSC. For DSC the height and width needs to be multiple of slice,
so we check that here
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi.h |
Somehow documentation for num_dspp was missed, so add that
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/msm_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
inde
When DSC is enabled, we need to configure DSI registers accordingly and
configure the respective stream compression registers.
Add support to calculate the register setting based on DSC params and
timing information and configure these registers.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Vi
On Fri, 25 Mar 2022, Tvrtko Ursulin wrote:
> On 24/03/2022 18:57, Jani Nikula wrote:
>> On Thu, 24 Mar 2022, Tvrtko Ursulin wrote:
>>> On 24/03/2022 11:57, Jani Nikula wrote:
On Thu, 24 Mar 2022, Tvrtko Ursulin wrote:
> On 24/03/2022 09:31, Jani Nikula wrote:
>> On Tue, 22 Mar 2022,
These patches coninue work started by AngeloGioacchino Del Regno in the
previous cycle by further decoupling and dissecting MDSS and MDP drivers
probe/binding paths.
This removes code duplication between MDP5 and DPU1 MDSS drivers, by
merging them and moving to the top level.
Changes since v4:
-
Currently the msm platform driver is a multiplex handling several cases:
- headless GPU-only driver,
- MDP4 with flat device nodes,
- MDP5/DPU MDSS with all the nodes being children of MDSS node.
This results in not-so-perfect code, checking the hardware version
(MDP4/MDP5/DPU) in several places,
MDP5 and DPU1 both provide the driver handling the MDSS region, which
handles the irq domain and (incase of DPU1) adds some init for the UBWC
controller. Unify those two pieces of code into a common driver.
Reviewed-by: Abhinav Kumar
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
Let's make the match's data pointer a (sub-)driver's private data. The
only user currently is the msm_drm_init() function, using this data to
select kms_init callback. Pass this callback through the driver's
private data instead.
Reviewed-by: Stephen Boyd
Reviewed-by: Abhinav Kumar
Signed-off-by
The msm_mdss serves several roles at this moment. It provides IRQ domain
used by MDP5 and DPU drivers but it also serves as a component master
for both those usecases. MDP4 (which does not have separate MDSS device)
is the component master on it's own.
Remove this assymmetry and make both MDP5 and
Since now there is just one mdss subdriver, drop all the indirection,
make msm_mdss struct completely opaque (and defined inside msm_mdss.c)
and call mdss functions directly.
Reviewed-by: Abhinav Kumar
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.c
MSM DRM driver already allows one to compile out the DP or DSI support.
Add support for disabling other features like MDP4/MDP5/DPU drivers or
direct HDMI output support.
Suggested-by: Stephen Boyd
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Kconfig
On 25/03/2022 14:05, Vinod Koul wrote:
When DSC is enabled, we need to get the DSC parameters from the panel
driver, so add a dsc parameter in panel to fetch and pass DSC
configuration for DSI panels to DPU encoder, which will enable and
then configure DSC hardware blocks accordingly.
Signed-off
Remove accidental (?) EDID modification while parsing, and constify EDID
in most places during EDID parsing.
In the future I'll want more clarity on who modifies the EDID and where,
and I'll want the compiler to help.
The EDID is still mutable in places that do validity checking and try to
fix it
We'll want to keep the EDID immutable while parsing. Stop modifying the
EDID because of the quirks.
In theory, this does have userspace implications, but the userspace is
supposed to use the modes exposed via KMS API, not by parsing the EDID
directly.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
Use struct member access instead of direct offsets to avoid lots of
casts all over the place.
Use BUILD_BUG_ON() for sanity check.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 26 +++---
1 file changed, 15 insertions(+), 11 deletions(-)
dif
Use struct detailed_timing member access instead of direct offsets to
avoid casting.
Use BUILD_BUG_ON() for sanity check.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
Note: Why can we use range.formula.cvt.flags directly in is_rb() while
gtf2 functions check for range.flags == 0x02 first
Use struct detailed_timing member access instead of direct offsets to
avoid casting.
Use BUILD_BUG_ON() for sanity check.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 57 +-
1 file changed, 37 insertions(+), 20 deletions(-)
Start constifying the struct detailed_timing pointers being passed
around from bottom up.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 40 +++---
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/drm_
Moving one level higher, constify struct detailed_timing pointers in
callbacks.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 40 --
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/d
Finalize detailed timing parsing constness by making struct edid also
const in callbacks and closure.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 48 +++---
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/
Constify the first level of struct edid in detailed timing parsing. Also
switch to struct edid instead of u8.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 48 ++
1 file changed, 23 insertions(+), 25 deletions(-)
diff --git a/
With this, the remaining non-const parts are the ones that actually
modify the EDID, for example to fix corrupt EDID.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 21 +++--
include/drm/drm_edid.h | 10 +-
2 files changed, 16 insertion
Hi,
This series adds an atomic_print_state hook for drm_private_obj to ease the
debugging of driver-specific sub-classes, and adds one for vc4.
It also changes the call site of drm_atomic_print_new_state to make it more
consistent.
Let me know what you think,
Maxime
Changes from v1:
- Added D
The HVS state configuration is useful when debugging what's going on in
the vc4 hardware pipeline. Add an implementation of .atomic_print_state.
Acked-by: Daniel Vetter
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_kms.c | 17 +
1 file changed, 17 insertions(+)
diff
None of those helpers modify the pointed data, let's make them const.
Acked-by: Daniel Vetter
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_kms.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
i
On Fri, Mar 25, 2022 at 02:25:24PM +0200, Jani Nikula wrote:
> Use struct member access instead of direct offsets to avoid lots of
> casts all over the place.
>
> Use BUILD_BUG_ON() for sanity check.
>
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_edid.c | 26 +++
Am 25.03.22 um 11:17 schrieb Daniel Vetter:
On Fri, Mar 25, 2022 at 11:10:15AM +0100, Christian König wrote:
Am 25.03.22 um 11:07 schrieb Daniel Vetter:
On Fri, Mar 25, 2022 at 11:03:54AM +0100, Daniel Vetter wrote:
On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:
Add a genera
A number of drivers (amdgpu, komeda, vc4, etc.) leverage the
drm_private_state structure, but we don't have any infrastructure to
provide debugging like we do for the other components state. Let's add
an atomic_print_state hook to be consistent.
Reviewed-by: Daniel Vetter
Signed-off-by: Maxime Ri
On Fri, Mar 25, 2022 at 02:25:23PM +0200, Jani Nikula wrote:
> We'll want to keep the EDID immutable while parsing. Stop modifying the
> EDID because of the quirks.
>
> In theory, this does have userspace implications, but the userspace is
> supposed to use the modes exposed via KMS API, not by pa
Hi,
On Fri, Mar 25, 2022 at 10:18:31AM +0800, Zheng Bin wrote:
> If CONFIG_DRM_VC4=y, CONFIG_RASPBERRYPI_FIRMWARE=m, CONFIG_COMPILE_TEST=n,
> bulding fails:
>
> drivers/gpu/drm/vc4/vc4_drv.o: In function `vc4_drm_bind':
> vc4_drv.c:(.text+0x320): undefined reference to `rpi_firmware_get'
> vc4_dr
On Fri, Mar 25, 2022 at 02:25:25PM +0200, Jani Nikula wrote:
> Use struct detailed_timing member access instead of direct offsets to
> avoid casting.
>
> Use BUILD_BUG_ON() for sanity check.
>
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
>
> ---
>
> Note: Why can we use range.formula.cvt.
On Fri, Mar 25, 2022 at 2:27 AM Ryan Lin wrote:
>
> Disable ABM feature when the system is running on AC mode to get
> the more perfect contrast of the display.
>
> Signed-off-by: Ryan Lin
>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 4 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_device
> -Original Message-
> From: Stephen Boyd
> Sent: Friday, March 18, 2022 2:58 AM
> To: Sankeerth Billakanti (QUIC) ;
> devicet...@vger.kernel.org; dri-devel@lists.freedesktop.org;
> freedr...@lists.freedesktop.org; linux-arm-...@vger.kernel.org; linux-
> ker...@vger.kernel.org
> Cc: robd
> -Original Message-
> From: Doug Anderson
> Sent: Friday, March 18, 2022 10:51 PM
> To: Sankeerth Billakanti (QUIC)
> Cc: dri-devel ; linux-arm-msm m...@vger.kernel.org>; freedreno ;
> LKML ; open list:OPEN FIRMWARE AND
> FLATTENED DEVICE TREE BINDINGS ; Rob Clark
> ; Sean Paul ; Step
Hi,
On Fri, Mar 25, 2022 at 6:41 AM Sankeerth Billakanti (QUIC)
wrote:
>
> > -Original Message-
> > From: Doug Anderson
> > Sent: Friday, March 18, 2022 10:51 PM
> > To: Sankeerth Billakanti (QUIC)
> > Cc: dri-devel ; linux-arm-msm > m...@vger.kernel.org>; freedreno ;
> > LKML ; open l
Hi Lyude,
On Mon, Mar 14, 2022 at 06:16:36PM -0400, Lyude Paul wrote:
> Hi! First a little bit of background: I've recently been trying to get rid of
> all of the non-atomic payload bandwidth management code in the MST helpers in
> order to make it easier to implement DSC and fallback link rate re
> -Original Message-
> From: Stephen Boyd
> Sent: Friday, March 18, 2022 2:53 AM
> To: Sankeerth Billakanti (QUIC) ;
> devicet...@vger.kernel.org; dri-devel@lists.freedesktop.org;
> freedr...@lists.freedesktop.org; linux-arm-...@vger.kernel.org; linux-
> ker...@vger.kernel.org
> Cc: robd
The DRM_UT_STATE controls whether we're calling
drm_atomic_print_new_state() whenever a new state is committed. However,
that call is made in the drm_mode_atomic_ioctl(), whereas we have
multiple users of the drm_atomic_commit() function in the kernel
(framebuffer emulation, drm_atomic_helper_dirty
> -Original Message-
> From: Stephen Boyd
> Sent: Friday, March 18, 2022 3:08 AM
> To: Sankeerth Billakanti (QUIC) ;
> devicet...@vger.kernel.org; dri-devel@lists.freedesktop.org;
> freedr...@lists.freedesktop.org; linux-arm-...@vger.kernel.org; linux-
> ker...@vger.kernel.org
> Cc: robd
Hi
Am 25.03.22 um 03:13 schrieb Dave Airlie:
Hi Linus,
Some fixes were queued up in and in light of the fbdev regressions,
I've pulled those in as well,
I think the mediatek one is going to be a bit more painful, since now
you have a merge and I need to have the mediatek stuff get rebased and
r
On 2022-03-25 00:05, Ryan Lin wrote:
> Disable ABM feature when the system is running on AC mode to get
> the more perfect contrast of the display.
It says patch 3 out of 25. Are there other patches? If so, I can't
find them in my mailbox and neither can patchwork
https://patchwork.freedesktop.
On 2022-03-24 20:06, Sean Paul wrote:
> From: Sean Paul
>
> ATOMIC and DRIVER log categories do not typically contain per-frame log
> messages. This patch re-classifies some messages in amd to chattier
> categories to keep ATOMIC/DRIVER quiet.
>
> Signed-off-by: Sean Paul
With the subject line
Hi Jagan,
On 03.03.2022 17:36, Jagan Teki wrote:
> Updated series about drm bridge conversion of exynos dsi.
>
> Previous version can be accessible, here [1].
>
> Patch 1: tc358764 panel_bridge API
>
> Patch 2: connector reset
>
> Patch 3: bridge attach in MIC
>
> Patch 4: panel_bridge API
>
> Pat
On 03.03.2022 17:36, Jagan Teki wrote:
> Replace the manual panel handling code by a drm panel_bridge via
> devm_drm_of_get_bridge().
>
> Adding panel_bridge handling,
>
> - Drops drm_connector and related operations as drm_bridge_attach
>creates connector during attachment.
>
> - Drops panel
On 03.03.2022 17:36, Jagan Teki wrote:
> Trigger hotplug event with drm_kms_helper_hotplug_event might fail if the
> connector state pointer is NULL.
>
> BUG observed in exynos dsi driver where drm_bridge_attach is trying to
> register
> a connector in panel_bridge before the hotplug event is tr
On 03.03.2022 17:36, Jagan Teki wrote:
> MIC drivers in the Exynos5433 display pipeline are already registered
> as bridge drivers and it is more advisable to attach the downstream
> bridge on the bridge attach call instead of doing the same in the
> DSI driver.
>
> This makes bridge attachment m
On 03.03.2022 17:36, Jagan Teki wrote:
> Replace the manual panel handling code by a drm panel_bridge via
> devm_drm_of_get_bridge().
>
> Adding panel_bridge handling,
>
> - Drops drm_connector and related operations as drm_bridge_attach
>creates connector during attachment.
>
> - Drops panel
On 03.03.2022 17:36, Jagan Teki wrote:
> Convert the encoders to bridge drivers in order to standardize on
> a single API with built-in dumb encoder support for compatibility
> with existing component drivers.
>
> Driver bridge conversion will help to reuse the same bridge on
> different platform
On 03.03.2022 17:36, Jagan Teki wrote:
> The new support drm bridges are moving towards atomic functions.
>
> Replace atomic version of functions to continue the transition
> to the atomic API.
>
> Signed-off-by: Jagan Teki
Acked-by: Marek Szyprowski
Tested-by: Marek Szyprowski
> ---
> Chan
Hello Philipp,
On 3/13/22 06:06, Philipp Sieweck wrote:
> The cases of vmw_user_bo_synccpu_grab failing with -ERESTARTSYS or -EBUSY
> are handled in vmw_user_bo_synccpu_ioctl by not printing an error message.
> However, the error value gets discarded, indicating success. This leads
> to rendering
On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:
> Add a general purpose helper to deep dive into dma_fence_chain/dma_fence_array
> structures and iterate over all the fences in them.
>
> This is useful when we need to flatten out all fences in those structures.
>
> Signed-off-by:
Am 25.03.22 um 16:25 schrieb Ville Syrjälä:
On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:
Add a general purpose helper to deep dive into dma_fence_chain/dma_fence_array
structures and iterate over all the fences in them.
This is useful when we need to flatten out all fences i
Thanks. Fixed up the title when I applied it.
Alex
On Fri, Mar 25, 2022 at 10:55 AM Harry Wentland wrote:
>
> On 2022-03-24 20:06, Sean Paul wrote:
> > From: Sean Paul
> >
> > ATOMIC and DRIVER log categories do not typically contain per-frame log
> > messages. This patch re-classifies some me
Looks like somebody is creating an empty dma_fence_array.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-fence-array.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/dma-buf/dma-fence-array.c
b/drivers/dma-buf/dma-fence-array.c
index 52b85d292383..5c8a7084577b 100644
-
Quoting Dmitry Baryshkov (2022-03-25 05:17:36)
> The msm_mdss serves several roles at this moment. It provides IRQ domain
> used by MDP5 and DPU drivers but it also serves as a component master
> for both those usecases. MDP4 (which does not have separate MDSS device)
> is the component master on i
> -Original Message-
> From: Doug Anderson
> Sent: Saturday, March 19, 2022 5:26 AM
> To: Stephen Boyd
> Cc: Sankeerth Billakanti (QUIC) ; open list:OPEN
> FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
> ; dri-devel ;
> freedreno ; linux-arm-msm m...@vger.kernel.org>; LKML ; Rob Clark
>
Dear Christian, dear Daniel, dear Alex,
Am 23.03.22 um 16:32 schrieb Christian König:
Am 23.03.22 um 16:24 schrieb Daniel Stone:
On Wed, 23 Mar 2022 at 15:14, Alex Deucher wrote:
On Wed, Mar 23, 2022 at 11:04 AM Daniel Stone
wrote:
That's not what anyone's saying here ...
No-one's demandi
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