> Wiadomość napisana przez Peter Geis w dniu 26.01.2022,
> o godz. 21:24:
>
> The hdmi-cec clock must be 32khz in order for cec to work correctly.
> Ensure after enabling the clock we set it in order for the hardware to
> work as expected.
> Warn on failure, in case this is a static clock tha
> Wiadomość napisana przez Peter Geis w dniu 13.03.2022,
> o godz. 13:56:
>
>>
>
> I was worried about that, thanks for testing it.
> Can you send me the cec_clk rate before and after this patch?
>
Here it is:
working:
enable prepare protect
This is a note to let you know that I've just added the patch titled
drm/panel: Select DRM_DP_HELPER for DRM_PANEL_EDP
to the 5.15-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-
This is a note to let you know that I've just added the patch titled
drm/panel: Select DRM_DP_HELPER for DRM_PANEL_EDP
to the 5.16-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-
On Sun, Mar 13, 2022 at 12:07:56AM +0300, Dmitry Osipenko wrote:
> On 3/11/22 11:33, Sascha Hauer wrote:
> > The rk3568 HDMI has an additional clock that needs to be enabled for the
> > HDMI controller to work. This clock is not needed for the HDMI
> > controller itself, but to make the SoC interna
On Sun, 13 Mar 2022, Lee Shawn C wrote:
> drm_find_cea_extension() always look for a top level CEA block. Pass
> ext_index from caller then this function to search next available
> CEA ext block from a specific EDID block pointer.
>
> v2: save proper extension block index if CTA data information
>
On 13.03.2022 20:29, Thomas Zimmermann wrote:
> Commit 0d03011894d2 ("fbdev: Improve performance of cfb_imageblit()")
> broke cfb_imageblit() for image widths that are not aligned to 8-bit
> boundaries. Fix this by handling the trailing pixels on each line
> separately. The performance improvements
Il 14/03/22 10:00, Rex-BC Chen ha scritto:
From: Yongqiang Niu
Add mmsys driver data and compatible for MT8186 in mtk_drm_drv.c.
Signed-off-by: Yongqiang Niu
Signed-off-by: Rex-BC Chen
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_drm_dr
Il 14/03/22 10:00, Rex-BC Chen ha scritto:
Add MT8186 SoC binding to AAL, CCORR, COLOR, DITHER, GAMMA, MUTEX,
OVL, POSTMASK and RDMA.
Signed-off-by: Rex-BC Chen
Reviewed-by: Rob Herring
Reviewed-by: AngeloGioacchino Del Regno
---
.../devicetree/bindings/display/mediatek/mediatek,aal.ya
Il 14/03/22 10:00, Rex-BC Chen ha scritto:
There won't be more than 1 fallback for these bindings, so we modify
them to use const instead of enum.
Signed-off-by: Rex-BC Chen
Reviewed-by: Rob Herring
Reviewed-by: AngeloGioacchino Del Regno
---
.../devicetree/bindings/display/mediatek/me
Il 14/03/22 10:00, Rex-BC Chen ha scritto:
All single entry cases in mutex can be merged as a single enum.
Signed-off-by: Rex-BC Chen
Reviewed-by: Rob Herring
Reviewed-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,mutex.yaml | 24 +++
1 file cha
Il 14/03/22 10:00, Rex-BC Chen ha scritto:
Add aal binding for MT8183.
Signed-off-by: Rex-BC Chen
Acked-by: Rob Herring
Reviewed-by: AngeloGioacchino Del Regno
---
.../devicetree/bindings/display/mediatek/mediatek,aal.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Do
Hi Daniel:
Remember you said our downstream vop2 driver is very slow on weston.
Would you please share the case you run ? or how can i test frame rate
on weston?
On 3/9/22 15:37, Andy Yan wrote:
Hi Daniel:
On 3/9/22 10:03, Andy Yan wrote:
Hi Daniel:
On 3/8/22 22:04, Daniel Stone wrote:
Just a gentle ping.
This series is an important fix for drm-misc-next-fixes.
Regards,
Christian.
Am 11.03.22 um 12:02 schrieb Christian König:
Add a general purpose helper to deep dive into dma_fence_chain/dma_fence_array
structures and iterate over all the fences in them.
This is useful when
On 11/03/2022 09:39, Daniel Vetter wrote:
On Mon, 7 Mar 2022 at 21:38, Vivek Kasireddy wrote:
On platforms capable of allowing 8K (7680 x 4320) modes, pinning 2 or
more framebuffers/scanout buffers results in only one that is mappable/
fenceable. Therefore, pageflipping between these 2 FBs w
From: CQ Tang
When system does not have mappable aperture, ggtt->mappable_end=0. In
this case if we pass PIN_MAPPABLE when pinning vma, the pinning code
will return -ENOSPC. So conditionally set PIN_MAPPABLE if HAS_GMCH().
Suggested-by: Chris P Wilson
Signed-off-by: CQ Tang
Cc: Radhakrishna Sr
On integrated it looks like the GGTT base should always 1:1 maps to
somewhere within DSM. On discrete the base seems to be pre-programmed with
a normal lmem address, and is not 1:1 mapped with the base address. On
such devices probe the lmem address directly from the PTE.
v2(Ville):
- The base i
Keep the behaviour consistent with normal lmem, where we assume CPU
access if by default required.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Acked-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i9
Add a generic interface for allocating an object at some specific
offset, and convert stolen over. Later we will want to hook this up to
different backends.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Acked-by: Nirmoy Das
---
.../drm/i915/display/intel_plane_initial.c| 4 +-
drivers/
From: Akeem G Abodunrin
On client platforms with reduced LMEM BAR, we should be able to continue
with driver load with reduced io_size. Instead of using the BAR size to
determine the how large stolen should be, we should instead use the
ADDR_RANGE register to figure this out(at least on platforms
For the ttm backend we can use existing placements fpfn and lpfn to
force the allocator to place the object at the requested offset,
potentially evicting stuff if the spot is currently occupied.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Acked-by: Nirmoy Das
---
.../gpu/drm/i915/gem/i915
Just pass along the probed io_size. The backend should be able to
utilize the entire range here, even if some of it is non-mappable.
It does leave open with what to do with stolen local-memory.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
Acked-by: Nirmoy Das
The leftover bits around dealing with stolen-local memory + small BAR, plus
some related fixes.
v2: some tweaks based on feedback from Ville
v3: directly probe the PTE to derive the physical offset within lmem
--
2.34.1
On 2022-03-13 12:56, Peter Geis wrote:
On Sun, Mar 13, 2022 at 6:13 AM Piotr Oniszczuk
wrote:
Wiadomość napisana przez Peter Geis w dniu 26.01.2022, o
godz. 21:24:
The hdmi-cec clock must be 32khz in order for cec to work correctly.
Ensure after enabling the clock we set it in order for
Various spelling mistakes in comments.
Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index c
Various spelling mistakes in comments.
Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall
---
drivers/gpu/drm/sti/sti_gdp.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c
index 3db3768a3241..b58
Various spelling mistakes in comments.
Detected with the help of Coccinelle.
---
drivers/base/devres.c |4 ++--
drivers/clk/qcom/gcc-sm6125.c |2 +-
drivers/clk/ti/clkctrl.c|2 +-
drivers/gpu/drm/amd/amdg
Various spelling mistakes in comments.
Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
b/drivers/gpu/drm/amd/amdgpu/amd
Various spelling mistakes in comments.
Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
b/driver
Various spelling mistakes in comments.
Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall
---
drivers/gpu/drm/amd/display/dc/bios/command_table.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table.c
b/dr
On Mon, Mar 14, 2022, 12:53 Julia Lawall wrote:
> Various spelling mistakes in comments.
> Detected with the help of Coccinelle.
>
> Signed-off-by: Julia Lawall
>
> ---
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c |4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff -
On 13.03.2022 20:45, Andi Shyti wrote:
Hi Andrzej,
I'm sorry, but I'm not fully understanding,
+struct intel_gt *intel_gt_sysfs_get_drvdata(struct device *dev,
+ const char *name)
+{
+ struct kobject *kobj = &dev->kobj;
+
+ /*
+*
From: Thomas Zimmermann
commit 3755d35ee1d2454b20b8a1e20d790e56201678a4 upstream.
As reported in [1], DRM_PANEL_EDP depends on DRM_DP_HELPER. Select
the option to fix the build failure. The error message is shown
below.
arm-linux-gnueabihf-ld: drivers/gpu/drm/panel/panel-edp.o: in function
From: Thomas Zimmermann
commit 3755d35ee1d2454b20b8a1e20d790e56201678a4 upstream.
As reported in [1], DRM_PANEL_EDP depends on DRM_DP_HELPER. Select
the option to fix the build failure. The error message is shown
below.
arm-linux-gnueabihf-ld: drivers/gpu/drm/panel/panel-edp.o: in function
Hi Rob and Linus,
On Mon, 7 Mar 2022 at 14:07, Naresh Kamboju wrote:
>
> Hi Rob,
>
> On Sun, 20 Feb 2022 at 00:02, Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > Avoid going down devfreq paths on devices where devfreq is not
> > initialized.
> >
> > Reported-by: Linux Kernel Functional Testin
Hi Sascha Hauer
From: Sascha Hauer
Date: 2022-03-11 16:33:21
To: dri-devel@lists.freedesktop.org
Cc:
linux-arm-ker...@lists.infradead.org,linux-rockc...@lists.infradead.org,devicet...@vger.kernel.org,ker...@pengutronix.de,Andy
Yan ,Benjamin Gaignard
,Michael Riesch
,Sandy Huang ,"Heiko
St
Hi Ilia,
On Tue, Mar 8, 2022 at 8:57 AM Geert Uytterhoeven wrote:
> On Mon, Mar 7, 2022 at 10:23 PM Ilia Mirkin wrote:
> > On Mon, Mar 7, 2022 at 3:53 PM Geert Uytterhoeven
> > wrote:
> > > diff --git a/tests/util/pattern.c b/tests/util/pattern.c
> > > index 953bf95492ee150c..42d75d700700dc3d
On Mon, Mar 7, 2022 at 9:53 PM Geert Uytterhoeven wrote:
> Introduce fourcc codes for color-indexed frame buffer formats with two,
> four, and sixteen colors, and provide a mapping from bit per pixel and
> depth to fourcc codes.
>
> As the number of bits per pixel is less than eight, these rely on
Hi Andy,
On Mon, 14 Mar 2022 at 11:02, Andy Yan wrote:
>Remember you said our downstream vop2 driver is very slow on weston.
>
> Would you please share the case you run ? or how can i test frame rate
> on weston?
We were able to observe this by just using either waylandsink (using
dmabuf fro
Hi Javier,
On Mon, Jan 31, 2022 at 9:12 PM Javier Martinez Canillas
wrote:
> Add support to convert 8-bit grayscale to reversed monochrome for drivers
> that control monochromatic displays, that only have 1 bit per pixel depth.
>
> This helper function was based on repaper_gray8_to_mono_reversed(
On Mon, Mar 14, 2022 at 9:07 AM Geert Uytterhoeven wrote:
>
> Hi Ilia,
>
> On Tue, Mar 8, 2022 at 8:57 AM Geert Uytterhoeven
> wrote:
> > On Mon, Mar 7, 2022 at 10:23 PM Ilia Mirkin wrote:
> > > On Mon, Mar 7, 2022 at 3:53 PM Geert Uytterhoeven
> > > wrote:
> > > > diff --git a/tests/util/pat
Hi,
On Fri, Mar 11, 2022 at 1:22 AM Dmitry Baryshkov
wrote:
>
> On Fri, 11 Mar 2022 at 11:06, Vinod Polimera
> wrote:
> >
> >
> >
> > > -Original Message-
> > > From: Stephen Boyd
> > > Sent: Wednesday, March 9, 2022 1:36 AM
> > > To: quic_vpolimer ;
> > > devicet...@vger.kernel.org; d
On 11.03.2022 10:40, Lucas De Marchi wrote:
> On Tue, Mar 08, 2022 at 10:17:42PM +0530, Balasubramani Vivekanandan wrote:
> > This patch is continuation of the effort to move all pointers in i915,
> > which at any point may be pointing to device memory or system memory, to
> > iosys_map interface.
Hi Ilia,
On Mon, Mar 14, 2022 at 2:44 PM Ilia Mirkin wrote:
> On Mon, Mar 14, 2022 at 9:07 AM Geert Uytterhoeven
> wrote:
> > On Tue, Mar 8, 2022 at 8:57 AM Geert Uytterhoeven
> > wrote:
> > > On Mon, Mar 7, 2022 at 10:23 PM Ilia Mirkin wrote:
> > > > On Mon, Mar 7, 2022 at 3:53 PM Geert Uyt
Hello Geert,
On 3/14/22 14:40, Geert Uytterhoeven wrote:
> Hi Javier,
>
> On Mon, Jan 31, 2022 at 9:12 PM Javier Martinez Canillas
> wrote:
>> Add support to convert 8-bit grayscale to reversed monochrome for drivers
>> that control monochromatic displays, that only have 1 bit per pixel depth.
>
devm_clk_get_enabled() returns a clock prepared and enabled and already
registers a devm exit handler to disable (and unprepare) the clock.
There is slight change in behavior as a failure to enable the clock
now results in an error message, too. Also the actual error code is added
to the message.
Allow to add an exit hook to devm managed clocks. Also use
clk_get_optional() in devm_clk_get_optional instead of open coding it.
The generalisation will be used in the next commit to add some more
devm_clk helpers.
Reviewed-by: Jonathan Cameron
Reviewed-by: Alexandru Ardelean
Signed-off-by: Uwe
When a driver keeps a clock prepared (or enabled) during the whole
lifetime of the driver, these helpers allow to simplify the drivers.
Reviewed-by: Jonathan Cameron
Reviewed-by: Alexandru Ardelean
Signed-off-by: Uwe Kleine-König
---
drivers/clk/clk-devres.c | 31 ++
include/linux/
Hello,
this is another try to convince the relevant people that
devm_clk_get_enabled() is a nice idea. Compared to v7 (back in May 2021) this
series is rebased to v5.17-rc8 and converts quite some drivers that open code
devm_clk_get_enabled() up to now (patches #3 - #11).
A concern about devm_clk
On Fri, Mar 11, 2022 at 3:30 AM Pekka Paalanen wrote:
>
> On Thu, 10 Mar 2022 11:56:41 -0800
> Rob Clark wrote:
>
> > For something like just notifying a compositor that a gpu crash
> > happened, perhaps drm_event is more suitable. See
> > virtio_gpu_fence_event_create() for an example of adding
Hi Laurent,
Thanks for the feedback.
> Subject: Re: [RFC 22/28] drm: rcar-du: Add RZ/G2L DSI driver
>
> Hi Biju,
>
> Thank you for the patch.
>
> On Wed, Jan 12, 2022 at 05:46:06PM +, Biju Das wrote:
> > This driver supports the MIPI DSI encoder found in the RZ/G2L SoC. It
> > currently su
On Mon, Mar 14, 2022 at 10:06 AM Geert Uytterhoeven
wrote:
>
> Hi Ilia,
>
> On Mon, Mar 14, 2022 at 2:44 PM Ilia Mirkin wrote:
> > On Mon, Mar 14, 2022 at 9:07 AM Geert Uytterhoeven
> > wrote:
> > > On Tue, Mar 8, 2022 at 8:57 AM Geert Uytterhoeven
> > > wrote:
> > > > On Mon, Mar 7, 2022 at
On Sun, 13 Mar 2022 13:38:51 +0100, Marek Vasut wrote:
> The i.MX8MP contains two syscon registers which are responsible
> for configuring the on-SoC DPI-to-LVDS serializer. Add DT binding
> which represents this serializer as a bridge.
>
> Signed-off-by: Marek Vasut
> Cc: Laurent Pinchart
> Cc:
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.
This patch is dependent on below patch
https://patchwork.kernel.org/patch/12774067/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 +
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.
This patch is dependent on below patch
https://patchwork.kernel.org/patch/12774067/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +
Drop the assigned clock rate property and vote on the mdp clock to max frequency
during bind/probe sequence.
Changes in v2:
- Remove assigned-clock-rate property and set mdp clk during resume sequence.
- Add fixes tag.
Changes in v3:
- Remove extra line after fixes tag.(Stephen Boyd)
- Add simila
use max clock during probe/bind sequence from the opp table.
The clock will be scaled down when framework sends an update.
Fixes: 25fdd5933("drm/msm: Add SDM845 DPU support")
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8
1 file changed, 8 insertions(+)
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.
This patch is dependent on below patch
https://patchwork.kernel.org/patch/12774067/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 +
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.
This patch is dependent on below patch
https://patchwork.kernel.org/patch/12774067/
Signed-off-by: Vinod Polimera
Reviewed-by: Stephen Boyd
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9
Hi Ilia,
On Mon, Mar 14, 2022 at 3:39 PM Ilia Mirkin wrote:
> On Mon, Mar 14, 2022 at 10:06 AM Geert Uytterhoeven
> wrote:
> > On Mon, Mar 14, 2022 at 2:44 PM Ilia Mirkin wrote:
> > > On Mon, Mar 14, 2022 at 9:07 AM Geert Uytterhoeven
> > > wrote:
> > > > On Tue, Mar 8, 2022 at 8:57 AM Geert
> -Original Message-
> From: Dmitry Baryshkov
> Sent: Tuesday, March 8, 2022 10:40 PM
> To: quic_vpolimer
> Cc: dri-devel@lists.freedesktop.org; linux-arm-...@vger.kernel.org;
> freedr...@lists.freedesktop.org; devicet...@vger.kernel.org; linux-
> ker...@vger.kernel.org; robdcl...@gmail
> -Original Message-
> From: Doug Anderson
> Sent: Thursday, March 10, 2022 12:55 AM
> To: quic_vpolimer
> Cc: dri-devel ; linux-arm-msm m...@vger.kernel.org>; freedreno ;
> open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
> ; LKML ; Rob
> Clark ; Stephen Boyd ;
> quic_kalyan
> -Original Message-
> From: Doug Anderson
> Sent: Monday, March 14, 2022 7:28 PM
> To: dmitry.barysh...@linaro.org
> Cc: Vinod Polimera ; Stephen Boyd
> ; quic_vpolimer ;
> devicet...@vger.kernel.org; dri-devel@lists.freedesktop.org;
> freedr...@lists.freedesktop.org; linux-arm-...@vger
Hi Julia
thanks for the patch.
Reviewed-by: Alain Volmat
Alain
On Mon, Mar 14, 2022 at 12:53:40PM +0100, Julia Lawall wrote:
> Various spelling mistakes in comments.
> Detected with the help of Coccinelle.
>
> Signed-off-by: Julia Lawall
>
> ---
> drivers/gpu/drm/sti/sti_gdp.c |2 +-
>
On Mon, 14 Mar 2022 14:30:18 +0100
Geert Uytterhoeven wrote:
> On Mon, Mar 7, 2022 at 9:53 PM Geert Uytterhoeven
> wrote:
> > Introduce fourcc codes for color-indexed frame buffer formats with two,
> > four, and sixteen colors, and provide a mapping from bit per pixel and
> > depth to fourcc co
On Mon, 14 Mar 2022 10:23:27 -0400
Alex Deucher wrote:
> On Fri, Mar 11, 2022 at 3:30 AM Pekka Paalanen wrote:
> >
> > On Thu, 10 Mar 2022 11:56:41 -0800
> > Rob Clark wrote:
> >
> > > For something like just notifying a compositor that a gpu crash
> > > happened, perhaps drm_event is more su
On 12/03/2022 04:16, Matt Atwood wrote:
On Thu, Mar 10, 2022 at 12:26:12PM +, Tvrtko Ursulin wrote:
On 10/03/2022 05:18, Matt Atwood wrote:
Newer platforms have DSS that aren't necessarily available for both
geometry and compute, two queries will need to exist. This introduces
the first,
This patch series aims to support the MIPI DSI encoder found in the RZ/G2L
SoC. It currently supports DSI mode only.
This unit supports MIPI Alliance Specification for Display Serial Interface
(DSI) Specification. This unit provides a
solution for transmitting MIPI DSI compliant digital video and
The RZ/G2L MIPI DSI TX is embedded in the Renesas RZ/G2L family SoC's. It
can operate in DSI mode, with up to four data lanes.
Signed-off-by: Biju Das
---
RFC->v1:
* Added a ref to dsi-controller.yaml.
RFC:-
*
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-22
This driver supports the MIPI DSI encoder found in the RZ/G2L
SoC. It currently supports DSI mode only.
Signed-off-by: Biju Das
---
RFC->v1:
* Added "depends on ARCH_RENESAS || COMPILE_TEST" on KCONFIG
and dropped DRM as it is implied by DRM_BRIDGE
* Used devm_reset_control_get_exclusive() f
On 2022-03-14 11:31, Robin Murphy wrote:
On 2022-03-13 12:56, Peter Geis wrote:
On Sun, Mar 13, 2022 at 6:13 AM Piotr Oniszczuk
wrote:
Wiadomość napisana przez Peter Geis w dniu
26.01.2022, o godz. 21:24:
The hdmi-cec clock must be 32khz in order for cec to work correctly.
Ensure after
This series:
1. Enables support of GuC to report error-state-capture
using a list of MMIO registers the driver registers
and GuC will dump, log and notify right before a GuC
triggered engine-reset event.
2. Updates the ADS blob creation to register said lists
of global, engi
- Some DPU versions support inline rot90. It is supported only for
limited amount of UBWC formats.
- There are two versions of inline rotators, v1 (present on sm8250 and
sm7250) and v2 (sc7280). These versions differ in the list of supported
formats and in the scaler possibilities.
Changes in RFC:
On Fri, Mar 04, 2022 at 09:34:14PM +0200, Andy Shevchenko wrote:
> In the fbtft_init_display() the init sequence is printed for
> the debug purposes. Unfortunately the current code doesn't take
> into account that values in the buffer are of the s16 type.
>
> Consider that and replace the printing
On Mon, 14 Mar 2022 08:35:17 -0700, Tvrtko Ursulin wrote:
>
> >> Alternatively, all other uapi uses struct i915_engine_class_instance to
> >> address engines which uses u16:u16.
> >>
> >> How ugly it is to stuff a struct into u32 flags is the question... But you
> >> could at least use u16:u16 for
On 3/14/22 11:18, Sascha Hauer wrote:
> On Sun, Mar 13, 2022 at 12:07:56AM +0300, Dmitry Osipenko wrote:
>> On 3/11/22 11:33, Sascha Hauer wrote:
>>> The rk3568 HDMI has an additional clock that needs to be enabled for the
>>> HDMI controller to work. This clock is not needed for the HDMI
>>> contr
Few bug fixes for lrc selftest.
Chris Wilson (4):
drm/i915/gt: Explicitly clear BB_OFFSET for new contexts
drm/i915/selftests: Check for incomplete LRI from the context image
drm/i915/selftest: Clear the output buffers before GPU writes
drm/i915/selftest: Always cancel semaphore on error
Few bug fixes for lrc selftest.
Chris Wilson (4):
drm/i915/gt: Explicitly clear BB_OFFSET for new contexts
drm/i915/selftests: Check for incomplete LRI from the context image
drm/i915/selftest: Clear the output buffers before GPU writes
drm/i915/selftest: Always cancel semaphore on error
From: Chris Wilson
Even though the initial protocontext we load onto HW has the register
cleared, by the time we save it into the default image, BB_OFFSET has
had the enable bit set. Reclear BB_OFFSET for each new context.
Testcase: igt/i915_selftests/gt_lrc
Signed-off-by: Chris Wilson
Cc: Mik
From: Chris Wilson
In order to keep the context image parser simple, we assume that all
commands follow a similar format. A few, especially not MI commands on
the render engines, have fixed lengths not encoded in a length field.
This caused us to incorrectly skip over 3D state commands, and start
From: Chris Wilson
When testing whether we can get the GPU to leak information about
non-privileged state, we first need to ensure that the output buffer is
set to a known value as the HW may opt to skip the write into memory for
a non-privileged read of a sensitive register. We chose POISON_INUS
From: Chris Wilson
Ensure that we always signal the semaphore when timing out, so that if it
happens to be stuck waiting for the semaphore we will quickly recover
without having to wait for a reset.
Reported-by: CQ Tang
Signed-off-by: Chris Wilson
Cc: CQ Tang
cc: Joonas Lahtinen
Signed-off-b
Hi Pekka,
On Mon, Mar 14, 2022 at 4:05 PM Pekka Paalanen wrote:
> On Mon, 14 Mar 2022 14:30:18 +0100
> Geert Uytterhoeven wrote:
> > On Mon, Mar 7, 2022 at 9:53 PM Geert Uytterhoeven
> > wrote:
> > > Introduce fourcc codes for color-indexed frame buffer formats with two,
> > > four, and sixtee
On Mon, 14 Mar 2022 at 17:47, Vinod Polimera wrote:
>
> use max clock during probe/bind sequence from the opp table.
> The clock will be scaled down when framework sends an update.
>
> Fixes: 25fdd5933("drm/msm: Add SDM845 DPU support")
> Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshk
On 10/03/22 8:59 pm, Matthew Auld wrote:
> On 10/03/2022 14:47, Arunpravin wrote:
>>
>>
>> On 08/03/22 10:31 pm, Matthew Auld wrote:
>>> On 08/03/2022 13:59, Arunpravin wrote:
On 07/03/22 10:11 pm, Matthew Auld wrote:
> On 07/03/2022 14:37, Arunpravin wrote:
>> place BUG_O
handle instances when size is not aligned with the min_page_size.
Unigine Heaven has allocation requests for example required pages
are 161 and alignment request is 128. To allocate the left over
33 pages, continues the iteration to find the order value which
is 5 and 0 and when it compares with mi
On Mon, 14 Mar 2022 at 20:27, Vinod Polimera wrote:
>
> - Some DPU versions support inline rot90. It is supported only for
> limited amount of UBWC formats.
> - There are two versions of inline rotators, v1 (present on sm8250 and
> sm7250) and v2 (sc7280). These versions differ in the list of supp
handle a situation in the condition order-- == min_order,
when order = 0, leading to order = -1, it now won't exit
the loop. To avoid this problem, added a order check in
the same condition, (i.e) when order is 0, we return
-ENOSPC
Signed-off-by: Arunpravin
---
drivers/gpu/drm/drm_buddy.c | 2 +-
Hi Christophe,
Le ven., mars 11 2022 at 18:02:38 +0100, Christophe Branchereau
a écrit :
This driver supports the NewVision NV3052C based LCDs. Right now, it
only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel,
which
can be found in the Anbernic RG-350M handheld console.
Signe
Hi Christophe,
Le ven., mars 11 2022 at 18:02:37 +0100, Christophe Branchereau
a écrit :
This allows the CRTC to be enabled after panels have slept out,
and before their display is turned on, solving a graphical bug
on the newvision nv3502c
Signed-off-by: Christophe Branchereau
---
drivers/
Hello:
This series was applied to netdev/net-next.git (master)
by Jakub Kicinski :
On Mon, 14 Mar 2022 12:53:24 +0100 you wrote:
> Various spelling mistakes in comments.
> Detected with the help of Coccinelle.
>
> ---
>
> drivers/base/devres.c |4 ++--
> drive
Hi Christophe,
Le lun., mars 7 2022 at 19:12:49 +0100, Christophe Branchereau
a écrit :
Hi Paul, it should in theory, but doesn't work in practice, the
display doesn't like having that bit set outside of the init sequence.
Feel free to experiment if you think you can make it work though, you
Hi Thomas,
On Sun, Mar 13, 2022 at 8:29 PM Thomas Zimmermann wrote:
> Commit 6f29e04938bf ("fbdev: Improve performance of sys_imageblit()")
> broke sys_imageblit() for image width that are not aligned to 8-bit
> boundaries. Fix this by handling the trailing pixels on each line
> separately. The p
On Mon, Mar 14, 2022 at 10:40:47AM +0200, Jani Nikula wrote:
> On Sun, 13 Mar 2022, Lee Shawn C wrote:
> > drm_find_cea_extension() always look for a top level CEA block. Pass
> > ext_index from caller then this function to search next available
> > CEA ext block from a specific EDID block pointer
On 3/11/22 20:06, jim.cro...@gmail.com wrote:
> On Fri, Mar 11, 2022 at 12:06 PM Jason Baron wrote:
>>
>>
>>
>> On 3/10/22 23:47, Jim Cromie wrote:
>>> DRM defines/uses 10 enum drm_debug_category's to create exclusive
>>> classes of debug messages. To support this directly in dynamic-debug,
>>
On 3/11/22 17:22, Maxime Ripard wrote:
> Hi Dmitry,
>
> On Thu, Mar 10, 2022 at 03:33:07AM +0300, Dmitry Osipenko wrote:
>> I was playing/testing SuperTuxKart using VirtIO-GPU driver and spotted a
>> UAF bug in drm_atomic_helper_wait_for_vblanks().
>>
>> SuperTuxKart can use DRM directly, i.e. you
On Sat, 12 Mar 2022 20:23:48 +0100
Jonathan Neuschäfer wrote:
> Hello Andreas,
>
> Sorry for the delay, I finally got around to having a look at the
> patchset.
>
> Some comments from skimming the patches below, and in my other replies.
>
>
> On Sun, Feb 06, 2022 at 09:00:11AM +0100, Andreas
On Fri, Feb 18, 2022 at 12:03:41PM +0200, Ville Syrjala wrote:
> drm: Add drm_mode_init()
> drm/bridge: Use drm_mode_copy()
> drm/imx: Use drm_mode_duplicate()
> drm/panel: Use drm_mode_duplicate()
> drm/vc4: Use drm_mode_copy()
These have been pushed to drm-misc-next.
> drm/amdgpu: Re
Hi! First a little bit of background: I've recently been trying to get rid of
all of the non-atomic payload bandwidth management code in the MST helpers in
order to make it easier to implement DSC and fallback link rate retraining
support down the line. Currently bandwidth information is stored in
Hello,
This patchset introduces memory shrinker for the VirtIO-GPU DRM driver.
During OOM, the shrinker will release BOs that are marked as "not needed"
by userspace using the new madvise IOCTL. The userspace in this case is
the Mesa VirGL driver, it will mark the cached BOs as "not needed",
allow
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