> -Original Message-
> From: Stephen Boyd
> Sent: Wednesday, March 9, 2022 1:36 AM
> To: quic_vpolimer ;
> devicet...@vger.kernel.org; dri-devel@lists.freedesktop.org;
> freedr...@lists.freedesktop.org; linux-arm-...@vger.kernel.org
> Cc: linux-ker...@vger.kernel.org; robdcl...@gmail.com
On Fri, Mar 11, 2022 at 10:46:13AM +0300, Dmitry Baryshkov wrote:
> On Fri, 11 Mar 2022 at 04:50, Abhinav Kumar wrote:
> >
> > For some vendor driver implementations, display hardware can
> > be shared between the encoder used for writeback and the physical
> > display.
> >
> > In addition resourc
On Thu, 10 Mar 2022 11:56:41 -0800
Rob Clark wrote:
> For something like just notifying a compositor that a gpu crash
> happened, perhaps drm_event is more suitable. See
> virtio_gpu_fence_event_create() for an example of adding new event
> types. Although maybe you want it to be an event which
The VOP2 has an interface mux which decides to which encoder(s) a CRTC
is routed to. The encoders and CRTCs are connected via of_graphs in the
device tree. When given an encoder the VOP2 driver needs to know to
which internal register setting this encoder matches. For this the VOP2
binding offers d
The rk3568 HDMI has an additional clock that needs to be enabled for the
HDMI controller to work. It is not needed for the HDMI controller
itself, but to make the SoC internal busses work.
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v7:
- rename hclk to niu
.../bindings/displa
"vpll" is a misnomer. A clock input to a device should be named after
the usage in the device, not after the clock that drives it. On the
rk3568 the same clock is driven by the HPLL.
To fix that, this patch renames the vpll clock to ref clock. The clock
name "vpll" is left for compatibility to old
"vpll" is a misnomer. A clock input to a device should be named after
the usage in the device, not after the clock that drives it. On the
rk3568 the same clock is driven by the HPLL.
This patch adds "ref" as a new alternative clock name for "vpll"
Signed-off-by: Sascha Hauer
Acked-by: Rob Herring
From: Nickey Yang
add 594Mhz configuration parameters in rockchip_phy_config
Signed-off-by: Nickey Yang
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v3:
- new patch
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/dr
Current port description doesn't cover all possible cases. It currently
expects one single port with two endpoints.
When the HDMI connector is described in the device tree there can be two
ports, first one going to the VOP and the second one going to the connector.
Also on SoCs which only have a
The reference clock for the HDMI controller has been renamed to 'ref',
the previous 'vpll' name is only left for compatibility in the driver.
Rename the clock to the new name.
Signed-off-by: Sascha Hauer
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 delet
From: Douglas Anderson
The previous tables for mpll_cfg and curr_ctrl were created using the
20-pages of example settings provided by the PHY vendor. Those
example settings weren't particularly dense, so there were places
where we were guessing what the settings would be for 10-bit and
12-bit (n
The VOP2 driver needs rockchip specific information for a drm_encoder.
This patch creates a struct rockchip_encoder with a struct drm_encoder
embedded in it. This is used throughout the rockchip driver instead of
struct drm_encoder directly.
The information the VOP2 drivers needs is the of_graph
From: Benjamin Gaignard
Define a new compatible for rk3568 HDMI.
This version of HDMI hardware block needs two new clocks hclk_vio and hclk
to provide phy reference clocks.
Signed-off-by: Benjamin Gaignard
Reviewed-by: Rob Herring
Signed-off-by: Sascha Hauer
---
.../devicetree/bindings/displ
The VOP2 is found on newer Rockchip SoCs like the rk3568 or the rk3566.
The binding differs slightly from the existing VOP binding, so add a new
binding file for it.
Signed-off-by: Sascha Hauer
Reviewed-by: Rob Herring
---
Notes:
Changes since v5:
- Add Robs Reviewed-by:
Change
From: Andy Yan
The VOP2 unit is found on Rockchip SoCs beginning with rk3566/rk3568.
It replaces the VOP unit found in the older Rockchip SoCs.
This driver has been derived from the downstream Rockchip Kernel and
heavily modified:
- All nonstandard DRM properties have been removed
- dropped str
The VOP2 is the display output controller on the RK3568. Add the node
for it to the dtsi file along with the required display-subsystem node
and the iommu node.
Signed-off-by: Sascha Hauer
Acked-by: Rob Herring
---
Notes:
Changes since v6:
- Change RK3568_ prefix to ROCKCHIP_ prefix
The rk3568 HDMI has an additional clock that needs to be enabled for the
HDMI controller to work. This clock is not needed for the HDMI
controller itself, but to make the SoC internal bus logic work. From the
reference manual:
> 2.8.6 NIU Clock gating reliance
>
> A part of niu clocks have a depen
Add a new dw_hdmi_plat_data struct and new compatible for rk3568.
Signed-off-by: Benjamin Gaignard
Signed-off-by: Sascha Hauer
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 31 +
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
From: Michael Riesch
Enable the RK356x Video Output Processor (VOP) 2 on the Pine64
Quartz64 Model A.
Signed-off-by: Michael Riesch
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v5:
- Drop reg property from single endpoint node
Changes since v4:
- Sort nodes alphab
This enabled the VOP2 display controller along with hdmi and the
required port routes which is enough to get a picture out of the
hdmi port of the board.
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v5:
- Drop reg property from single endpoint node
Changes since v4:
v8 is here. The only change this time is the renaming of hclk to niu.
The background is that I needed to add a new clock to the HDMI controller
driver to make it work on rk356x. The purpose of this clock was not
clear, but during v7 discussions it turned out that this clock is not
needed for the HD
From: Douglas Anderson
Jitter was improved by lowering the MPLL bandwidth to account for high
frequency noise in the rk3288 PLL. In each case MPLL bandwidth was
lowered only enough to get us a comfortable margin. We believe that
lowering the bandwidth like this is safe given sufficient testing.
The driver checks if the pixel clock of the given mode matches an entry
in the mpll config table. The frequencies in the mpll table are meant as
a frequency range up to which the entry works, not as a frequency that
must match the pixel clock. The downstream Kernel also does not have
this check, so
The RK3568 has HDMI_TX_AVDD0V9 and HDMI_TX_AVDD_1V8 supply inputs needed
for the HDMI port. add support for these to the driver for boards which
have them supplied by switchable regulators.
Signed-off-by: Sascha Hauer
Reviewed-by: Dmitry Osipenko
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
Add support for the HDMI port found on RK3568.
Signed-off-by: Sascha Hauer
---
Notes:
Changes since v7:
- Rename hclk to niu
Changes since v5:
- Drop unnecessary #size-cells/#address-cells from nodes with only single
endpoint
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 32
None of the upstream device tree files has a "unwedge" pinctrl
specified. Make it optional.
Signed-off-by: Sascha Hauer
Acked-by: Rob Herring
---
Notes:
Changes since v4:
- Add Robs Ack
.../devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml | 1 +
1 file changed, 1 insertion
The RK3568 has HDMI_TX_AVDD0V9 and HDMI_TX_AVDD_1V8 supply inputs
needed for the HDMI port. Add the binding for these supplies.
Signed-off-by: Sascha Hauer
Acked-by: Rob Herring
---
Notes:
Changes since v4:
- Add Robs Ack
.../bindings/display/rockchip/rockchip,dw-hdmi.yaml | 11
With upcoming VOP2 support VOP won't be the only choice anymore, so make
the VOP driver optional.
Signed-off-by: Sascha Hauer
---
drivers/gpu/drm/rockchip/Kconfig| 8
drivers/gpu/drm/rockchip/Makefile | 3 ++-
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 +-
3 f
Fix the following coccicheck warning:
drivers/video/fbdev/offb.c:415:13-14: WARNING comparing pointer to 0
Signed-off-by: Haowen Bai
---
drivers/video/fbdev/offb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/fbdev/offb.c b/drivers/video/fbdev/offb.c
index 45
On 10.03.22 18:26, Alex Sierra wrote:
> DEVICE_COHERENT pages introduce a subtle distinction in the way
> "normal" pages can be used by various callers throughout the kernel.
> They behave like normal pages for purposes of mapping in CPU page
> tables, and for COW. But they do not support LRU lists
On Fri, 11 Mar 2022 at 11:06, Vinod Polimera wrote:
>
>
>
> > -Original Message-
> > From: Stephen Boyd
> > Sent: Wednesday, March 9, 2022 1:36 AM
> > To: quic_vpolimer ;
> > devicet...@vger.kernel.org; dri-devel@lists.freedesktop.org;
> > freedr...@lists.freedesktop.org; linux-arm-...@vg
Il 11/03/22 00:46, Rob Clark ha scritto:
From: Rob Clark
Hey Rob,
looks like you've somehow lost the commit description on this one!
Cheers,
Angelo
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Il 11/03/22 02:54, Nancy.Lin ha scritto:
Add vdosys1 RDMA definition.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
---
.../arm/mediatek/mediatek,mdp-rdma.yaml | 86 +++
1 file changed, 86 insertions(+)
create mode 100644
Documentation/device
Hi all,
I'm sending these patches to try to improve the current situation for a
particular corner case (DRM driver unbinding).
I could reproduce a specific race condition during the unbinding of the
mediatek-drm driver that caused an invalid memory address. The race
condition is triggered by a us
When unbinding a DRM master driver there's a race condition that
sometimes results in an invalid vm access when userspace (gnome-shell)
issues a DRM_IOCTL_MODE_GETCONNECTOR ioctl right after a bridge has been
removed from an encoder's bridge chain.
This means that once a bridge has been disabled a
Depending on the bridge code, certain userspace events during a driver
teardown (such as a DRM ioctl call) might cause a race condition where
the drm_bridge_chain_pre_enable() and drm_bridge_chain_post_enable()
functions could be called for a bridge that has just been detached and
removed from the
On Mon, 7 Mar 2022 at 21:38, Vivek Kasireddy wrote:
>
> On platforms capable of allowing 8K (7680 x 4320) modes, pinning 2 or
> more framebuffers/scanout buffers results in only one that is mappable/
> fenceable. Therefore, pageflipping between these 2 FBs where only one
> is mappable/fenceable cr
Il 11/03/22 02:54, Nancy.Lin ha scritto:
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add DRM and these modules support by the patches below:
Hello maintainers,
I have tested this series (and its dependencies - where [1
On 10/03/2022 20:24, John Harrison wrote:
On 3/10/2022 01:27, Tvrtko Ursulin wrote:
On 09/03/2022 21:16, John Harrison wrote:
On 3/8/2022 01:41, Tvrtko Ursulin wrote:
On 03/03/2022 22:37, john.c.harri...@intel.com wrote:
From: John Harrison
A workaround was added to the driver to allow Op
The property length which returns from "of_get_property", it means array
bytes count if the property has prefix as "/bits/ 8". The driver should
call function "of_property_read_u8_array" to get correct array value.
Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add MIPI DPI input feature")
Signed-off-
On 3/10/22 15:18, Maxime Ripard wrote:
On Thu, Mar 10, 2022 at 01:47:13PM +0100, Marek Vasut wrote:
On 3/10/22 11:53, Maxime Ripard wrote:
On Tue, Mar 08, 2022 at 10:41:05PM +0100, Marek Vasut wrote:
On 3/8/22 17:21, Maxime Ripard wrote:
On Tue, Mar 08, 2022 at 03:47:22PM +0100, Marek Vasut w
On 11/03/2022 10:07, Tvrtko Ursulin wrote:
On 10/03/2022 20:24, John Harrison wrote:
On 3/10/2022 01:27, Tvrtko Ursulin wrote:
On 09/03/2022 21:16, John Harrison wrote:
On 3/8/2022 01:41, Tvrtko Ursulin wrote:
On 03/03/2022 22:37, john.c.harri...@intel.com wrote:
From: John Harrison
A w
The series is Acked-by: Nirmoy Das
On 10/03/2022 13:27, Matthew Auld wrote:
The leftover bits around dealing with stolen-local memory + small BAR, plus
some related fixes.
v2: some tweaks based on feedback from Ville
Add a general purpose helper to deep dive into dma_fence_chain/dma_fence_array
structures and iterate over all the fences in them.
This is useful when we need to flatten out all fences in those structures.
Signed-off-by: Christian König
---
Documentation/driver-api/dma-buf.rst | 6 +
drivers
The dma_fence_chain containers can show up in sync_files as well resulting in
warnings that those can't be added to dma_fence_array containers when merging
multiple sync_files together.
Solve this by using the dma_fence_unwrap iterator to deep dive into the
contained fences and then add those flat
On Thu, 10 Mar 2022 at 12:28, Matthew Auld wrote:
>
> From: CQ Tang
>
> When system does not have mappable aperture, ggtt->mappable_end=0. In
> this case if we pass PIN_MAPPABLE when pinning vma, the pinning code
> will return -ENOSPC. So conditionally set PIN_MAPPABLE if HAS_GMCH().
>
> Suggeste
Hi Xin.
On Fri, Mar 11, 2022 at 06:35:25PM +0800, Xin Ji wrote:
> The property length which returns from "of_get_property", it means array
> bytes count if the property has prefix as "/bits/ 8". The driver should
> call function "of_property_read_u8_array" to get correct array value.
>
> Fixes: f
On Tue, 2022-03-01 at 09:45 -0800, Rob Clark wrote:
> On Mon, Feb 28, 2022 at 10:49 PM David Laight wrote:
> >
> > From: Abhinav Kumar
> > > Sent: 28 February 2022 21:38
> > ...
> > > We also did some profiling around how much increasing the block size
> > > helps and here is the data:
> > >
> >
Hello, v3 :
Drop -spi in the compatible string, adjust bindings doc accordingly
KR
Christophe
Hello, this is the v2 for my set of patches :
- use dev_err_probe() instead of dev_err() in the newvision panel
driver probe function
- add bindings documentation for the Le
This allows the CRTC to be enabled after panels have slept out,
and before their display is turned on, solving a graphical bug
on the newvision nv3502c
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 19 +--
1 file changed, 13 insertions(+),
This driver supports the NewVision NV3052C based LCDs. Right now, it
only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which
can be found in the Anbernic RG-350M handheld console.
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/panel/Kconfig | 9 +
dr
Following the introduction of bridge_atomic_enable in the ingenic
drm driver, the crtc is enabled between .prepare and .enable, if
it exists.
Add it so the backlight is only enabled after the crtc is, to avoid
graphical issues.
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/panel/pan
Add binding for the leadtek ltk035c5444t, which is a 640x480
mipi-dbi over spi / 24-bit RGB panel based on the newvision
NV03052C chipset.
It is found in the Anbernic RG350M mips handheld.
Signed-off-by: Christophe Branchereau
---
.../display/panel/leadtek,ltk035c5444t.yaml | 59 +
Hi All,
On 3/9/22 18:53, Rajat Jain wrote:
> On Wed, Mar 9, 2022 at 7:06 AM Sean Paul wrote:
>>
>> From: Sean Paul
>>
>> This patch adds the necessary hooks to make amdgpu aware of privacy
>> screens. On devices with privacy screen drivers (such as thinkpad-acpi),
>> the amdgpu driver will defer
Hi,
these two patches are from the RT queue. They avoid IRQ-off checks and
IRQ-off regions which are not valid/ possible on PREEMPT_RT and are not
needed on !PREEMPT_RT.
Sebastian
Disabling interrupts and invoking the irq_work function directly breaks
on PREEMPT_RT.
PREEMPT_RT does not invoke all irq_work from hardirq context because
some of the user have spinlock_t locking in the callback function.
These locks are then turned into a sleeping locks which can not be
acquired
The !irqs_disabled() check triggers on PREEMPT_RT even with
i915_sched_engine::lock acquired. The reason is the lock is transformed
into a sleeping lock on PREEMPT_RT and does not disable interrupts.
There is no need to check for disabled interrupts. The lockdep
annotation below already check if t
Hi Rob,
Le jeu., mars 10 2022 at 16:30:26 -0600, Rob Herring
a écrit :
On Tue, Mar 08, 2022 at 02:06:43PM +0100, Christophe Branchereau
wrote:
Add binding for the leadtek ltk035c5444t, which is a 640x480
mipi-dbi over spi / 24-bit RGB panel based on the newvision
NV03052C chipset.
It is
Hi Dmitry,
On Thu, Mar 10, 2022 at 03:33:07AM +0300, Dmitry Osipenko wrote:
> I was playing/testing SuperTuxKart using VirtIO-GPU driver and spotted a
> UAF bug in drm_atomic_helper_wait_for_vblanks().
>
> SuperTuxKart can use DRM directly, i.e. you can run game in VT without
> Xorg or Wayland, t
ce-storage/20220311-141705
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-debian-10.3
(https://download.01.org/0day-ci/archive/20220311/202203112245.edvnthye-...@intel.com/config)
compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04) 9.4.0
reproduce (this is a W=1 build):
applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Matt-Roper/drm-i915-sseu-Don-t-overallocate-subslice-storage/20220311-1
On Fri, 11 Mar 2022 09:33:09 +0100, Sascha Hauer wrote:
> The rk3568 HDMI has an additional clock that needs to be enabled for the
> HDMI controller to work. It is not needed for the HDMI controller
> itself, but to make the SoC internal busses work.
>
> Signed-off-by: Sascha Hauer
> ---
>
> Not
On Fri, Mar 11, 2022 at 01:04:53PM +0100, Christophe Branchereau wrote:
> Add binding for the leadtek ltk035c5444t, which is a 640x480
> mipi-dbi over spi / 24-bit RGB panel based on the newvision
> NV03052C chipset.
>
> It is found in the Anbernic RG350M mips handheld.
>
> Signed-off-by: Christo
On Fri, Mar 11, 2022 at 7:05 AM Paul Cercueil wrote:
>
> Hi Rob,
>
> Le jeu., mars 10 2022 at 16:30:26 -0600, Rob Herring
> a écrit :
> > On Tue, Mar 08, 2022 at 02:06:43PM +0100, Christophe Branchereau
> > wrote:
> >> Add binding for the leadtek ltk035c5444t, which is a 640x480
> >> mipi-dbi o
Hi,
On Thu, Mar 10, 2022 at 9:47 PM Kieran Bingham
wrote:
>
> > > +static void ti_sn_bridge_hpd_disable(struct drm_bridge *bridge)
> > > +{
> > > + struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
> > > +
> > > + regmap_write(pdata->regmap, SN_IRQ_HPD_REG, 0);
> > > +
--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christian-K-nig/dma-buf-add-dma_fence_unwrap/20220311-190352
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
79b00034e9dcd2b065c1665c8b42f62b6b80a9be
con
--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christian-K-nig/dma-buf-add-dma_fence_unwrap/20220311-190352
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
79b00034e9dcd2b065c1665c8b42f62b6b80a9be
On Fri, Mar 11, 2022 at 11:36:58AM +0100, Marek Vasut wrote:
> On 3/10/22 15:18, Maxime Ripard wrote:
> > On Thu, Mar 10, 2022 at 01:47:13PM +0100, Marek Vasut wrote:
> > > On 3/10/22 11:53, Maxime Ripard wrote:
> > > > On Tue, Mar 08, 2022 at 10:41:05PM +0100, Marek Vasut wrote:
> > > > > On 3/8/2
https://bugzilla.kernel.org/show_bug.cgi?id=215648
Philipp Riederer (pr_ker...@tum.fail) changed:
What|Removed |Added
Status|NEW |RESOLVED
Hi Rob,
Sorry something I can't explain happened with git rebase
v4 on its way
On Fri, Mar 11, 2022 at 3:59 PM Rob Herring wrote:
>
> On Fri, Mar 11, 2022 at 01:04:53PM +0100, Christophe Branchereau wrote:
> > Add binding for the leadtek ltk035c5444t, which is a 640x480
> > mipi-dbi over spi /
v4: fix the bindings license
KR
Christophe
---
Hello, v3 :
Drop -spi in the compatible string, adjust bindings doc accordingly
KR
Christophe
Hello, this is the v2 for my set of patches :
- use dev_err_probe() instead of dev_err() in the newvision
This allows the CRTC to be enabled after panels have slept out,
and before their display is turned on, solving a graphical bug
on the newvision nv3502c
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 19 +--
1 file changed, 13 insertions(+),
This driver supports the NewVision NV3052C based LCDs. Right now, it
only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which
can be found in the Anbernic RG-350M handheld console.
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/panel/Kconfig | 9 +
dr
Following the introduction of bridge_atomic_enable in the ingenic
drm driver, the crtc is enabled between .prepare and .enable, if
it exists.
Add it so the backlight is only enabled after the crtc is, to avoid
graphical issues.
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/panel/pan
Add binding for the leadtek ltk035c5444t, which is a 640x480
mipi-dbi over spi / 24-bit RGB panel based on the newvision
NV03052C chipset.
It is found in the Anbernic RG350M mips handheld.
Signed-off-by: Christophe Branchereau
---
.../display/panel/leadtek,ltk035c5444t.yaml | 59 +
The call to drm_crtc_vblank_off(&lcdif->crtc); disables IRQ generation
from the LCDIF block already and this is called in mxsfb_load() before
request_irq(), so explicitly disabling IRQ using custom function like
mxsfb_irq_disable() is not needed, remove it. The request_irq() call
would return -ENOT
Reorder mxsfb_crtc_mode_set_nofb() such that all functions which perform
register IO are called from one single location in this function. This is
a clean up. No functional change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Peng Fan
Cc: Robby Cai
The current clock handling in the LCDIF driver is a convoluted mess.
Implement runtime PM ops which turn the clock ON and OFF and let the
pm_runtime_get_sync()/pm_runtime_put_sync() calls in .atomic_enable
and .atomic_disable callbacks turn the clock ON and OFF at the right
time.
This requires sli
Move mxsfb_get_fb_paddr() out of the way, away from register IO functions.
This is a clean up. No functional change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Peng Fan
Cc: Robby Cai
Cc: Sam Ravnborg
Cc: Stefan Agner
---
V2: No change
---
drive
Pull functionality responsible for programming framebuffer address into
the controller into dedicated function mxsfb_update_buffer(). This is a
clean up. No functional change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Peng Fan
Cc: Robby Cai
Cc: S
Pull mode registers programming from mxsfb_enable_controller() into
dedicated function mxsfb_set_mode(). This is a clean up. No functional
change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Peng Fan
Cc: Robby Cai
Cc: Sam Ravnborg
Cc: Stefan Agner
Wrap FIFO reset and comments into mxsfb_reset_block(), this is a clean up.
No functional change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Peng Fan
Cc: Robby Cai
Cc: Sam Ravnborg
Cc: Stefan Agner
---
V2: No change
---
drivers/gpu/drm/mxsfb/mxs
On 2022-03-11 04:16, David Hildenbrand wrote:
On 10.03.22 18:26, Alex Sierra wrote:
DEVICE_COHERENT pages introduce a subtle distinction in the way
"normal" pages can be used by various callers throughout the kernel.
They behave like normal pages for purposes of mapping in CPU page
tables, and f
Hi Dmitry and Laurent
On 3/11/2022 12:05 AM, Laurent Pinchart wrote:
On Fri, Mar 11, 2022 at 10:46:13AM +0300, Dmitry Baryshkov wrote:
On Fri, 11 Mar 2022 at 04:50, Abhinav Kumar wrote:
For some vendor driver implementations, display hardware can
be shared between the encoder used for writeb
--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christian-K-nig/dma-buf-add-dma_fence_unwrap/20220311-190352
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
79b00034e9dcd2b065c1665c8b42f62b6b80a9be
Hi Laurent
On 3/10/2022 11:28 PM, Laurent Pinchart wrote:
Hi Abhinav
Thank you for the patch.
On Thu, Mar 10, 2022 at 05:49:59PM -0800, Abhinav Kumar wrote:
Make changes to rcar_du driver to start using drm_encoder pointer
for drm_writeback_connector.
Co-developed-by: Kandpal Suraj
Signed-o
--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christian-K-nig/dma-buf-add-dma_fence_unwrap/20220311-190352
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
79b00034e9dcd2b065c1665c8b42f62b6b80a9b
On Fri, 11 Mar 2022 at 20:09, Abhinav Kumar wrote:
>
> Hi Dmitry and Laurent
>
> On 3/11/2022 12:05 AM, Laurent Pinchart wrote:
> > On Fri, Mar 11, 2022 at 10:46:13AM +0300, Dmitry Baryshkov wrote:
> >> On Fri, 11 Mar 2022 at 04:50, Abhinav Kumar
> >> wrote:
> >>>
> >>> For some vendor driver im
In (40d9b043a89e drm/connector: store tile information from displayid (v3))
this function was changed to find EDID extensions by id, but the comments
still are specific to the CEA extension.
Signed-off-by: Drew Davenport
---
drivers/gpu/drm/drm_edid.c | 4 ++--
1 file changed, 2 insertions(+),
On Tue, Mar 08, 2022 at 10:17:42PM +0530, Balasubramani Vivekanandan wrote:
This patch is continuation of the effort to move all pointers in i915,
which at any point may be pointing to device memory or system memory, to
iosys_map interface.
More details about the need of this change is explained
On Tue, Mar 08, 2022 at 10:17:42PM +0530, Balasubramani Vivekanandan wrote:
This patch is continuation of the effort to move all pointers in i915,
which at any point may be pointing to device memory or system memory, to
iosys_map interface.
More details about the need of this change is explained
On 3/10/22 23:47, Jim Cromie wrote:
> In
> https://urldefense.com/v3/__https://lore.kernel.org/lkml/20211209150910.ga23...@axis.com/__;!!GjvTz_vk!HGKKoni4RVdEBgv_V0zPSNSX428bpf02zkCy2WbeQkBdVtp1QJqGX-lJYlRDGg$
>
>
> Vincent's patch commented on, and worked around, a bug toggling
> static_bra
s documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christian-K-nig/dma-buf-add-dma_fence_unwrap/20220311-190352
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
79b00034e9dcd2b065c1665c8b42f62b6b80a9be
config: x86_64-
On Thu, Mar 10, 2022 at 10:15:42PM -0800, Matt Roper wrote:
Xe_HP removed "slice" as a first-class unit in the hardware design.
Instead we now have a single pool of subslices (which are now referred
to as "DSS") that different hardware units have different ways of
grouping ("compute slices," "geo
On 3/10/22 23:47, Jim Cromie wrote:
> DRM defines/uses 10 enum drm_debug_category's to create exclusive
> classes of debug messages. To support this directly in dynamic-debug,
> add the following:
>
> - struct _ddebug.class_id:4 - 4 bits is enough
> - define _DPRINTK_SITE_UNCLASSED 15 - see be
ce-storage/20220311-141705
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-rhel-8.3-kselftests
(https://download.01.org/0day-ci/archive/20220312/202203120322.okxcdfs7-...@intel.com/config)
compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04) 9.4.0
reproduce:
# apt-get inst
drivers/gpu/drm/i915/gt/intel_sseu.c:59:5: warning: symbol
'intel_sseu_get_geometry_subslices' was not declared. Should it be static?
Reported-by: kernel test robot
Signed-off-by: kernel test robot
---
drivers/gpu/drm/i915/gt/intel_sseu.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-
On Thu, Mar 10, 2022 at 10:15:43PM -0800, Matt Roper wrote:
When running on Xe_HP or beyond, let's use an updated format for
describing topology in our error state dumps and debugfs to give a
more accurate view of the hardware:
- Just report DSS directly without the legacy "slice0" output that's
On 3/11/22 17:29, Maxime Ripard wrote:
On Fri, Mar 11, 2022 at 11:36:58AM +0100, Marek Vasut wrote:
On 3/10/22 15:18, Maxime Ripard wrote:
On Thu, Mar 10, 2022 at 01:47:13PM +0100, Marek Vasut wrote:
On 3/10/22 11:53, Maxime Ripard wrote:
On Tue, Mar 08, 2022 at 10:41:05PM +0100, Marek Vasut
Hi Marek,
On Sat, Mar 12, 2022 at 1:32 AM Marek Vasut wrote:
>
> On 3/11/22 17:29, Maxime Ripard wrote:
> > On Fri, Mar 11, 2022 at 11:36:58AM +0100, Marek Vasut wrote:
> >> On 3/10/22 15:18, Maxime Ripard wrote:
> >>> On Thu, Mar 10, 2022 at 01:47:13PM +0100, Marek Vasut wrote:
> On 3/10/22
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