在 2022/2/9 14:04, Maxime Ripard 写道:
On Wed, Feb 09, 2022 at 11:56:48AM +, Jiaxun Yang wrote:
在 2022/2/9 8:52, Maxime Ripard 写道:
On Thu, Feb 03, 2022 at 11:47:16PM +0800, Sui Jingfeng wrote:
[...]
DT isn't really a solution either. Let's take the distribution
perspective there. Suppose
Hi Jingfeng,
Could you please keep me CCed for the for the whole thread when you respin
the patch? Cuz I'm maintain MIPS/LOONGSON64 stuff and I believe this series
is partially based on my work at Lemote.
I will help with reviewing and explain some Loongson64 specified issue
if possible.
Than
The documentation for render nodes indicates that only "PRIME-related"
ioctls are valid on render nodes, but the documentation does not clarify
what that means. If the reader is not familiar with PRIME, they may
beleive this to be only the ioctls with "PRIME" in the name and not other
ioctls such
On Sun, 23 Jan 2022 18:51:56 +0100, Uwe Kleine-König wrote:
> this series goal is to change the spi remove callback's return value to void.
> After numerous patches nearly all drivers already return 0 unconditionally.
> The four first patches in this series convert the remaining three drivers to
>
在 2022/2/9 8:52, Maxime Ripard 写道:
On Thu, Feb 03, 2022 at 11:47:16PM +0800, Sui Jingfeng wrote:
[...]
DT isn't really a solution either. Let's take the distribution
perspective there. Suppose you're a Fedora or Debian developer, and want
to make a single kernel image, and ship a DT to the u
Hi
Am Mittwoch, den 09.02.2022, 00:52 +0100 schrieb Marek Vasut:
> On 2/8/22 22:27, Christoph Niedermaier wrote:
> > From: Laurent Pinchart [mailto:laurent.pinch...@ideasonboard.com]
> > Sent: Thursday, February 3, 2022 12:46 AM
> > > Hi Christoph,
> > >
> >
> > Hi Laurent,
> >
> > > On Tue, Fe
>-Original Message-
>From: Krzysztof Kozlowski [mailto:krzysztof.kozlow...@canonical.com]
>Sent: Tuesday, February 8, 2022 10:48 PM
>To: Inki Dae ; Joonyoung Shim
>; Seung-Woo Kim
>; Kyungmin Park
>; David Airlie ; Daniel
>Vetter ; Rob Herring ; Krzysztof
>Kozlowski ; Alim Akhtar
>; Kish
In function do_remove_conflicting_framebuffers, if device is NULL, there
will be null pointer reference. The patch add a check to the if expression.
Signed-off-by: Zhouyi Zhou
---
Dear Linux folks
I discover this bug in the PowerPC VM provided by
Open source lab of Oregon State University:
http
>-Original Message-
>From: Krzysztof Kozlowski [mailto:krzysztof.kozlow...@canonical.com]
>Sent: Tuesday, February 8, 2022 10:48 PM
>To: Inki Dae ; Joonyoung Shim
>; Seung-Woo Kim
>; Kyungmin Park
>; David Airlie ; Daniel
>Vetter ; Rob Herring ; Krzysztof
>Kozlowski ; Alim Akhtar
>; Kish
Am Dienstag, den 01.02.2022, 12:36 +0100 schrieb Christoph Niedermaier:
> If display timings were read from the devicetree using
> of_get_display_timing() and pixelclk-active is defined
> there, the flag DISPLAY_FLAGS_SYNC_POSEDGE/NEGEDGE is
> automatically generated. Through the function
> drm_bus
Hi Marek,
I like the overall idea. Thanks for the effort.
Am Sonntag, 6. Februar 2022, 19:55:55 CET schrieb Marek Vasut:
> The current clock handling in the LCDIF driver is a convoluted mess.
> Implement runtime PM ops which turn the clock ON and OFF and let the
> pm_runtime_get_sync()/pm_runtime
From: Wang Qing
It is better use time_xxx() directly instead of jiffies judgment
for understanding.
Signed-off-by: Wang Qing
---
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
b/
From: Wang Qing
It is better to use time_xxx() directly instead of jiffies judgment
for understanding.
Signed-off-by: Wang Qing
---
drivers/gpu/drm/radeon/radeon_pm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c
b/drivers/gpu/drm/rad
On Wed, Feb 09, 2022 at 05:32:15PM +0200, Andy Shevchenko wrote:
> On Wed, Feb 09, 2022 at 03:42:16PM +0100, Javier Martinez Canillas wrote:
> > On 2/9/22 15:27, Geert Uytterhoeven wrote:
>
> ...
>
> > Now, this is a reason why I mentioned that the old fbdev driver shouldn't
> > be removed yet.
>
Il 10/02/22 04:06, yunfei.d...@mediatek.com ha scritto:
Hi Rob,
Thanks for your suggestion.
On Wed, 2022-02-09 at 14:37 -0600, Rob Herring wrote:
On Fri, Jan 28, 2022 at 11:54:34AM +0800, Yunfei Dong wrote:
Adds decoder dt-bindings for compatible "mediatek,mtk-vcodec-lat-
soc".
What's lat so
Hi Harry,
On Mon, Feb 07, 2022 at 01:59:38PM -0500, Harry Wentland wrote:
> On 2022-02-07 13:57, Harry Wentland wrote:
> > On 2022-02-07 11:34, Maxime Ripard wrote:
> >> The amdgpu KMS driver calls drm_plane_create_color_properties() with a
> >> default encoding set to BT709.
> >>
> >> However, th
Hi,
On Mon, Feb 07, 2022 at 10:27:24PM +0300, Dmitry Baryshkov wrote:
> On Mon, 7 Feb 2022 at 19:56, Maxime Ripard wrote:
> >
> > While the mdp5_plane_install_properties() function calls
> > drm_plane_create_zpos_property() with an initial value of 1,
> > mdp5_plane_reset() will force it to anoth
Hi Ville,
Thanks for your review
On Thu, Feb 03, 2022 at 09:59:15PM +0200, Ville Syrjälä wrote:
> > +static int
> > +vc4_hdmi_encoder_compute_clock(const struct vc4_hdmi *vc4_hdmi,
> > + struct vc4_hdmi_connector_state *vc4_state,
> > + const stru
On 13/08/21, Greg KH wrote:
> On Fri, Aug 13, 2021 at 02:54:30PM +0200, Oliver Graute wrote:
> > On 13/08/21, Greg KH wrote:
> > > On Fri, Aug 13, 2021 at 08:25:10AM +0200, Oliver Graute wrote:
> > > > staging: fbtft: fb_st7789v: reset display before initialization
> > >
> > > What is this line he
In rare cases the display is flipped or mirrored. This was observed more
often in a low temperature environment. A clean reset on init_display()
should help to get registers in a sane state.
Fixes: ef8f317795da (staging: fbtft: use init function instead of init sequence)
Cc: sta...@vger.kernel.org
On 2/10/22 06:22, Liu Ying wrote:
Hi,
[...]
There are many blank areas which are undocumented, this LCDIF
CRC32
feature, i.MX8M Mini Arteris NOC at 0x3270 , the ARM GPV
NIC-
301
at
0x32{0,1,2,3,4,5,6,8}0 and their master/slave port
mapping.
The
NOC
and NICs were documented at least up
Am 10.02.22 um 08:06 schrieb Christian König:
Am 10.02.22 um 04:17 schrieb Andrey Grodzovsky:
Seems I forgot to add this to the relevant commit
when submitting.
Rebase/merge issue? Looks like it.
Signed-off-by: Andrey Grodzovsky
Reported-by: kernel test robot
Reviewed-by: Christian Köni
On 10/02/2022 03:25, Abhinav Kumar wrote:
On 1/21/2022 1:06 PM, Dmitry Baryshkov wrote:
INTF blocks are not really handled by resource manager, they are
assigned at dpu_encoder_setup_display using dpu_encoder_get_intf().
Then this allocation is passed to RM and then returned to then
dpu_encode
On Fri, 21 Jan 2022 18:38:29 -0300
Igor Torrente wrote:
> Currently the blend function only accepts XRGB_ and ARGB_
> as a color input.
>
> This patch refactors all the functions related to the plane composition
> to overcome this limitation.
>
> A new internal format(`struct pixel`) is
On Thu, Feb 10, 2022 at 3:28 PM Christoph Hellwig wrote:
>
> hmm.h pulls in the world for no good reason at all. Remove the
> includes and push a few ones into the users instead.
>
> Signed-off-by: Christoph Hellwig
> Reviewed-by: Logan Gunthorpe
> Reviewed-by: Jason Gunthorpe
> Reviewed-by: C
Hi Dave and Daniel,
here's this week's PR for drm-misc-fixes. The most notable thing is the
addition of the new fbdev core module.
Best regards
Thomas
drm-misc-fixes-2022-02-10:
* drm/panel: simple: Fix assignments from panel_dpi_probe()
* drm/privacy-screen: Cleanups
* drm/rockchip: Fix HDMI
On Fri, 21 Jan 2022 18:38:31 -0300
Igor Torrente wrote:
> Adds this common format to vkms.
>
> This commit also adds new helper macros to deal with fixed-point
> arithmetic.
>
> It was done to improve the precision of the conversion to ARGB16161616
> since the "conversion ratio" is not an integ
On 10/02/2022 01:17, Dmitry Baryshkov wrote:
On 09/02/2022 11:37, Qing Wang wrote:
From: Wang Qing
do_div() does a 64-by-32 division.
When the divisor is u64, do_div() truncates it to 32 bits, this means it
can test non-zero and be truncated to zero for division.
fix do_div.cocci warning:
do_
On Thu, Feb 03, 2022 at 10:07:22PM +0200, Ville Syrjälä wrote:
> On Thu, Jan 27, 2022 at 03:10:21PM +0100, Maxime Ripard wrote:
> > +/*
> > + * Conversion between Full Range RGB and Full Range YUV444 using the
> > + * BT.709 Colorspace
> > + *
> > + * [ -0.117208 -0.394207 0.511416 128 ]
> > + *
On Thu, Feb 10, 2022 at 11:03:43AM +0100, Maxime Ripard wrote:
> On Thu, Feb 03, 2022 at 10:07:22PM +0200, Ville Syrjälä wrote:
> > On Thu, Jan 27, 2022 at 03:10:21PM +0100, Maxime Ripard wrote:
> > > +/*
> > > + * Conversion between Full Range RGB and Full Range YUV444 using the
> > > + * BT.709 C
Hi Stephen,
On Tue, Jan 25, 2022 at 03:15:39PM +0100, Maxime Ripard wrote:
> Hi,
>
> This is a follow-up of the discussion here:
> https://lore.kernel.org/linux-clk/20210319150355.xzw7ikwdaga2dwhv@gilmour/
>
> and here:
> https://lore.kernel.org/all/20210914093515.260031-1-max...@cerno.tech/
>
On 08/12/2021 01:29, Dmitry Baryshkov wrote:
Currently the DSI driver has two separate paths: one if the next device
in a chain is a bridge and another one if the panel is connected
directly to the DSI host. Simplify the code path by using panel-bridge
driver (already selected in Kconfig) and dro
On 10/02/2022 01:26, Michael Cheng wrote:
Add arm64 support for drm_clflush_virt_range. dcache_clean_inval_poc
performs a flush by first performing a clean, follow by an invalidation
operation.
v2 (Michael Cheng): Use correct macro for cleaning and invalidation the
dcache.
Display Stream Compression (DSC) compresses the display stream in host which
is later decoded by panel. This series enables this for Qualcomm msm driver.
This was tested on Google Pixel3 phone which use LGE SW43408 panel.
The changes include DSC data and hardware block enabling for DPU1 then
supp
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 132 +
When DSC is enabled, we need to pass the DSC parameters to panel driver
as well, so add a dsc parameter in panel and set it when DSC is enabled
Also, fetch and pass DSC configuration for DSI panels to DPU encoder,
which will enable and configure DSC hardware blocks accordingly.
Signed-off-by: Dmi
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 13 ++
drivers/gpu/drm/
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Reviewed-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1/dpu_hw_
This adds SDM845 DSC blocks into hw_catalog
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 20 +++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/di
Later gens of hardware have DSC bits moved to hw_ctl, so configure these
bits so that DSC would work there as well
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 11 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 ++
2 files
We need to configure the encoder for DSC configuration and calculate DSC
parameters for the given timing so this patch adds that support by
adding dpu_encoder_prep_dsc() which is invoked when DSC is enabled.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 164 ++
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm
Somehow documentation for dspp was missed, so add that
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/msm_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index e7a312edfe67..6425a42e997c 100644
--- a/drivers/gpu/drm/msm/m
For DSC to work we typically need a 2,2,1 configuration. This should
suffice for resolutions up to 4k. For more resolutions like 8k this won't
work.
Also, it is better to use 2 LMs and DSC instances as half width results
in lesser power consumption as compared to single LM, DSC at full width.
The
I got the following build error:
/data/source/linux/mm/migrate_device.c: In function ‘migrate_vma_collect_pmd’:
/data/source/linux/mm/migrate_device.c:242:3: error: implicit declaration of
function ‘flush_tlb_range’; did you mean ‘flush_pmd_tlb_range’?
[-Werror=implicit-function-declaration]
2
This add the bits in RM to enable the DSC blocks
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 56 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 +
3 files changed, 5
Add a mode valid callback for dsi_mgr for checking mode being valid in
case of DSC. For DSC the height and width needs to be multiple of slice,
so we check that here
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi.h | 2 ++
drivers/gpu/drm/msm/ds
When DSC is enabled, we need to configure DSI registers accordingly and
configure the respective stream compression registers.
Add support to calculate the register setting based on DSC params and
timing information and configure these registers.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Vi
On 10/02/2022 13:34, Vinod Koul wrote:
Somehow documentation for dspp was missed, so add that
Signed-off-by: Vinod Koul
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm
Thanks, it's also better than more stubbed functions.
Reviewed-by: Alistair Popple
On Thursday, 10 February 2022 6:28:15 PM AEDT Christoph Hellwig wrote:
> This code will be used for device coherent memory as well in a bit,
> so relax the ifdef a bit.
>
> Signed-off-by: Christoph Hellwig
> ---
On 10/02/2022 13:34, Vinod Koul wrote:
When DSC is enabled, we need to pass the DSC parameters to panel driver
as well, so add a dsc parameter in panel and set it when DSC is enabled
Also, fetch and pass DSC configuration for DSI panels to DPU encoder,
which will enable and configure DSC hardwar
Reviewed-by: Alistair Popple
On Thursday, 10 February 2022 6:28:13 PM AEDT Christoph Hellwig wrote:
> Make the flow a little more clear and prepare for adding a new
> ZONE_DEVICE memory type.
>
> Signed-off-by: Christoph Hellwig
> ---
> mm/migrate.c | 27 ---
> 1 file c
On 10/02/2022 13:34, Vinod Koul wrote:
For DSC to work we typically need a 2,2,1 configuration. This should
suffice for resolutions up to 4k. For more resolutions like 8k this won't
work.
Also, it is better to use 2 LMs and DSC instances as half width results
in lesser power consumption as compa
Reviewed-by: Alistair Popple
On Thursday, 10 February 2022 6:28:12 PM AEDT Christoph Hellwig wrote:
> Make the flow a little more clear and prepare for adding a new
> ZONE_DEVICE memory type.
>
> Signed-off-by: Christoph Hellwig
> ---
> mm/migrate.c | 31 +++
> 1 fi
Hi Dave, Daniel,
An assortment of fixes for -rc4, mostly display, one TTM migration fixup,
one fix for platforms without runtime PM and one !x86 build fix.
Regards,
Tvrtko
drm-intel-fixes-2022-02-10:
- Build fix for non-x86 platforms after remap_io_mmapping changes. (Lucas De
Marchi)
- Corr
On 07.02.22 05:26, Alistair Popple wrote:
> Currently any attempts to pin a device coherent page will fail. This is
> because device coherent pages need to be managed by a device driver, and
> pinning them would prevent a driver from migrating them off the device.
>
> However this is no reason to
On 10/02/2022 13:34, Vinod Koul wrote:
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off
Hi Dave and Daniel,
Just two fixup series - one is to fix irq chaining issue and other is
regressions to TE-gpio handling.
Please let me know if there is any problem.
Thanks,
Inki Dae
The following changes since commit dfd42facf1e4ada021b939b4e19c935dcdd55566:
Linux 5.17-rc3 (2022-02-0
On Thursday, 10 February 2022 6:28:01 PM AEDT Christoph Hellwig wrote:
[...]
> Changes since v1:
> - add a missing memremap.h include in memcontrol.c
> - include rebased versions of the device coherent support and
>device coherent migration support series as well as additional
>cleanup
On 2/7/22 5:35 PM, Maxime Ripard wrote:
The sti KMS driver will call drm_plane_create_zpos_property() with an
init value depending on the plane type.
Since the initial value wasn't carried over in the state, the driver had
to set it again in sti_plane_reset() and rcar_du_vsp_plane_reset().
On 10/02/2022 13:34, Vinod Koul wrote:
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Signed-off-by: Vinod Koul
Reviewed-by: Dmitry Baryshkov
On 10/02/2022 13:34, Vinod Koul wrote:
We need to configure the encoder for DSC configuration and calculate DSC
parameters for the given timing so this patch adds that support by
adding dpu_encoder_prep_dsc() which is invoked when DSC is enabled.
Signed-off-by: Vinod Koul
Reviewed-by: Dmitry
Am 08.02.22 um 22:08 schrieb Daniel Vetter:
I didn't bother with any code movement to fix the others, these just
got a bit in the way.
v2: Rebase on top of Helge's reverts.
Acked-by: Sam Ravnborg (v1)
Reviewed-by: Geert Uytterhoeven (v1)
Signed-off-by: Daniel Vetter
Cc: Helge Deller
Cc: D
Am 08.02.22 um 22:08 schrieb Daniel Vetter:
Avoids two forward declarations, and more importantly, matches what
I've done in my fbcon scrolling restore patches - so I need this to
avoid a bunch of conflicts in rebasing since we ended up merging
Helge's series instead.
Signed-off-by: Daniel Vet
Am 08.02.22 um 22:08 schrieb Daniel Vetter:
Half of it is protected by console_lock, but the other half is a lot
more awkward: Registration/deregistration of fbdev are serialized, but
we don't really clear out anything in con2fb_map and so there's
potential for use-after free mixups.
First ste
Am 08.02.22 um 22:08 schrieb Daniel Vetter:
Before
commit 6104c37094e729f3d4ce65797002112735d49cd1
Author: Daniel Vetter
Date: Tue Aug 1 17:32:07 2017 +0200
fbcon: Make fbcon a built-time depency for fbdev
it was possible to load fbcon and fbdev drivers in any order, which
means that
Am 08.02.22 um 22:08 schrieb Daniel Vetter:
fb_set_var requires we hold the fb_info lock. Or at least this now
matches what the ioctl does ...
Note that ps3fb and sh_mobile_lcdcfb are busted in different ways here,
but I will not fix them up.
Also in practice this isn't a big deal, because re
Am 08.02.22 um 22:08 schrieb Daniel Vetter:
Allows us to delete a bunch of hand-rolled stuff. Also to simplify the
code we initialize the cursor_work completely when we allocate the
fbcon_ops structure, instead of trying to cope with console
re-initialization.
The motiviation here is that fbco
Am 08.02.22 um 22:08 schrieb Daniel Vetter:
It was only used by fbcon, and that now switched to its own,
private work.
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Helge Deller
Cc: linux-fb...@vger.kernel.org
Acked-by: Thomas Zimmermann
---
include/linux/fb.h | 1 -
1 fil
On Thursday, 10 February 2022 9:53:38 PM AEDT David Hildenbrand wrote:
> On 07.02.22 05:26, Alistair Popple wrote:
> > Currently any attempts to pin a device coherent page will fail. This is
> > because device coherent pages need to be managed by a device driver, and
> > pinning them would prevent
We get warning:
In function ‘dpu_encoder_virt_enable’:
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:1145:33:
warning: variable ‘priv’ set but not used [-Wunused-but-set-variable]
1145 | struct msm_drm_private *priv;
In function ‘dpu_encoder_virt_disable’:
drivers/gpu/drm/msm/disp/dpu1/d
dpu_core_irq_callback_handler() function comments seem to have become
stale and emit a warning:
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c:147:
warning: Function parameter or member 'dpu_kms' not described in
'dpu_core_irq_callback_handler'
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
Hi
Am 08.02.22 um 22:08 schrieb Daniel Vetter:
There's two minor behaviour changes in here:
- in error paths we now consistently call fb_ops->fb_release
- fb_release really can't fail (fbmem.c ignores it too) and there's no
reasonable cleanup we can do anyway.
Note that everything in fbcon.c
On 10.02.22 12:39, Alistair Popple wrote:
> On Thursday, 10 February 2022 9:53:38 PM AEDT David Hildenbrand wrote:
>> On 07.02.22 05:26, Alistair Popple wrote:
>>> Currently any attempts to pin a device coherent page will fail. This is
>>> because device coherent pages need to be managed by a devic
On Thu, Feb 10, 2022 at 01:10:32AM +0100, Johan Jonker wrote:
> Hi Sascha,
>
> Something with port and endpoint gives notifications.
> Somehow with the conversion of rockchip,dw-hdmi.txt to YAML not all SoC
> options were checked/covered (see rk3328 and rk3568).
>
> Allow multiple vop:
> port or
The multi line comment style is wrongly used as kernel-doc comment. This
gives a warning:
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c:17:
warning: This comment starts with '/**', but isn't a kernel-doc comment.
Refer Documentation/doc-guide/kernel-doc.rst
Update the style to fix this.
Sign
On Wed, Feb 09, 2022 at 01:12:45PM +0200, Jani Nikula wrote:
> On Wed, 09 Feb 2022, Sascha Hauer wrote:
> > David, Daniel,
> >
> > I'll need a word from you regarding this patch. It's needed in patch
> > 22/23 in this series.
> > vop2_crtc_atomic_enable() needs to control the mux which routes the
Hi Stephen,
Will implement all the suggested changes.
Thank you,
Sankeerth
-Original Message-
From: Stephen Boyd
Sent: Thursday, February 10, 2022 6:45 AM
To: Sankeerth Billakanti (QUIC) ; agr...@kernel.org;
airl...@linux.ie; bjorn.anders...@linaro.org; dan...@ffwll.ch;
devicet...@vge
Hi Stephen,
Thank you for the review. I will share the new patch.
-Original Message-
From: Stephen Boyd
Sent: Thursday, February 10, 2022 6:47 AM
To: Sankeerth Billakanti (QUIC) ; agr...@kernel.org;
airl...@linux.ie; bjorn.anders...@linaro.org; dan...@ffwll.ch;
devicet...@vger.kernel.o
Hi Stephen,
Will make the changes.
-Original Message-
From: Stephen Boyd
Sent: Thursday, February 10, 2022 6:52 AM
To: Sankeerth Billakanti (QUIC) ; agr...@kernel.org;
airl...@linux.ie; bjorn.anders...@linaro.org; dan...@ffwll.ch;
devicet...@vger.kernel.org; diand...@chromium.org;
dri
Add support for the eDP panel on sc7280 CRD platform. The eDP panel does
not need HPD line for connect disconnect. So, this series will report eDP
as always connected. The driver needs to register for IRQ_HPD only for eDP.
This support will be added later.
These changes are dependent on the follow
Add support for sharp LQ140M1JW46 display panel. It is a 14" eDP panel
with 1920x1080 display resolution.
Signed-off-by: Sankeerth Billakanti
Acked-by: Rob Herring
Reviewed-by: Stephen Boyd
---
Changes in v4:
None
Changes in v3:
None
Documentation/devicetree/bindings/display/panel/panel
Enable the eDP display panel support without HPD on sc7280 platform.
Signed-off-by: Sankeerth Billakanti
---
Changes in v4:
- Create new patch for name changes
- Remove output-low
Changes in v3:
- Sort the nodes alphabetically
- Use - instead of _ as node names
- Place the backlight a
Rename the edp_out label in the sc7280 platform to mdss_edp_out.
Signed-off-by: Sankeerth Billakanti
---
arch/arm64/boot/dts/qcom/sc7280-crd.dts | 10 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi| 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qc
Add support for the 14" sharp,lq140m1jw46 eDP panel.
Signed-off-by: Sankeerth Billakanti
---
00 ff ff ff ff ff ff 00 4d 10 23 15 00 00 00 00
35 1e 01 04 a5 1f 11 78 07 de 50 a3 54 4c 99 26
0f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 5a 87 80 a0 70 38 4d 40 30 20
35 00 35 ae
Add support in the DP driver to utilize the custom eDP panels
from drm/panels.
An eDP panel is always connected to the platform. So, the eDP
connector can be reported as always connected. The display mode
will be sourced from the panel. The panel mode will be set after
the link training is complet
On 2022/02/09 6:08, Daniel Vetter wrote:
> @@ -714,6 +700,8 @@ static int con2fb_acquire_newinfo(struct vc_data *vc,
> struct fb_info *info,
> ops = kzalloc(sizeof(struct fbcon_ops), GFP_KERNEL);
> if (!ops)
> err = -ENOMEM;
> +
> + INI
Starting from DG2 we will have resizable BAR support for device local-memory,
but in some cases the final BAR size might still be smaller than the total
local-memory size. In such cases only part of local-memory will be CPU
accessible, while the remainder is only accessible via the GPU. This series
With small LMEM-BAR we need to be able to differentiate between the
total size of LMEM, and how much of it is CPU mappable. The end goal is
to be able to utilize the entire range, even if part of is it not CPU
accessible.
v2: also update intelfb_create
Signed-off-by: Matthew Auld
Cc: Thomas Hell
On devices with non-mappable LMEM ensure we always allocate the pages
within the mappable portion. For now we assume that all LMEM buffers
will require CPU access, which is also inline with pretty much all
current kernel internal users. In the next patch we will introduce a new
flag to override thi
If the user doesn't require CPU access for the buffer, then
ALLOC_GPU_ONLY should be used, in order to prioritise allocating in the
non-mappable portion of LMEM, on devices with small BAR.
v2(Thomas):
- The BO_ALLOC_TOPDOWN naming here is poor, since this is pure lies on
systems that don't e
Differentiate between mappable vs non-mappable resources, also if this
is an actual range allocation ensure we set res->start as the starting
pfn. Later when we need to do non-mappable -> mappable moves then we
want TTM to see that the current placement is not compatible, which
should result in an
Track the total amount of available visible memory, and also track
per-resource the amount of used visible memory. For now this is useful
for our debug output, and deciding if it is even worth calling into the
buddy allocator. In the future tracking the per-resource visible usage
will be useful for
Check that mappable vs non-mappable matches our expectations.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
---
.../drm/i915/selftests/intel_memory_region.c | 143 ++
1 file changed, 143 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftest
Otherwise we get -EINVAL, instead of the more useful -E2BIG if the
allocation doesn't fit within the pfn range, like with mappable lmem.
The hugepages selftest, for example, needs this to know if a smaller
size is needed.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Reviewed-by: Thomas Hells
If we need to make room for some mappable object, then we should
only victimize objects that have one or pages that occupy the visible
portion of LMEM. Let's also create a new priority hint for objects that
are placed in mappable memory, where we know that CPU access was
requested, that way we hope
Exercise each of the migration scenarios, verifying that the final
placement and buffer contents match our expectations.
v2(Thomas): Replace for_i915_gem_ww() block with simpler object_lock()
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c |
The end goal is to have userspace tell the kernel what buffers will
require CPU access, however if we ever reach the CPU fault handler, and
the current resource is not mappable, then we should attempt to migrate
the buffer to the mappable portion of LMEM, or even system memory, if the
allowable pla
Just pass along the probed io_size. The backend should be able to
utilize the entire range here, even if some of it is non-mappable.
It does leave open with what to do with stolen local-memory.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 6
Starting from DG2+, when dealing with LMEM, we assume that by default
all userspace allocations should be placed in the non-mappable portion
of LMEM. Note that dumb buffers are not included here, since these are
not "GPU accelerated" and likely need CPU access.
In a later patch userspace will be
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