On Sat, Feb 05, 2022 at 08:40:48AM +0100, Christophe JAILLET wrote:
> kmalloc_array()/kcalloc() should be used to avoid potential overflow when
> a multiplication is needed to compute the size of the requested memory.
>
> So turn a kzalloc()+explicit size computation into an equivalent kcalloc().
Am 05.02.22 um 18:38 schrieb Christophe JAILLET:
kmalloc_array()/kcalloc() should be used to avoid potential overflow when
a multiplication is needed to compute the size of the requested memory.
So turn a kzalloc()+explicit size computation into an equivalent kcalloc().
Signed-off-by: Christoph
On 2/7/22 06:13, Liu Ying wrote:
Hi Marek,
Hi,
On Sun, 2022-02-06 at 19:56 +0100, Marek Vasut wrote:
The LCDIF controller as present in i.MX6SX/i.MX8M Mini/Nano has a CRC_STAT
register, which contains CRC32 of the frame as it was clocked out of the
DPI interface of the LCDIF. This is likely
Hi Sam,
On 06/02/2022 22:33, Sam Ravnborg wrote:
Hi Neail,
On Fri, Feb 04, 2022 at 03:33:37PM +0100, Neil Armstrong wrote:
When the dw-hdmi bridge is in first place of the bridge chain, this
means there is no way to select an input format of the dw-hdmi HW
component.
Since introduction of dis
Hi
Am 04.02.22 um 20:44 schrieb Lucas De Marchi:
[...]
I only came up with such a macro after doing the rest of the patches and
noticing a pattern that is hard to debug otherwise. I expanded the
explanation in the doc above this macro.
Maybe something like:
#define IOSYS_MAP_INIT_OFFSET(map_,
The commercial variant has a controller for e-Paper displays.
Signed-off-by: Andreas Kemnade
---
arch/arm/boot/dts/imx6sll.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index d4a000c3dde7..042e8a391b2f 100644
---
The EPDC can process some dirty rectangles at a time, pick them up and
forward them to the controller. Only processes not involving PXP are
supported at the moment. Due to that and to work with more waveforms,
there is some masking/shifting done. It was tested with the factory
waveforms of Kobo Cla
syzbot has found a reproducer for the following issue on:
HEAD commit:0457e5153e0e Merge tag 'for-linus' of git://git.kernel.org..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=11b2637c70
kernel config: https://syzkaller.appspot.com/x/.config?x=6f04311
Add a driver for the Electrophoretic Display Controller found in the
i.MX6 SoCs.
In combination with a driver for an EPD PMIC (like the TPS65185 or the
SY7636A), it works with the EPDC found in i.MX6SLL based devices and the
EPDC found in i.MX6SL devices.
Support for waveforms might be limited, t
This driver is for the EPD controller in the i.MX SoCs. Add a skeleton
and basic things for the driver
Signed-off-by: Andreas Kemnade
---
drivers/gpu/drm/Kconfig | 2 +
drivers/gpu/drm/Makefile| 1 +
drivers/gpu/drm/mxc-epdc/Kconfig| 15 +
drivers/gpu
On 2021-09-15 17:19:39 +0200, Thierry Reding wrote:
> On Tue, Sep 07, 2021 at 07:44:44PM +0200, Thierry Reding wrote:
> > On Tue, Sep 07, 2021 at 10:33:24AM -0500, Rob Herring wrote:
> > > On Fri, Sep 3, 2021 at 10:36 AM Thierry Reding
> > > wrote:
> > > >
> > > > On Fri, Sep 03, 2021 at 09:36:33
Extend definition of EPDC.
Signed-off-by: Andreas Kemnade
---
arch/arm/boot/dts/imx6sl.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index c7d907c5c352..919e86e4fc74 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/
Adds display parameter initialisation, display power up/down and
waveform loading
Signed-off-by: Andreas Kemnade
---
drivers/gpu/drm/mxc-epdc/Makefile| 2 +-
drivers/gpu/drm/mxc-epdc/epdc_hw.c | 495 +++
drivers/gpu/drm/mxc-epdc/epdc_hw.h | 8 +
driver
Add a binding for the Electrophoretic Display Controller found at least
in the i.MX6.
The timing subnode is directly here to avoid having display parameters
spread all over the plate.
Supplies are organized the same way as in the fbdev driver in the
NXP/Freescale kernel forks. The regulators used
On Mon, 2022-02-07 at 09:14 +0100, Marek Vasut wrote:
> On 2/7/22 06:13, Liu Ying wrote:
> > Hi Marek,
>
> Hi,
>
> > On Sun, 2022-02-06 at 19:56 +0100, Marek Vasut wrote:
> > > The LCDIF controller as present in i.MX6SX/i.MX8M Mini/Nano has a
> > > CRC_STAT
> > > register, which contains CRC32 of
On Mon, 07 Feb 2022, Uwe Kleine-König wrote:
> On Sat, Feb 05, 2022 at 08:40:48AM +0100, Christophe JAILLET wrote:
> > kmalloc_array()/kcalloc() should be used to avoid potential overflow when
> > a multiplication is needed to compute the size of the requested memory.
> >
> > So turn a kzalloc()+
On flat-ccs capable platform we need to evict and resore the ccs data
along with the corresponding main memory.
This ccs data can only be access through BLT engine through a special
cmd ( )
To support above requirement of flat-ccs enabled i915 platforms this
series adds new param called ccs_pages
While evicting the local memory data on flat-ccs capable platform we
need to evict the ccs data associated to the data. For this, we are
adding extra pages ((size / 256) >> PAGE_SIZE) into the ttm_tt.
To achieve this we are adding a new param into the ttm_tt_init as
ccs_pages_needed, which will be
When we are swapping out the local memory obj on flat-ccs capable platform,
we need to capture the ccs data too along with main meory and we need to
restore it when we are swapping in the content.
Extracting and restoring the CCS data is done through a special cmd called
XY_CTRL_SURF_COPY_BLT
Sig
Hi Nathan,
On 2/2/22 17:54, Nathan Chancellor wrote:
Hi Yannick,
On Wed, Dec 15, 2021 at 10:48:43PM +0100, Yannick Fertre wrote:
This patch adds the following YCbCr input pixel formats on the latest
LTDC hardware version:
1 plane (co-planar) : YUYV, YVYU, UYVY, VYUY
2 planes (semi-planar):
On Thu, 3 Feb 2022 16:11:51 +0100, Maxime Ripard wrote:
> The variable is assigned twice to the same value. Let's drop one.
>
>
Applied to drm/drm-misc (drm-misc-fixes).
Thanks!
Maxime
Hi, Ram,
On 2/7/22 10:37, Ramalingam C wrote:
While evicting the local memory data on flat-ccs capable platform we
need to evict the ccs data associated to the data.
For this, we are
adding extra pages ((size / 256) >> PAGE_SIZE) into the ttm_tt.
To achieve this we are adding a new param
On 2/7/22 10:18, Liu Ying wrote:
Hi,
On Sun, 2022-02-06 at 19:56 +0100, Marek Vasut wrote:
The LCDIF controller as present in i.MX6SX/i.MX8M Mini/Nano has a
CRC_STAT
register, which contains CRC32 of the frame as it was clocked out
of the
DPI interface of the LCDIF. This is likely meant as a f
On 04/02/2022 01:19, Vivek Kasireddy wrote:
This iterator relies on drm_mm_first_hole() and drm_mm_next_hole()
functions to identify suitable holes for an allocation of a given
size by efficiently traversing the rbtree associated with the given
allocator.
It replaces the for loop in drm_mm_ins
On Mon, 07 Feb 2022, Christoph Hellwig wrote:
> On Mon, Feb 07, 2022 at 08:28:13AM +, Wang, Zhi A wrote:
>> 1) About having the mmio_table.h, I would like to keep the stuff in a
>> dedicated header as putting them in intel_gvt.h might needs i915 guys
>> to maintain it.
>> 2) The other one is a
On Fri, 04 Feb 2022, Kees Cook wrote:
> Ping,
>
> This is a OOB read fix. Can someone please pick this up?
Daniel? Thierry?
As I said, I reviewed this but I'm not comfortable applying patches that
change the functionality of drivers I don't maintain.
BR,
Jani.
>
> -Kees
>
> On Wed, Jan 05, 20
Hi Thomas,
On Thu, 3 Feb 2022 at 15:09, Thomas Zimmermann wrote:
>
> As reported in [1], DRM_PANEL_EDP depends on DRM_DP_HELPER. Select
> the option to fix the build failure. The error message is shown
> below.
>
> arm-linux-gnueabihf-ld: drivers/gpu/drm/panel/panel-edp.o: in function
> `pa
Op 04-02-2022 om 19:29 schreef Christian König:
> Oh, that's on my TODO list for years!
>
> Am 04.02.22 um 18:48 schrieb Maarten Lankhorst:
>> Suballocating a buffer object is something that is not driver
>> generic, and is useful for other drivers as well.
>>
>> Signed-off-by: Maarten Lankhorst
>
Fix the following warning from "make htmldocs":
drivers/gpu/drm/drm_privacy_screen.c:392:
warning: Function parameter or member 'data' not described in
'drm_privacy_screen_register'
Fixes: 30598d925d46 ("drm/privacy_screen: Add drvdata in drm_privacy_screen")
Cc: Rajat Jain
Reported-by: Step
Reviewed-by: Simon Ser
Hi Simon,
On 2/7/22 12:37, Simon Ser wrote:
> Reviewed-by: Simon Ser
Thank you, I also have this very similar patch pennding (also a simple htmldocs
warning fix).
Any chance you can also review this one? :
https://patchwork.freedesktop.org/patch/470957/
Regards,
Hans
Am 07.02.22 um 10:37 schrieb Ramalingam C:
On flat-ccs capable platform we need to evict and resore the ccs data
along with the corresponding main memory.
This ccs data can only be access through BLT engine through a special
cmd ( )
To support above requirement of flat-ccs enabled i915 platform
On Wednesday, January 26th, 2022 at 16:11, Hans de Goede
wrote:
> - * A pointer to the drm_privacy_screen's struct is passed as the void *data
> + * A pointer to the drm_privacy_screen's struct is passed as the void \*data
Maybe we can use @data here instead? It's used to refer to arguments or
On Fri, 28 Jan 2022 at 18:52, Ramalingam C wrote:
>
> An indirect ctx wabb is implemented as per Wa_22011450934 to avoid rcs
> restore hang during context restore of a preempted context in GPGPU mode
>
> Signed-off-by: Ramalingam C
> cc: Chris Wilson
Acked-by: Matthew Auld
On 07/02/2022 11:48, Matthew Auld wrote:
On Fri, 28 Jan 2022 at 18:52, Ramalingam C wrote:
An indirect ctx wabb is implemented as per Wa_22011450934 to avoid rcs
restore hang during context restore of a preempted context in GPGPU mode
Signed-off-by: Ramalingam C
cc: Chris Wilson
Acked-by:
On 2/7/22 05:48, Jani Nikula wrote:
On Mon, 07 Feb 2022, Christoph Hellwig wrote:
On Mon, Feb 07, 2022 at 08:28:13AM +, Wang, Zhi A wrote:
1) About having the mmio_table.h, I would like to keep the stuff in a
dedicated header as putting them in intel_gvt.h might needs i915 guys
to maintai
On 04/02/2022 16:37, Michael Cheng wrote:
Drop invalidate_csb_entries and directly call drm_clflush_virt_range.
This allows for one less function call, and prevent complier errors when
building for non-x86 architectures.
v2(Michael Cheng): Drop invalidate_csb_entries function and directly
On 04/02/2022 16:37, Michael Cheng wrote:
This patch series re-work a few i915 functions to use drm_clflush_virt_range
instead of calling clflush or clflushopt directly. This will prevent errors
when building for non-x86 architectures.
v2: s/PAGE_SIZE/sizeof(value) for Re-work intel_write_stat
On Mon, 07 Feb 2022, Christoph Hellwig wrote:
> On Mon, Feb 07, 2022 at 06:57:13AM -0500, Zhi Wang wrote:
>> Hi Christoph and Jani:
>>
>> Thanks for the comments. It would be nice that people can achieve a
>> agreement. I am OK with both of the options and also moving some files into
>> differen
Hi
Am 04.02.22 um 22:02 schrieb Ilia Mirkin:
On Fri, Feb 4, 2022 at 10:53 AM Thomas Zimmermann wrote:
Hi
Am 04.02.22 um 14:43 schrieb Javier Martinez Canillas:
Add support to convert XR24 and 8-bit grayscale to reversed monochrome for
drivers that control monochromatic panels, that only hav
On Mon, 07 Feb 2022, Tvrtko Ursulin wrote:
> On 04/02/2022 16:37, Michael Cheng wrote:
>> This patch series re-work a few i915 functions to use drm_clflush_virt_range
>> instead of calling clflush or clflushopt directly. This will prevent errors
>> when building for non-x86 architectures.
>>
>> v
Hi,
Thank you for the review.
On 2/7/22 12:43, Simon Ser wrote:
> On Wednesday, January 26th, 2022 at 16:11, Hans de Goede
> wrote:
>
>> - * A pointer to the drm_privacy_screen's struct is passed as the void *data
>> + * A pointer to the drm_privacy_screen's struct is passed as the void \*data
On Monday, February 7th, 2022 at 13:55, Hans de Goede
wrote:
> It is not an argument to the function being described
Ah right, makes sense then!
Hi Jonathan,
This is the V2 of my patchset that introduces a new userspace interface
based on DMABUF objects to complement the fileio API, and adds write()
support to the existing fileio API.
Changes since v1:
- the patches that were merged in v1 have been (obviously) dropped from
this patchse
The buffer-dma code was using two queues, incoming and outgoing, to
manage the state of the blocks in use.
While this totally works, it adds some complexity to the code,
especially since the code only manages 2 blocks. It is much easier to
just check each block's state manually, and keep a counter
Adding write support to the buffer-dma code is easy - the write()
function basically needs to do the exact same thing as the read()
function: dequeue a block, read or write the data, enqueue the block
when entirely processed.
Therefore, the iio_buffer_dma_read() and the new iio_buffer_dma_write()
Update the devm_iio_dmaengine_buffer_setup() function to support
specifying the buffer direction.
Update the iio_dmaengine_buffer_submit() function to handle input
buffers as well as output buffers.
Signed-off-by: Paul Cercueil
Reviewed-by: Alexandru Ardelean
---
drivers/iio/adc/adi-axi-adc.c
Use the iio_dma_buffer_write() and iio_dma_buffer_space_available()
functions provided by the buffer-dma core, to enable write support in
the buffer-dmaengine code.
Signed-off-by: Paul Cercueil
Reviewed-by: Alexandru Ardelean
---
drivers/iio/buffer/industrialio-buffer-dmaengine.c | 2 ++
1 file
Add the necessary infrastructure to the IIO core to support a new
optional DMABUF based interface.
The advantage of this new DMABUF based interface vs. the read()
interface, is that it avoids an extra copy of the data between the
kernel and userspace. This is particularly userful for high-speed
de
From: Alexandru Ardelean
A part of the logic in the iio_dma_buffer_exit() is required for the change
to add mmap support to IIO buffers.
This change splits the logic into a separate function, which will be
re-used later.
Signed-off-by: Alexandru Ardelean
Cc: Alexandru Ardelean
Signed-off-by: P
Enhance the current fileio code by using DMABUF objects instead of
custom buffers.
This adds more code than it removes, but:
- a lot of the complexity can be dropped, e.g. custom kref and
iio_buffer_block_put_atomic() are not needed anymore;
- it will be much easier to introduce an API to export
Implement the two functions iio_dma_buffer_alloc_dmabuf() and
iio_dma_buffer_enqueue_dmabuf(), as well as all the necessary bits to
enable userspace access to the DMABUF objects.
These two functions are exported as GPL symbols so that IIO buffer
implementations can support the new DMABUF based use
Use the functions provided by the buffer-dma core to implement the
DMABUF userspace API in the buffer-dmaengine IIO buffer implementation.
Signed-off-by: Paul Cercueil
---
drivers/iio/buffer/industrialio-buffer-dmaengine.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iio/buffer
Introduce a new flag IIO_BUFFER_DMABUF_CYCLIC in the "flags" field of
the iio_dmabuf uapi structure.
When set, the DMABUF enqueued with the enqueue ioctl will be endlessly
repeated on the TX output, until the buffer is disabled.
Signed-off-by: Paul Cercueil
Reviewed-by: Alexandru Ardelean
---
Handle the IIO_BUFFER_DMABUF_CYCLIC flag to support cyclic buffers.
Signed-off-by: Paul Cercueil
Reviewed-by: Alexandru Ardelean
---
drivers/iio/buffer/industrialio-buffer-dma.c | 1 +
.../iio/buffer/industrialio-buffer-dmaengine.c| 15 ---
include/linux/iio/buffer-dma.h
Document the new DMABUF based API.
v2: - Explicitly state that the new interface is optional and is
not implemented by all drivers.
- The IOCTLs can now only be called on the buffer FD returned by
IIO_BUFFER_GET_FD_IOCTL.
- Move the page up a bit in the index since it is core s
Fix the following warning from "make htmldocs":
drivers/gpu/drm/drm_privacy_screen.c:270:
WARNING: Inline emphasis start-string without end-string.
Fixes: 8a12b170558a ("drm/privacy-screen: Add notifier support (v2)")
Reported-by: Stephen Rothwell
Signed-off-by: Hans de Goede
---
Changes in v2
Hi
Am 03.02.22 um 18:43 schrieb Javier Martinez Canillas:
On 1/11/22 13:00, Thomas Zimmermann wrote:
Move encoder and connector initialization into a single helper and
put all related mode-setting structures into a single place. Done in
preparation of moving transmitter code into separate helpe
Hi Sam,
On Mon, Dec 20, 2021 at 1:45 PM Sam Ravnborg wrote:
>
> Hi Jagan,
>
> On Sun, Dec 19, 2021 at 10:10:10PM +0530, Jagan Teki wrote:
> > Hi Sam,
> >
> > On Thu, Nov 11, 2021 at 3:11 PM Jagan Teki
> > wrote:
> > >
> > > AM-1280800N3TZQW-T00H panel support 8 bpc not 6 bpc as per
> > > recent
Reviewed-by: Simon Ser
Hi
Am 03.02.22 um 18:57 schrieb Javier Martinez Canillas:
On 1/11/22 13:00, Thomas Zimmermann wrote:
Add helpers for initializing SIL164-based connectors. These used to be
handled by the VGA connector code. But SIL164 provides output via DVI-I,
so set the encoder and connector types accordingly
Hi,
On 2/7/22 14:05, Simon Ser wrote:
> Reviewed-by: Simon Ser
Thank I've pushed this one to drm-misc-fixes now; and the other one you reviewed
to drm-misc-next.
Regards,
Hans
Hi, Christian,
On Mon, 2022-02-07 at 12:41 +0100, Christian König wrote:
> Am 07.02.22 um 10:37 schrieb Ramalingam C:
> > On flat-ccs capable platform we need to evict and resore the ccs data
> > along with the corresponding main memory.
> >
> > This ccs data can only be access through BLT engine
On 2022-02-07 at 12:41:59 +0100, Christian König wrote:
> Am 07.02.22 um 10:37 schrieb Ramalingam C:
> > On flat-ccs capable platform we need to evict and resore the ccs data
> > along with the corresponding main memory.
> >
> > This ccs data can only be access through BLT engine through a special
On Mon, Feb 07, 2022 at 07:32:44AM +0100, Christoph Hellwig wrote:
> hmm.h pulls in the world for no good reason at all. Remove the
> includes and push a few ones into the users instead.
>
> Signed-off-by: Christoph Hellwig
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 1 +
> drivers/gpu/d
Update the connector code to fail if the connector could not be
initialized. The current code just ignored the error and failed
later when the connector was supposed to be used.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/gpu/drm/ast/ast_mode.c | 13 ++
The ITE66121 is an HDMI transmitter chip. There's no code for
detecting or programming the chip within ast. Remove the enum
constant.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/gpu/drm/ast/ast_drv.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drive
The ast driver supports different transmitter chips to support DVI
and HDMI connectors. It's al been packed into the same helpers
functons and exported as VGA connector.
Introduce a separate set of connector helpers for each transmitter
chip, and thus connector type. Also provide the correct encod
The tests in ast_mode_valid() verify the correct resolution for the
supplied mode. This is a limitation of the CRTC, so move the function
to the CRTC helpers. No functional changes.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/gpu/drm/ast/ast_mode.c | 129 +
Remove reading the link-rate. The value is maintained by the connector
code but never used.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/gpu/drm/ast/ast_dp501.c | 58 -
drivers/gpu/drm/ast/ast_drv.h | 1 -
drivers/gpu/drm/
Prepare for introducing other connectors besides VGA. No functional
changes.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/gpu/drm/ast/ast_drv.h | 10
drivers/gpu/drm/ast/ast_mode.c | 45 +-
2 files changed, 27 inser
Add helpers for DP501-based connectors. DP501 provides output via
DisplayPort. This used to be handled by the VGA connector code.
If a DP501 chip has been detected, ast will now create a DisplayPort
connector instead of a VGA connector.
Remove the DP501 code from ast_vga_connector_helper_get_mode
Move encoder and connector initialization into a single helper and
put all related mode-setting structures into a single place. Done in
preparation of moving transmitter code into separate helpers. No
functional changes.
v2:
* move encoder CRTC bitmask fix into separate patch (Javier)
Sig
Add helpers for initializing SIL164-based connectors. These used to be
handled by the VGA connector code. But SIL164 provides output via DVI-I,
so set the encoder and connector types accordingly.
If a SIL164 chip has been detected, ast will now create a DVI-I
connector instead of a VGA connector.
Read the encoder's possible-CRTC mask from the involved CRTC instead
of hard-coding it.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_mode.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index bd
On 2/7/22 15:15, Thomas Zimmermann wrote:
> Read the encoder's possible-CRTC mask from the involved CRTC instead
> of hard-coding it.
>
> Signed-off-by: Thomas Zimmermann
> ---
Reviewed-by: Javier Martinez Canillas
Best regards,
--
Javier Martinez Canillas
Linux Engineering
Red Hat
Am 07.02.22 um 14:53 schrieb Ramalingam C:
On 2022-02-07 at 12:41:59 +0100, Christian König wrote:
Am 07.02.22 um 10:37 schrieb Ramalingam C:
On flat-ccs capable platform we need to evict and resore the ccs data
along with the corresponding main memory.
This ccs data can only be access through
Hi Zhi,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on next-20220207]
[cannot apply to drm-intel/for-linux-next hch-configfs/for-next v5.17-rc3]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And
On 2022-02-07 at 15:37:09 +0100, Christian König wrote:
> Am 07.02.22 um 14:53 schrieb Ramalingam C:
> > On 2022-02-07 at 12:41:59 +0100, Christian König wrote:
> > > Am 07.02.22 um 10:37 schrieb Ramalingam C:
> > > > On flat-ccs capable platform we need to evict and resore the ccs data
> > > > alo
Hi, Ram,
A couple of quick questions before starting a more detailed review:
1) Does this also support migrating of compressed data LMEM->LMEM?
What-about inter-tile?
2) Do we need to block faulting of compressed data in the fault handler
as a follow-up patch?
/Thomas
On Mon, 2022-02-07 at 15
On 2022-02-07 at 20:25:42 +0530, Hellstrom, Thomas wrote:
> Hi, Ram,
>
> A couple of quick questions before starting a more detailed review:
>
> 1) Does this also support migrating of compressed data LMEM->LMEM?
> What-about inter-tile?
Honestly this series mainly facused on eviction of lmem into
From: Leo Ruan
This commit corrects the printing of the IPU clock error percentage if
it is between -0.1% to -0.9%. For example, if the pixel clock requested
is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
But the fixed point math had a flaw and calculated error of 0.2%.
Be
On Mon, 2022-02-07 at 20:44 +0530, Ramalingam C wrote:
> On 2022-02-07 at 20:25:42 +0530, Hellstrom, Thomas wrote:
> > Hi, Ram,
> >
> > A couple of quick questions before starting a more detailed review:
> >
> > 1) Does this also support migrating of compressed data LMEM->LMEM?
> > What-about int
This is set of various patches that are stuck in my patch queue.
KVM_REQ_GET_NESTED_STATE_PAGES patch is mostly RFC, but it does seem
to work for me.
Read-only APIC ID is also somewhat RFC.
Some of these patches are preparation for support for nested AVIC
which I almost done developing, and will
When the guest doesn't enable paging, and NPT/EPT is disabled, we
use guest't paging CR3's as KVM's shadow paging pointer and
we are technically in direct mode as if we were to use NPT/EPT.
In direct mode we create SPTEs with user mode permissions
because usually in the direct mode the NPT/EPT doe
Turns out that due to review feedback and/or rebases
I accidentally moved the call to nested_svm_load_cr3 to be too early,
before the NPT is enabled, which is very wrong to do.
KVM can't even access guest memory at that point as nested NPT
is needed for that, and of course it won't initialize the
While usually, restoring the smm state makes the KVM enter
the nested guest thus a different vmcb (vmcb02 vs vmcb01),
KVM should still mark it as dirty, since hardware
can in theory cache multiple vmcbs.
Failure to do so, combined with lack of setting the
nested_run_pending (which is fixed in the
While RSM induced VM entries are not full VM entries,
they still need to be followed by actual VM entry to complete it,
unlike setting the nested state.
This patch fixes boot of hyperv and SMM enabled
windows VM running nested on KVM, which fail due
to this issue combined with lack of dirty bit se
KVM already honours few clean bits thus it makes sense
to let the nested guest know about it.
Note that KVM also doesn't check if the hardware supports
clean bits, and therefore nested KVM was
already setting clean bits and L0 KVM
was already honouring them.
Signed-off-by: Maxim Levitsky
---
a
Use a dummy unused vmexit reason to mark the 'VM exit'
that is happening when we exit to handle SMM,
which is not a real VM exit.
This makes it a bit easier to read the KVM trace,
and avoids other potential problems.
Signed-off-by: Maxim Levitsky
---
arch/x86/kvm/svm/svm.c | 2 +-
1 file change
Fix a corner case in which the L1 hypervisor intercepts
interrupts (INTERCEPT_INTR) and either doesn't set
virtual interrupt masking (V_INTR_MASKING) or enters a
nested guest with EFLAGS.IF disabled prior to the entry.
In this case, despite the fact that L1 intercepts the interrupts,
KVM still nee
kvm_apic_update_apicv is called when AVIC is still active, thus IRR bits
can be set by the CPU after it is called, and don't cause the irr_pending
to be set to true.
Also logic in avic_kick_target_vcpu doesn't expect a race with this
function so to make it simple, just keep irr_pending set to true
asm/svm.h is the correct place for all values that are defined in
the SVM spec, and that includes AVIC.
Also add some values from the spec that were not defined before
and will be soon useful.
Signed-off-by: Maxim Levitsky
---
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/include/asm/svm.h
If svm_deliver_avic_intr is called just after the target vcpu's AVIC got
inhibited, it might read a stale value of vcpu->arch.apicv_active
which can lead to the target vCPU not noticing the interrupt.
To fix this use load-acquire/store-release so that, if the target vCPU
is IN_GUEST_MODE, we're gu
Out of precation use vmcb01 when enabling host AVIC.
No functional change intended.
Signed-off-by: Maxim Levitsky
---
arch/x86/kvm/svm/avic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index 4c2d622b3b9f0..c6072245f7fbb
Inhibit the AVIC of the vCPU that is running nested for the duration of the
nested run, so that all interrupts arriving from both its vCPU siblings
and from KVM are delivered using normal IPIs and cause that vCPU to vmexit.
Note that unlike normal AVIC inhibition, there is no need to
update the AV
No normal guest has any reason to change physical APIC IDs, and
allowing this introduces bugs into APIC acceleration code.
Signed-off-by: Maxim Levitsky
---
arch/x86/kvm/lapic.c | 28 ++--
1 file changed, 22 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kvm/lapic.c
KVM allowed to set non boot apic id via setting apic state
if using older non x2apic 32 bit apic id userspace api.
Signed-off-by: Maxim Levitsky
---
arch/x86/kvm/lapic.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lap
Now that KVM doesn't allow to change APIC ID in case AVIC is
enabled, remove buggy AVIC code that tried to do so.
Signed-off-by: Maxim Levitsky
---
arch/x86/kvm/svm/avic.c | 35 ---
1 file changed, 35 deletions(-)
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/k
Apparently on some systems AVIC is disabled in CPUID but still usable.
Allow the user to override the CPUID if the user is willing to
take the risk.
Signed-off-by: Maxim Levitsky
---
arch/x86/kvm/svm/svm.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/x86/
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