On Tue, Jan 11, 2022 at 1:31 PM Akhil P Oommen wrote:
>
> Expose speedbin through MSM_PARAM_CHIP_ID parameter to help userspace
> identify the sku.
>
> Signed-off-by: Akhil P Oommen
> ---
>
> drivers/gpu/drm/msm/adreno/adreno_gpu.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
(CC'ing this to dri-devel, since this is basically patch review)
Alright - so first off sorry about the broken debugging patch! I thought I had
tested that but I guess I hadn't tested it well enough, I'll get it fixed
asap, but feel free to try getting to it before I do.
As for this patch… (comme
On 1/12/2022 12:00 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-01-11 10:43:23)
Current DP drivers have regulators, clocks, irq and phy are grouped
together within a function and executed not in a symmetric manner.
This increase difficulty of code maintenance and limited code scalability
From: Tvrtko Ursulin
On a multi-tile platform, each tile has its own registers + GGTT
space, and BAR 0 is extended to cover all of them.
Up to four gts are supported in i915->gt[], with slot zero
shadowing the existing i915->gt0 to enable source compatibility
with legacy driver paths. A for_each
The GT has its own properties and in sysfs they should be grouped
in the 'gt/' directory.
Create a 'gt/' directory in sysfs which will contain gt0...gtN
directories related to each tile configured in the GPU. Move the
power management files inside those directories.
The previous power management
Hi,
This is the second series that prepares i915 to host multitile
platforms. It introduces the for_each_gt() macro that loops over
the tiles to perform per gt actions.
This patch is a combination of two patches developed originally
by Abdiel, who introduced some refactoring during probe, and the
On 1/12/2022 2:20 PM, Andi Shyti wrote:
The GT has its own properties and in sysfs they should be grouped
in the 'gt/' directory.
Create a 'gt/' directory in sysfs which will contain gt0...gtN
directories related to each tile configured in the GPU. Move the
power management files inside those
On 11.01.2022 17:30, Matthew Brost wrote:
> Move the multi-lrc guc_id from the lower allocation partition (0 to
> number of multi-lrc guc_ids) to upper allocation partition (number of
> single-lrc to max guc_ids).
>
> Signed-off-by: Matthew Brost
> ---
> .../gpu/drm/i915/gt/uc/intel_guc_submi
On Thu, Jan 13, 2022 at 12:21:17AM +0100, Michal Wajdeczko wrote:
>
>
> On 11.01.2022 17:30, Matthew Brost wrote:
> > Move the multi-lrc guc_id from the lower allocation partition (0 to
> > number of multi-lrc guc_ids) to upper allocation partition (number of
> > single-lrc to max guc_ids).
> >
Eliminate the following coccicheck warning:
./drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2725:16-17: Unneeded semicolon
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/am
Eliminate the follow smatch warnings:
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:3504 amdgpu_device_init()
warn: inconsistent indenting
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1716
amdgpu_ras_error_status_query() warn: if statement not indented
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2724 amdgpu_ra
https://bugzilla.kernel.org/show_bug.cgi?id=215445
--- Comment #8 from hock (talktome7...@gmail.com) ---
The bug is due to the use of uninitialized variable, which UBSAN detected.
See the patch https://patchwork.freedesktop.org/patch/468484 for the fix.
--
You may reply to this email to add a c
Hi Dave, Daniel,
Fixes for 5.17.
The following changes since commit cb6846fbb83b574c85c2a80211b402a6347b60b1:
Merge tag 'amd-drm-next-5.17-2021-12-30' of
ssh://gitlab.freedesktop.org/agd5f/linux into drm-next (2021-12-31 10:59:17
+1000)
are available in the Git repository at:
https://git
Hi Hsin-Yi, thanks for the patch!
Reviewed-by: Xin Ji
Thanks,
Xin
On Tue, Jan 11, 2022 at 07:26:59PM +0800, Hsin-Yi Wang wrote:
> Use devm_kzalloc instead of kzalloc and drop kfree(). Let the memory
> handled by driver detach.
>
> Signed-off-by: Hsin-Yi Wang
> ---
> drivers/gpu/drm/bridge/ana
Hi Hsin-Yi, thanks for the patch! It's OK for me!
Reviewed-by: Xin Ji
Thanks,
Xin
On Tue, Jan 11, 2022 at 07:27:01PM +0800, Hsin-Yi Wang wrote:
> List panel under aux-bus node if it's connected to anx7625's aux bus.
>
> Signed-off-by: Hsin-Yi Wang
> ---
> .../display/bridge/analogix,anx7625.y
Hi Hsin-Yi, thanks for the patch! Please fix the follow comment, then
add my id.
Reviewed-by: Xin Ji
On Tue, Jan 11, 2022 at 07:27:00PM +0800, Hsin-Yi Wang wrote:
> Support reading edid through aux channel if panel is connected to aux
> bus. Extend anx7625_aux_dpcd_trans() to implement aux transf
Move the multi-lrc guc_id from the lower allocation partition (0 to
number of multi-lrc guc_ids) to upper allocation partition (number of
single-lrc to max guc_ids).
This will help when a native driver transitions to a PF after driver
load time. If the perma-pin guc_ids (kernel contexts) are in a
Thanks for your patch, Yang. Can you pls also fix the original indentation
problem as well?
if (!adev)
- return -EINVAL;;
+ return -EINVAL;
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Yang Li
Sent: Thursday, January 13, 2022 9:22 AM
To: airl...@linux.ie
Cc
This series adds support for multi hardware decode into mtk-vcodec, by first
adding use
of_platform_populate to manage each hardware information: interrupt, clock,
register
bases and power. Secondly add core work queue to deal with core hardware
message,
at the same time, add msg queue for diffe
Vdec and venc can use the same function to wake up interrupt event.
Signed-off-by: Yunfei Dong
Reviewed-by: Tzung-Bi Shih
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Steve Cho
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 9 +
drivers/media/platform/mtk-vcodec
When mtk vcodec decoder is build as a module, we need to export
mtk-vcodec-dec pm functions to make them visible by the other components.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Benjamin Gaignard
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c
Different platforms may have different numbers of register bases. Gets the
numbers of register bases from dts (sizeof(u32) * 4 bytes for each).
Signed-off-by: Yunfei Dong
Reviewed-by: Tzung-Bi Shih
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 37 ++-
1 file changed, 28 in
Adds MT8192's compatible "mediatek,mt8192-vcodec-dec".
Adds MT8192's device private data mtk_lat_sig_core_pdata.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
.../media/platform/mtk-vcodec/mtk_vcodec_dec.h | 1 +
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 4
Separate decoder and encoder document for the dts are big difference.
Signed-off-by: Yunfei Dong
Reviewed-by: Rob Herring
---
.../media/mediatek,vcodec-decoder.yaml| 176 +
.../media/mediatek,vcodec-encoder.yaml| 187 ++
.../bindings/media/mediate
Adds decoder dt-bindings for mt8192.
Signed-off-by: Yunfei Dong
Reviewed-by: Rob Herring
---
.../media/mediatek,vcodec-subdev-decoder.yaml | 265 ++
1 file changed, 265 insertions(+)
create mode 100644
Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
Using the needed params for pm init/release function and remove unused
param mtkdev in 'struct mtk_vcodec_pm'.
Signed-off-by: Yunfei Dong
Reviewed-by: Tzung-Bi Shih
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Steve Cho
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 6 ++---
..
Separates different architecture for hardware: pure_sin_core
and lat_sin_core. MT8183 is pure single core. Uses .hw_arch to
distinguish.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
.../platform/mtk-vcodec/mtk_vcodec_dec_stateful.c | 1 +
.../platform/mtk-vcodec
Adds irq interface for multi hardware.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 33 ---
.../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 2 +-
.../platform/mtk-vcodec/mtk_vcodec_drv.h | 25 ++
There are more than two hardwares for decoder: LAT0, LAT1 and CORE. In
order to manage these hardwares, register each hardware as independent
platform device for the larbs are different.
Each hardware module controls its own information which includes
interrupt/power/clocks/registers.
Calling of_
For add new hardware, not only need to lock lat hardware, also
need to lock core hardware in case of different instance start
to decoder at the same time.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | 4 ++--
dri
Use the dma_set_mask_and_coherent helper to set vdec
DMA bit mask to support 34bits iova space(16GB) that
the mt8192 iommu HW support.
Whole the iova range separate to 0~4G/4G~8G/8G~12G/12G~16G,
regarding which iova range VDEC actually locate, it
depends on the dma-ranges property of vdec dtsi nod
Add core dec and dec end ipi msg:
AP_IPIMSG_DEC_CORE/AP_IPIMSG_DEC_CORE_END.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
.../media/platform/mtk-vcodec/vdec_ipi_msg.h | 4
.../media/platform/mtk-vcodec/vdec_vpu_if.c| 12
.../media/platform/mtk
For lat and core architecture, lat thread will send message to core
thread when lat decode done. Core hardware will use the message
from lat to decode, then free message to lat thread when decode done.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/media/platfor
There is just one core thread, in order to separate different
hardware, using codec type to separeate it in scp driver.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
.../media/platform/mtk-vcodec/vdec_ipi_msg.h | 12 ---
.../media/platform/mtk-vcodec/vdec_vpu_if.c
Generalizes power and clock on/off interfaces to support different
hardware.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 6 +-
.../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 2 +-
.../platform/mtk-vcodec/mtk_vcodec_d
There are only two lines in mtk_vcodec_release_dec_pm, using
pm_runtime_disable and put_device instead directly.
Move pm_runtime_enable outside mtk_vcodec_init_dec_pm to symmetry with
pm_runtime_disable, after that, rename mtk_vcodec_init_dec_pm to *_clk
since it only has clock operations now.
Si
There are only two lines in mtk_vcodec_release_enc_pm, using
pm_runtime_disable and put_device instead directly.
Move pm_runtime_enable outside mtk_vcodec_release_enc_pm to symmetry with
pm_runtime_disable, after that, rename mtk_vcodec_init_enc_pm to *_clk
since it only has clock operations now.
Add work queue to process core hardware information.
First, get lat_buf from message queue, then call core
hardware of each codec(H264/VP9/AV1) to decode, finally
puts lat_buf back to the message.
Signed-off-by: Yunfei Dong
Reviewed-by: Steve Cho
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c
Quoting Kuogee Hsieh (2022-01-12 14:17:54)
>
> On 1/12/2022 12:00 PM, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2022-01-11 10:43:23)
> >> Current DP drivers have regulators, clocks, irq and phy are grouped
> >> together within a function and executed not in a symmetric manner.
> >> This increas
Quoting Yong Wu (2022-01-12 01:09:19)
> On Tue, 2022-01-11 at 16:27 -0800, Stephen Boyd wrote:
> > ---8<---
> > diff --git a/drivers/base/component.c b/drivers/base/component.c
> > index 64ad7478c67a..97f253a41bdf 100644
> > --- a/drivers/base/component.c
> > +++ b/drivers/base/component.c
> > @@ -
Realized that the GuC multi-lrc fini breadcrumb emit code is very
delicate as the math this code does relies on functions it calls to emit
a certain number of DWs. Add a few GEM_BUG_ONs to assert the math is
correct.
Signed-off-by: Matthew Brost
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c
Eliminate the following coccicheck warning:
./drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2725:16-17: Unneeded semicolon
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/am
Eliminate the follow smatch warnings:
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:3504 amdgpu_device_init()
warn: inconsistent indenting
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1716
amdgpu_ras_error_status_query() warn: if statement not indented
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1058 amdgpu_ra
On Thu, 13 Jan 2022 at 00:19, Rob Clark wrote:
>
> On Tue, Jan 11, 2022 at 1:31 PM Akhil P Oommen
> wrote:
> >
> > Expose speedbin through MSM_PARAM_CHIP_ID parameter to help userspace
> > identify the sku.
> >
> > Signed-off-by: Akhil P Oommen
> > ---
> >
> > drivers/gpu/drm/msm/adreno/adreno
Use devm_kzalloc instead of kzalloc and drop kfree(). Let the memory
handled by driver detach.
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Xin Ji
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analog
Support reading edid through aux channel if panel is connected to aux
bus. Extend anx7625_aux_dpcd_trans() to implement aux transfer function:
1. panel is populated in devm_of_dp_aux_populate_ep_devices(), so move
anx7625_parse_dt() after.
2. Use pm runtime autosuspend since aux transfer functi
List panel under aux-bus node if it's connected to anx7625's aux bus.
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Xin Ji
---
.../display/bridge/analogix,anx7625.yaml| 17 +
1 file changed, 17 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/bridge/anal
On Thu, Jan 13, 2022 at 11:40 AM Xin Ji wrote:
>
> Hi Hsin-Yi, thanks for the patch! Please fix the follow comment, then
> add my id.
> Reviewed-by: Xin Ji
>
> On Tue, Jan 11, 2022 at 07:27:00PM +0800, Hsin-Yi Wang wrote:
> > Support reading edid through aux channel if panel is connected to aux
>
'destroy_workqueue()' already drains the queue before destroying it, so
there is no need to flush it explicitly.
Remove the redundant 'flush_workqueue()' calls.
Signed-off-by: Xu Wang
---
drivers/video/fbdev/omap2/omapfb/omapfb-main.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/v
101 - 149 of 149 matches
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