Am 09.01.22 um 15:19 schrieb Arunpravin:
+// SPDX-License-Identifier: MIT
+MODULE_DESCRIPTION("DRM Buddy Allocator");
+MODULE_LICENSE("GPL");
I'm not an expert on this, but maybe we should use "Dual MIT/GPL" here?
The code is certainly MIT licensed.
Regards,
Christian.
If the CRTC state is already inactive, it doesn't make sense to trigger
the entry timer for self refresh work to make the display enter self
refresh mode, because the disabled CRTC hints that either the entire
display pipeline is disabled or the previous atomic commit is triggered
by the self refre
Hello Geert and Kara,
On 1/9/22 21:20, Kris Karas (Bug reporting) wrote:
> Groetje, Geert,
>
> Geert Uytterhoeven wrote:
>>
>>> - par->isVGA = screen_info.orig_video_isVGA;
>>> + par->isVGA = screen_info.orig_video_isVGA == VIDEO_TYPE_VGAC;
>> All non-x86 architectures (except for 2 M
Don't populate the read-only array flex_regs on the stack but
instead it static const. Also makes the object code a little smaller.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/i915_perf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_per
On Mon, Jan 03, 2022 at 09:35:14AM -0300, Fabio Estevam wrote:
> Hi Laurent,
>
> On Mon, Jan 3, 2022 at 8:48 AM Laurent Pinchart
> wrote:
>
> > With the comment from 2/2 taken into account,
> >
> > Reviewed-by: Laurent Pinchart
>
> Thanks for the review. I addressed your feedback and sent v2.
Don't populate the read-only array clock_div_by_lanes on the stack but
instead it static const. Also makes the object code a little smaller.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/bridge/adv7511/adv7533.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/
(Extending Cc: list,)
On Sun, Jan 09, 2022 at 05:55:16PM +0800, Yanming Liu wrote:
> Commit adae1e931acd ("Drivers: hv: vmbus: Copy packets sent by Hyper-V
> out of the ring buffer") introduced a notion of maximum packet size in
> vmbus channel and used that size to initialize a buffer holding all
Groetje, Geert,
Geert Uytterhoeven wrote:
- par->isVGA = screen_info.orig_video_isVGA;
+ par->isVGA = screen_info.orig_video_isVGA == VIDEO_TYPE_VGAC;
All non-x86 architectures (except for 2 MIPS platforms) treat
orig_video_isVGA as a boolean flag, and just assign 1 to it.
Hence t
Don't populate some read-only arrays on the stack but instead
make them static const. Also makes the object code a little smaller.
Re-format one of the declarations. Add spaces between commas and make
PostDivSet unsigned int to fixup checkpatch warnings.
Signed-off-by: Colin Ian King
---
drivers
Lock, power and clock are highly coupled operations. Adds vdec
enable/disable hardware helpers and uses them.
Signed-off-by: Yunfei Dong
Reviewed-by: Tzung-Bi Shih
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 5 -
.../platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 168 +++---
.
This series adds support for mt8192 h264/vp8/vp9 decoder drivers. Firstly,
refactor
power/clock/interrupt interfaces for mt8192 is lat and core architecture.
Secondly, add new functions to get frame buffer size and resolution according
to decoder capability from scp side. Then add callback functi
Different capture buffer format has different buffer size, need to get
real buffer size according to buffer type from scp.
Signed-off-by: Yunfei Dong
---
.../media/platform/mtk-vcodec/vdec_ipi_msg.h | 37 ++
.../media/platform/mtk-vcodec/vdec_vpu_if.c | 50 +++
...
MT8173 platform use vpu firmware, mt8183/mt8192 will use scp
firmware instead, using chip name is not reasonable to separate
different firmware architecture. Using firmware type is much better.
Signed-off-by: Yunfei Dong
Reviewed-by: Tzung-Bi Shih
Reviewed-by: AngeloGioacchino Del Regno
---
..
Supported max resolution for different platforms are not the same: 2K
or 4K, getting it according to dec_capability.
Signed-off-by: Yunfei Dong
Reviewed-by: Tzung-Bi Shih
---
.../platform/mtk-vcodec/mtk_vcodec_dec.c | 31 +++
.../platform/mtk-vcodec/mtk_vcodec_drv.h |
lat thread: output queue \
-> lat hardware -> lat trans buffer
lat trans buffer /
core thread: capture queue \
->core hardware -> capture queue
lat trans buffer /
Lat and core work in different thre
For lat and core decode in parallel, need to get capture buffer
when core start to decode and put put capture buffer to display
list when core decode done.
Signed-off-by: Yunfei Dong
---
.../mtk-vcodec/mtk_vcodec_dec_stateless.c | 123 --
.../platform/mtk-vcodec/mtk_vcodec_dr
Supported output and capture format types for mt8192 are different
with mt8183. Needs to get format types according to decoder capability.
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec.c | 8 +-
.../mtk-vcodec/mtk_vcodec_dec_stateful.c | 13 +-
.../mtk-vcodec
For vp8 not support 4K, need to disable it.
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c
b/drivers/media/platform/mtk-vcodec/mtk_vcodec_d
Needs to use mediatek compressed mode for mt8192 decoder.
Signed-off-by: Yunfei Dong
---
.../media/platform/mtk-vcodec/mtk_vcodec_dec_stateless.c | 7 ++-
drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h | 1 +
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers
Need to use default pic info when get pic info fail.
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c
b/drivers/media/platform/mtk-vcodec/m
Capture queue format type is difference for different platform,
need to calculate capture buffer size according to capture queue
format type in scp.
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | 2 ++
drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h | 2 ++
Adds h264 lat and core architecture driver for mt8192, and the decode mode is
frame
based for stateless decoder.
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/Makefile| 1 +
.../mtk-vcodec/vdec/vdec_h264_req_multi_if.c | 605 ++
.../media/platform/mtk-v
Add support for VP8 decoding using the stateless API, as supported by MT8192.
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/Makefile| 1 +
.../mtk-vcodec/mtk_vcodec_dec_stateless.c | 24 +-
.../platform/mtk-vcodec/mtk_vcodec_drv.h | 1 +
.../mtk-vcodec/vdec/v
Mt8192 can use some of common code with mt8183. Moves them to
a new file in order to reuse.
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/Makefile| 1 +
.../mtk-vcodec/vdec/vdec_h264_req_common.c| 311 ++
.../mtk-vcodec/vdec/vdec_h264_req_common.h| 25
Add support for VP9 decoding using the stateless API, as supported by MT8192.
And the drivers is lat and core architecture.
Signed-off-by: George Sun
Co-developed-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/Makefile|1 +
.../mtk-vcodec/mtk_vcodec_dec_stateless.c | 26 +-
Hi Laurent,
On Wed, Dec 29, 2021 at 5:56 PM Laurent Pinchart
wrote:
> On Fri, Dec 24, 2021 at 08:23:08AM +0300, Nikita Yushchenko wrote:
> > Add the missing lvds0 node for the R-Car M3-W+ SoC.
> >
> > Signed-off-by: Nikita Yushchenko
> > ---
> > arch/arm64/boot/dts/renesas/r8a77961.dtsi | 27 ++
Add vdosys1 reset control bit for MT8195 platform.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
include/dt-bindings/reset/mt8195-resets.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/dt-bindings/reset/mt8195-resets.h
b/include/dt-bindings/reset/mt8195-re
Add merge async reset control in mtk_merge_stop. Async hw doesn't do self
reset on each sof signal(start of frame), so need to reset the async to
clear the hw status for the next merge start.
Signed-off-by: Nancy.Lin
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 4
1 f
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
.../display/mediatek/mediatek,ethdr.yaml | 147 ++
1 file changed, 147 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
diff --git
MT8195 vdosys1 merge1 to merge4 have HW mute function.
Add MERGE additional mute property description.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Acked-By: AngeloGioacchino Del Regno
---
.../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 4
1 file changed, 4 insertio
This is a preparation for adding support for mt8195 vdosys1 mutex.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements,
so change it to support multi-bit control.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mtk-mutex.c | 24
Add driver data of mt8195 vdosys1 to mediatek-drm.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 36430f956b4f..e851
Add cmdq support for mtk-mmsys config API.
The mmsys config register settings need to take effect with the other
HW settings(like OVL_ADAPTOR...) at the same vblanking time.
If we use CPU to write the mmsys reg, we can't guarantee all the
settings can be written in the same vblanking time.
Cmdq is
Add mmsys config API. The config API is used for config mmsys reg.
Some mmsys regs need to be setting according to the HW engine binding
to the mmsys simultaneously.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h| 62 ++
drivers/soc/mediatek/mtk-mmsy
Add ovl_adaptor driver for MT8195.
Ovl_adaptor is an encapsulated module and designed for simplified
DRM control flow. This module is composed of 8 RDMAs, 4 MERGEs and
an ETHDR. Two RDMAs merge into one layer, so this module support 4
layers.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
-
Add merge mute/unmute setting for MT8195.
MT8195 Vdosys1 merge1~merge4 support HW mute function.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp
Add mtk-mutex support for mt8195 vdosys1.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mtk-mutex.c | 54
1 file changed, 54 insertions(+)
Add merge start/stop API for cmdq support. The ovl_adaptor merges
are configured with each drm plane update. Need to enable/disable
merge with cmdq making sure all the settings taken effect in the
same vblank.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_
Add drm ovl_adaptor sub driver. Bring up ovl_adaptor sub driver if
the component exists in the path.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 16
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 30 ---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add DRM and these modules support by the patches below:
Changes in v11:
- remove ethdr vblank spin lock
- refine ovl_adaptor print message
Changes in v10:
- refine ethdr reset co
Add merge new advance config API. The original merge API is
mtk_ddp_comp_funcs function prototype. The API interface parameters
cannot be modified, so add a new config API for extension. This is
the preparation for ovl_adaptor merge control.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
--
Add display node for vdosys1.
Signed-off-by: Nancy.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 222 +++
1 file changed, 222 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index e136761345db..a69a7b57e070
MT8195 vdosys1 has more than 32 reset bits and a different reset base
than other chips. Modify mmsys for support 64 bit and different reset
base.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h | 1 +
drivers/soc/mediatek/mtk-mmsys.c| 21 -
drivers/soc/m
Add MDP_RDMA driver for MT8195. MDP_RDMA is the DMA engine of
the ovl_adaptor component.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 7 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 +
dr
Add vdosys1 RDMA definition.
Signed-off-by: Nancy.Lin
---
.../arm/mediatek/mediatek,mdp-rdma.yaml | 77 +++
1 file changed, 77 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml
diff --git
a/Documentation/devicetree/bi
MT8195 have two mmsys. Modify drm for MT8195 multi-mmsys support.
The two mmsys (vdosys0 and vdosys1) will bring up two drm drivers,
only one drm driver register as the drm device.
Each drm driver binds its own component. The last bind drm driver
allocates and registers the drm device to drm core.
ETHDR is a part of ovl_adaptor.
ETHDR is designed for HDR video and graphics conversion in the external
display path. It handles multiple HDR input types and performs tone
mapping, color space/color format conversion, and then combine
different layers, output the required HDR or SDR signal to the
s
Add plane color encoding information for color space conversion.
It's a preparation for adding support for mt8195 ovl_adaptor mdp_rdma
csc control.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_drm_plane.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_plane.h |
Add mt8195 vdosys1 clock driver name and routing table to
the driver data of mtk-mmsys.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h| 136 +
drivers/soc/mediatek/mtk-mmsys.c | 10 ++
include/linux/soc/mediatek/mtk-mmsys.h | 2 +
3 files ch
Hi Geert,
On Mon, Jan 10, 2022 at 09:43:58AM +0100, Geert Uytterhoeven wrote:
> On Wed, Dec 29, 2021 at 5:56 PM Laurent Pinchart wrote:
> > On Fri, Dec 24, 2021 at 08:23:08AM +0300, Nikita Yushchenko wrote:
> > > Add the missing lvds0 node for the R-Car M3-W+ SoC.
> > >
> > > Signed-off-by: Nikita
On Fri, Dec 24, 2021 at 6:23 AM Nikita Yushchenko
wrote:
> Add the missing lvds0 node for the R-Car M3-W+ SoC.
>
> Signed-off-by: Nikita Yushchenko
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.18.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoe
On 07/01/2022 23:33, Martin Blumenstingl wrote:
> Hi Neil,
>
> On Fri, Jan 7, 2022 at 3:57 PM Neil Armstrong wrote:
>>
>> This adds supports for the ENCL encoder connected to a MIPI-DSI transceiver
>> on the
>> Amlogic AXG SoCs> Should this be "AXG and newer SoCs" or is this really AXG
>> spec
On 07/01/2022 23:35, Martin Blumenstingl wrote:
> Hi Neil,
>
> On Fri, Jan 7, 2022 at 3:57 PM Neil Armstrong wrote:
>
> [...]
>> + writel_bits_relaxed(BIT(3), BIT(3), priv->io_base +
>> _REG(ENCL_VIDEO_MODE_ADV));
> see my comment on patch #3 from this series for BIT(3)
>
Yep, thanks,
On 07/01/2022 23:49, Martin Blumenstingl wrote:
> Hi Neil,
>
> some high-level comments from me below.
>
> On Fri, Jan 7, 2022 at 3:58 PM Neil Armstrong wrote:
> [...]
>> +/* MIPI DSI Relative REGISTERs Definitions */
>> +/* For MIPI_DSI_TOP_CNTL */
>> +#define BIT_DPI_COLOR_MODE20
>> +
Hi Nikita,
On Mon, Jan 10, 2022 at 10:51 AM Nikita Yushchenko
wrote:
> > i.e. will queue in renesas-devel for v5.18.
>
> that is, for current + 2 ?
That is correct, as the merge window for v5.17 has already opened.
The deadline for new features to be accepted for v5.17 in the soc
tree was around
This patch series contains two fixes for the vga16fb driver. I looked at
the driver due a regression reported [0], caused by commit d391c5827107
("drivers/firmware: move x86 Generic System Framebuffers support").
The mentioned commit didn't change any logic but just moved the platform
device regis
The vga16fb framebuffer driver only supports Enhanced Graphics Adapter
(EGA) and Video Graphics Array (VGA) 16 color graphic cards.
But it doesn't check if the adapter is one of those or if a VGA16 mode
is used. This means that the driver will be probed even if a VESA BIOS
Extensions (VBE) or Grap
The vga16fb framebuffer driver supports both Enhanced Graphics Adapter
(EGA) and Video Graphics Array (VGA) 16 color graphic cards.
But the logic to check whether the EGA or VGA standard are used is not
correct. It just checks if screen_info.orig_video_isVGA is set, but it
should check if is set t
Applied series to drm-misc-next
Hey Jagan,
Thanks for submitting this fix.
On Sun, 9 Jan 2022 at 18:30, Jagan Teki wrote:
>
> Existing HPD enablement logic is not compatible with ADV7535
> bridge, thus any runtime plug-in of HDMI cable is not working
> on these bridge designs.
>
> Unlike other ADV7511 family of bridges, the AD
Hi Marek,
On Thu, Dec 23, 2021 at 2:45 PM Marek Szyprowski
wrote:
>
> Hi Jagan,
>
> On 18.12.2021 00:16, Marek Szyprowski wrote:
> > On 15.12.2021 15:56, Jagan Teki wrote:
> >> On Wed, Dec 15, 2021 at 7:49 PM Marek Szyprowski
> >> wrote:
> >>> On 15.12.2021 13:57, Jagan Teki wrote:
> On Wed
On 12/16/21 22:09, Javier Martinez Canillas wrote:
> The commit feeb07d0ca5a ("drm/hisilicon/hibmc: Make CONFIG_DRM_HISI_HIBMC
> depend on ARM64") made the driver Kconfig symbol to depend on ARM64 since
> it only supports that architecture and loading the module on others would
> lead to incorrect
Hi Robert,
On Mon, Nov 22, 2021 at 9:34 PM Marek Szyprowski
wrote:
>
> On 22.11.2021 16:07, Marek Szyprowski wrote:
> > On 22.11.2021 15:55, Jagan Teki wrote:
> >> On Mon, Nov 22, 2021 at 7:59 PM Jagan Teki
> >> wrote:
> >>> On Mon, Nov 22, 2021 at 7:51 PM Jagan Teki
> >>> wrote:
> On Mon,
On Fri, 07 Jan 2022, Stephen Boyd wrote:
> Quoting Jani Nikula (2022-01-07 05:07:59)
>> On Thu, 06 Jan 2022, Stephen Boyd wrote:
>> > This allows aggregate driver writers to use the device passed to their
>> > probe/remove/shutdown functions properly instead of treating it as an
>> > opaque point
Hi All,
On 1/7/22 20:02, Rajat Jain wrote:
> Allow a privacy screen provider to stash its private data pointer in the
> drm_privacy_screen, and update the drm_privacy_screen_register() call to
> accept that. Also introduce a *_get_drvdata() so that it can retrieved
> back when needed.
>
> This al
Explicit assignment of connector to bridge type during bridge
addition is optional.
Some of the bridges like ICN6211 has panel to be connected and
that panel driver has taken care of associated connector type
of it.
Drop it.
Signed-off-by: Jagan Teki
---
drivers/gpu/drm/bridge/chipone-icn6211.
We want to remove more members of i915_vma, which requires the locking to be
held more often.
Start requiring gem object lock for i915_vma_unbind, as it's one of the
callers that may unpin pages.
Some special care is needed when evicting, because the last reference to the
object may be held by th
Previously, short term pinning in execbuf was required because i915_vma was
effectively independent from objects, and has its own refcount, locking,
lifetime rules and pinning.
This series removes the separate locking, by requiring vma->obj->resv to be
held when pinning and unbinding. This will al
i915_gem_evict_vm will need to be able to evict objects that are
locked by the current ctx. By testing if the current context already
locked the object, we can do this correctly. This allows us to
evict the entire vm even if we already hold some objects' locks.
Previously, this was spread over sev
Now that we cannot unbind kill the currently locked object directly
because we're removing short term pinning, we may have to unbind the
object from gtt manually, using a i915_gem_evict_vm() call.
Changes since v1:
- Remove -ENOSPC warning, can still happen with concurrent mmaps
where we can't u
Because we will start to require the obj->resv lock for unbinding,
ensure these shrinker functions also take the lock.
This requires some function signature changes, to ensure that the
ww context is passed around, but is mostly straightforward.
Previously this was split up into several patches, b
Add a flag PIN_VALIDATE, to indicate we don't need to pin and only
protected by the object lock.
This removes the need to unpin, which is done by just releasing the
lock.
eb_reserve is slightly reworked for readability, but the same steps
are still done:
- First pass pins with NONBLOCK.
- Second
Now that we require the object lock for all ops, some code handling
race conditions can be removed.
This is required to not take short-term pins inside execbuf.
Signed-off-by: Maarten Lankhorst
Acked-by: Niranjana Vishwanathapura
---
drivers/gpu/drm/i915/i915_vma.c | 55 +--
This duck tape workaround is no longer required, unbind and destroy are
fixed to take the obj->resv mutex before destroying and obj->mm.lock has
been removed, always requiring obj->resv as well.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_obj
On 07/01/2022 14:23, Thomas Hellström wrote:
Implement async (non-blocking) unbinding by not syncing the vma before
calling unbind on the vma_resource.
Add the resulting unbind fence to the object's dma_resv from where it is
picked up by the ttm migration code.
Ideally these unbind fences should
On 07/01/2022 14:23, Thomas Hellström wrote:
Add a selftest to exercise asynchronous migration and -unbining.
Extend the gem_migrate selftest to perform the migrations while
depending on a spinner and a bound vma set up on the migrated
buffer object.
Signed-off-by: Thomas Hellström
---
driver
On Mon, 10 Jan 2022 at 15:56, Rajeev Nandan wrote:
>
> In most cases, the default values of DSI PHY tuning registers should be
> sufficient as they are fully optimized. However, in some cases where
> extreme board parasitics cause the eye shape to degrade, the override
> bits can be used to improv
On Mon, 10 Jan 2022 at 15:56, Rajeev Nandan wrote:
>
> Add support for MSM DSI PHY tuning configuration. Current design is
> to support drive strength and drive level/amplitude tuning for
> 10nm PHY version, but this can be extended to other PHY versions.
>
> Signed-off-by: Rajeev Nandan
> ---
>
On 24/12/2021 08:56, Alexey Sheplyakov wrote:
> Hi,
>
> On 23.12.2021 18:11, Alyssa Rosenzweig wrote:
>>> The kernel driver itself can't guess which jobs need a such a strict
>>> affinity, so setting proper requirements is the responsibility of
>>> the userspace (Mesa). However the userspace is no
On Fri, 7 Jan 2022 at 14:24, Thomas Hellström
wrote:
>
> There is always a struct vma_resource guaranteed to be alive when we
> access a corresponding struct vma_snapshot.
>
> So ditch the latter and instead of allocating vma_snapshots, reference
> the already existning vma_resource.
>
> This requ
On 1/10/22 14:59, Matthew Auld wrote:
On 07/01/2022 14:23, Thomas Hellström wrote:
Add a selftest to exercise asynchronous migration and -unbining.
Extend the gem_migrate selftest to perform the migrations while
depending on a spinner and a bound vma set up on the migrated
buffer object.
Sign
On 10/01/2022 14:36, Thomas Hellström wrote:
On 1/10/22 14:59, Matthew Auld wrote:
On 07/01/2022 14:23, Thomas Hellström wrote:
Add a selftest to exercise asynchronous migration and -unbining.
Extend the gem_migrate selftest to perform the migrations while
depending on a spinner and a bound vm
On 1/10/22 14:21, Matthew Auld wrote:
On 07/01/2022 14:23, Thomas Hellström wrote:
Implement async (non-blocking) unbinding by not syncing the vma before
calling unbind on the vma_resource.
Add the resulting unbind fence to the object's dma_resv from where it is
picked up by the ttm migration
Hey Jagan,
This is a mistake on my end, I must have been looking at reviewing
this series and then accidentally included it with another batch of
patches. Thank you for catching this.
I would suggest reverting these two patches[1][2]. Is that ok with you?
[1]
https://cgit.freedesktop.org/drm/dr
Hi Robert,
On Mon, Jan 10, 2022 at 9:02 PM Robert Foss wrote:
>
> Hey Jagan,
>
> This is a mistake on my end, I must have been looking at reviewing
> this series and then accidentally included it with another batch of
> patches. Thank you for catching this.
Thanks for the response.
>
> I would
On Fri, Jan 7, 2022 at 6:42 PM Linus Torvalds
wrote:
>
> On Thu, Jan 6, 2022 at 7:23 PM Dave Airlie wrote:
> >
> > There is only the amdgpu runtime pm regression fix in here.
>
> Thanks, from a quick test it works for me - the backlight actually
> does eventually go away.
>
> It does so only on t
On Mon, 10 Jan 2022 at 16:35, Jagan Teki wrote:
>
> Hi Robert,
>
> On Mon, Jan 10, 2022 at 9:02 PM Robert Foss wrote:
> >
> > Hey Jagan,
> >
> > This is a mistake on my end, I must have been looking at reviewing
> > this series and then accidentally included it with another batch of
> > patches.
On Fri, Dec 31, 2021 at 03:23:31PM +0200, Jani Nikula wrote:
> On Wed, 12 Jul 2017, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Make the atomic private object stuff less special by introducing proper
> > base classes for the object and its state. Drivers can embed these in
On Tue, Jan 04, 2022 at 08:48:56PM +0200, Jani Nikula wrote:
> DP_SINK_COUNT_ESI and DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0 have the same
> contents as DP_SINK_COUNT and DP_DEVICE_SERVICE_IRQ_VECTOR,
> respectively.
IIRC there was an oversight in the earlier spec revisions that
showed bit 7 as reserved
On Tue, Jan 04, 2022 at 08:48:57PM +0200, Jani Nikula wrote:
> Take bit 7 into account when reading sink count from
> DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff
On 2022-01-09 13:42, José Expósito wrote:
> The function performs a check on the "adev" input parameter, however, it
> is used before the check.
>
> Initialize the "dev" variable after the sanity check to avoid a possible
> NULL pointer dereference.
>
> Fixes: e27c41d5b0681 ("drm/amd/display: Sup
On 09/01/2022 16:37, Alyssa Rosenzweig wrote:
> Update a comment stating create_bo took no flags, since it now takes a
> bit mask of optional flags NOEXEC and HEAP.
>
> Signed-off-by: Alyssa Rosenzweig
Reviewed-by: Steven Price
I'll push this to drm-misc-next.
Thanks,
Steve
> ---
> include
On Sun, Jan 9, 2022 at 11:38 PM Geert Uytterhoeven wrote:
>
> The commit that merged this branch made a seemingly innocent change to
> the top Makefile:
"Seemingly" innocent?
Or something darker and more sinister, related to the unrelenting
slaughter of flightless fowl?
You be the judge.
On Mon, 10 Jan 2022 18:25:35 +0530, Rajeev Nandan wrote:
> In most cases, the default values of DSI PHY tuning registers should be
> sufficient as they are fully optimized. However, in some cases where
> extreme board parasitics cause the eye shape to degrade, the override
> bits can be used to imp
On 09/01/2022 17:12, Alyssa Rosenzweig wrote:
> The IDVS group size feature was missing. It is used on some Bifrost and
> Valhall GPUs, and is the last kernel-relevant Bifrost feature we're
> missing.
>
> This feature adds an extra IDVS group size field to the JM_CONFIG
> register. In kbase, the v
This patch series introduces infrastructure for asynchronous vma
unbinding. The single enabled use-case is initially at buffer object
migration where we otherwise sync when unbinding vmas before migration.
This in theory allows us to pipeline any number of migrations, but in
practice the number i
Introduce vma resources, sort of similar to TTM resources, needed for
asynchronous bind management. Initially we will use them to hold
completion of unbinding when we capture data from a vma, but they will
be used extensively in upcoming patches for asynchronous vma unbinding.
v6:
- Some document
When introducing asynchronous unbinding, the vma itself may no longer
be alive when the actual binding or unbinding takes place.
Update the gtt i915_vma_ops accordingly to take a struct i915_vma_resource
instead of a struct i915_vma for the bind_vma() and unbind_vma() ops.
Similarly change the ins
A pin-count is already held by vma->pages so taking an additional pin
during async binds is not necessary.
When we introduce async unbinding we have other means of keeping the
object pages alive.
Signed-off-by: Thomas Hellström
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/i915_vma.c | 5
Implement async (non-blocking) unbinding by not syncing the vma before
calling unbind on the vma_resource.
Add the resulting unbind fence to the object's dma_resv from where it is
picked up by the ttm migration code.
Ideally these unbind fences should be coalesced with the migration blit
fence to a
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