Am 04.01.22 um 19:08 schrieb Felix Kuehling:
[+Adrian]
Am 2021-12-23 um 2:05 a.m. schrieb Christian König:
Am 22.12.21 um 21:53 schrieb Daniel Vetter:
On Mon, Dec 20, 2021 at 01:12:51PM -0500, Bhardwaj, Rajneesh wrote:
[SNIP]
Still sounds funky. I think minimally we should have an ack from C
Jiri Vanek,
Could you please share the part number or datasheet of the dual-link
LVDS display used.
On Tue, Jan 4, 2022 at 7:59 PM Jiří Vaněk wrote:
>
> Actually, this patch is based on testing with a real HW with dual-link LVDS
> display (full HD) and it also matches with a datasheet. Without
Thanks for reply.
On 2022/1/4 02:45, John Stultz wrote:
> On Tue, Dec 28, 2021 at 11:09 PM Weizhao Ouyang wrote:
>> Fix cma_heap_buffer mutex lock area to protect vmap_cnt and vaddr. And
>> move struct dma_heap_attachment to dma-heap.h so that vendor dma heaps
>> can use it, the same behaviour as
Hello,
When using Syzkaller to fuzz the latest Linux kernel, the following
crash was triggered.
HEAD commit: a7904a538933 Linux 5.16-rc6
git tree: upstream
console output: https://paste.ubuntu.com/p/Rvt9f7wByG/plain/
kernel config: https://paste.ubuntu.com/p/FDDNHDxtwz/plain/
C reproducer: https:
Fix cma_heap_buffer mutex locking critical section to protect vmap_cnt
and vaddr.
Fixes: a5d2d29e24be ("dma-buf: heaps: Move heap-helper logic into the cma_heap
implementation")
Signed-off-by: Weizhao Ouyang
---
drivers/dma-buf/heaps/cma_heap.c | 6 --
1 file changed, 4 insertions(+), 2 del
Robert,
What is R-b tag?
On Tue, Jan 4, 2022 at 7:21 PM Robert Foss wrote:
>
> Jiri: Are you able to test this patch?
>
> Vinay: Could you supply a R-b tag, if you feel that it is warranted?
>
> On Tue, 14 Dec 2021 at 09:13, Vinay Simha B N wrote:
> >
> > Robert,
> > I do not have the hardware
On Wed, 05 Jan 2022, Yang Li wrote:
> Fix the following coccicheck warning:
> ./drivers/gpu/drm/i915/display/intel_fbc.c:1757:0-23: WARNING:
> intel_fbc_debugfs_false_color_fops should be defined with
> DEFINE_DEBUGFS_ATTRIBUTE
>
> Reported-by: Abaci Robot
> Signed-off-by: Yang Li
> ---
> drive
Entering suspend while the display attached to this bridge is still on
makes the resume sequence to resume the bridge first, display last:
when this happens, we get a timeout while resuming the bridge, as its
MCU will get stuck due to the display being unpowered.
On the other hand, on mt8173-elm,
As the possible failure of the allocation, kmemdup() may return NULL
pointer.
Therefore, it should be better to check the 'props2' in order to prevent
the dereference of NULL pointer.
Fixes: 3a87177eb141 ("drm/amdkfd: Add topology support for dGPUs")
Signed-off-by: Jiasheng Jiang
---
drivers/gpu
Hi Xin,
On 09.11.2021 03:42, Xin Ji wrote:
This patch provides HDCP setting interface for userspace to dynamic
enable/disable HDCP function.
Signed-off-by: Xin Ji
---
drivers/gpu/drm/bridge/analogix/anx7625.c | 368 +-
drivers/gpu/drm/bridge/analogix/anx7625.h | 69 +++-
On 04/01/2022 23:30, Matthew Brost wrote:
Don't use the interruptable version of the timeline mutex lock in the
interruptible
error path of eb_pin_timeline as the cleanup must always happen.
v2:
(John Harrison)
- Don't check for interrupt during mutex lock
Fixes: 544460c33821 ("drm/i
Fix the following coccicheck warning:
./drivers/gpu/drm/i915/display/intel_fbc.c:1757:0-23: WARNING:
intel_fbc_debugfs_false_color_fops should be defined with
DEFINE_DEBUGFS_ATTRIBUTE
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/i915/display/intel_fbc.c | 8
1 fi
On 12/23/2021 3:35 AM, Andrey Grodzovsky wrote:
Use reset domain wq also for non TDR gpu recovery trigers
such as sysfs and RAS. We must serialize all possible
GPU recoveries to gurantee no concurrency there.
For TDR call the original recovery function directly since
it's already executed from
Hi, Matthew
On 12/15/21 12:07, Matthew Auld wrote:
Add some proper flags for the different modes, and shorten the name to
something more snappy.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Matthew Auld
LGTM.
Reviewed-by: Thomas Hellström
On Wed, 5 Jan 2022 at 08:17, Xin Ji wrote:
>
> On Tue, Jan 04, 2022 at 03:50:34PM +0100, Robert Foss wrote:
> > Hey Xin,
> Hi Robert Foss, thanks for the reply.
> As HDCP config interface "anx7625_hdcp_config(..)" need be called in
> anx7625_connector_atomic_check(...) interface, so I cannot split
If the probe fails, we should use pm_runtime_disable() to balance
pm_runtime_enable().
Add missing pm_runtime_disable() for __dw_mipi_dsi_probe.
Fixes: 46fc515 ("drm/bridge/synopsys: Add MIPI DSI host controller bridge")
Signed-off-by: Miaoqian Lin
---
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi
Il 14/10/21 05:30, allen ha scritto:
This adds support for the iTE IT6505.
This device can convert DPI signal to DP output.
From: Allen Chen
Tested-by: Hsin-yi Wang
Signed-off-by: Hermes Wu
Signed-off-by: Allen Chen
---
This patch depends on
https://patchwork.kernel.org/project/linux-mediat
The pm_runtime_enable will increase power disable depth.
Thus a pairing decrement is needed on the error handling
path to keep it balanced according to context.
Fixes: 44cfc62 ("drm/bridge: Add NWL MIPI DSI host controller support")
Signed-off-by: Miaoqian Lin
---
drivers/gpu/drm/bridge/nwl-dsi.
Hi Shawn,
sorry for the delay, I just came back to work.
On Mon, Dec 06, 2021 at 09:06:28AM +0800, Shawn Guo wrote:
> On Mon, Nov 22, 2021 at 01:43:10PM +0100, Oleksij Rempel wrote:
> > The tsc2046 is an ADC used as touchscreen controller. To share as mach
> > code as possible, we should use it a
> From: Harry Wentland
> Sent: Wednesday, January 5, 2022 2:49 AM
> To: Modem, Bhanuprakash ; igt-
> d...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: Ville Syrjälä ; Shankar, Uma
> ; ppaala...@gmail.com
> Subject: Re: [i-g-t 04/14] tests/kms_color: New subtests for Plane gamma
>
On Wed, Jan 05, 2022 at 11:32:01AM +0100, Robert Foss wrote:
> On Wed, 5 Jan 2022 at 08:17, Xin Ji wrote:
> >
> > On Tue, Jan 04, 2022 at 03:50:34PM +0100, Robert Foss wrote:
> > > Hey Xin,
> > Hi Robert Foss, thanks for the reply.
> > As HDCP config interface "anx7625_hdcp_config(..)" need be cal
Hi Andrzej Hajda, thanks for the comment, I'll change it in next serial
patches.
Thanks,
Xin
On Wed, Jan 05, 2022 at 10:31:15AM +0100, Andrzej Hajda wrote:
> Hi Xin,
>
> On 09.11.2021 03:42, Xin Ji wrote:
> > This patch provides HDCP setting interface for userspace to dynamic
> > enable/disable
The pm_runtime_enable will increase power disable depth.
If the probe fails, we should use pm_runtime_disable() to balance
pm_runtime_enable().
Fixes: 57692c9 ("drm/v3d: Introduce a new DRM driver for Broadcom V3D V3.x+")
Signed-off-by: Miaoqian Lin
---
drivers/gpu/drm/v3d/v3d_drv.c | 2 ++
1 fi
This patch try to fix potential memleak in error branch.
For example:
nv50_sor_create ->nv50_mstm_new-> drm_dp_mst_topology_mgr_init,
In function drm_dp_mst_topology_mgr_init, there are five error
branches, error branch just return error code, no free called.
And we see that the caller didn`t do th
Hi Andy,
On Tue, Jan 04, 2022 at 07:07:23PM +0800, Andy Yan wrote:
>
>
> I thinks we should be very carefully about switch to regmap.
>
> Most of the registers are take effect by frame sync(that is you write the
> config done bit and when vsync interrupt come),
>
> Not only windows register, b
Am 05.01.22 um 10:54 schrieb Lazar, Lijo:
On 12/23/2021 3:35 AM, Andrey Grodzovsky wrote:
Use reset domain wq also for non TDR gpu recovery trigers
such as sysfs and RAS. We must serialize all possible
GPU recoveries to gurantee no concurrency there.
For TDR call the original recovery function d
https://bugzilla.kernel.org/show_bug.cgi?id=215445
Martin Pecka (pe...@seznam.cz) changed:
What|Removed |Added
CC||pe...@seznam.cz
--- Comm
On 1/5/2022 6:01 PM, Christian König wrote:
Am 05.01.22 um 10:54 schrieb Lazar, Lijo:
On 12/23/2021 3:35 AM, Andrey Grodzovsky wrote:
Use reset domain wq also for non TDR gpu recovery trigers
such as sysfs and RAS. We must serialize all possible
GPU recoveries to gurantee no concurrency ther
Am 05.01.22 um 14:11 schrieb Lazar, Lijo:
On 1/5/2022 6:01 PM, Christian König wrote:
Am 05.01.22 um 10:54 schrieb Lazar, Lijo:
On 12/23/2021 3:35 AM, Andrey Grodzovsky wrote:
Use reset domain wq also for non TDR gpu recovery trigers
such as sysfs and RAS. We must serialize all possible
GPU re
On 1/5/2022 6:45 PM, Christian König wrote:
Am 05.01.22 um 14:11 schrieb Lazar, Lijo:
On 1/5/2022 6:01 PM, Christian König wrote:
Am 05.01.22 um 10:54 schrieb Lazar, Lijo:
On 12/23/2021 3:35 AM, Andrey Grodzovsky wrote:
Use reset domain wq also for non TDR gpu recovery trigers
such as sysf
Am 05.01.22 um 14:26 schrieb Lazar, Lijo:
On 1/5/2022 6:45 PM, Christian König wrote:
Am 05.01.22 um 14:11 schrieb Lazar, Lijo:
On 1/5/2022 6:01 PM, Christian König wrote:
Am 05.01.22 um 10:54 schrieb Lazar, Lijo:
On 12/23/2021 3:35 AM, Andrey Grodzovsky wrote:
Use reset domain wq also for n
Hello,
syzbot found the following issue on:
HEAD commit:800829388818 mm: vmscan: reduce throttling due to a failur..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=158d5fc3b0
kernel config: https://syzkaller.appspot.com/x/.config?x=35d2332e44a37812
das
On 1/4/22 17:07, Thomas Hellström wrote:
Hi, Oak,
On 1/4/22 16:35, Zeng, Oak wrote:
Regards,
Oak
-Original Message-
From: Thomas Hellström
Sent: January 4, 2022 3:29 AM
To: Zeng, Oak ; intel-...@lists.freedesktop.org;
dri-devel@lists.freedesktop.org
Cc: Auld, Matthew
Subject: R
On 2021-12-22 7:37 p.m., Rajneesh
Bhardwaj wrote:
During CRIU restore phase, the VMAs for the virtual address ranges are
not at their final location yet so in this stage, only cache the data
required to successfully resume the svm ranges during an imminent CR
On 2021-12-22 7:37 p.m., Rajneesh
Bhardwaj wrote:
A KFD process may contain a number of virtual address ranges for shared
virtual memory management and each such range can have many SVM
attributes spanning across various nodes within the process boundary.
Thi
The TTM backend is in theory the only user here(also purge should only
be called once we have dropped the pages), where it is setup at object
creation and is only removed once the object is destroyed. Also
resetting the node here might be iffy since the ttm fault handler
uses the stored fake offset
Don't attempt to fault and re-populate purged objects. By some fluke
this passes the dontneed-after-mmap IGT, but for the wrong reasons.
Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_t
Purging can happen during swapping out, or directly invoked with the
madvise ioctl. In such cases this doesn't involve a ttm move, which
skips umapping the object.
Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/
Assuming we don't purge the pages, but instead swap them out then we
need to ensure we also unmap the object.
Fixes: 7ae034590cea ("drm/i915/ttm: add tt shmem backend")
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 ++
1 file changed, 2 inserti
On Wed, 2022-01-05 at 14:58 +, Matthew Auld wrote:
> Don't attempt to fault and re-populate purged objects. By some fluke
> this passes the dontneed-after-mmap IGT, but for the wrong reasons.
>
> Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
> Signed-off-by: Matthew Aul
On Tue, Jan 04, 2022 at 03:51:48PM -0800, Hridya Valsaraju wrote:
> Recently, we noticed an issue where a process went into direct reclaim
> while holding the kernfs rw semaphore for sysfs in write(exclusive)
> mode. This caused processes who were doing DMA-BUF exports and releases
> to go into uni
On 2021-12-22 7:37 p.m., Rajneesh
Bhardwaj wrote:
Recoverable page faults are represented by the xnack mode setting inside
a kfd process and are used to represent the device page faults. For CR,
we don't consider negative values which are typically used for q
On Wed, 2022-01-05 at 14:58 +, Matthew Auld wrote:
> Purging can happen during swapping out, or directly invoked with the
> madvise ioctl. In such cases this doesn't involve a ttm move, which
> skips umapping the object.
>
> Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
On Wed, 2022-01-05 at 14:58 +, Matthew Auld wrote:
> The TTM backend is in theory the only user here(also purge should
> only
> be called once we have dropped the pages), where it is setup at
> object
> creation and is only removed once the object is destroyed. Also
> resetting the node here mi
On 04/01/2022 12:51, Thomas Hellström wrote:
Implement async (non-blocking) unbinding by not syncing the vma before
calling unbind on the vma_resource.
Add the resulting unbind fence to the object's dma_resv from where it is
picked up by the ttm migration code.
Ideally these unbind fences should
Am 2022-01-05 um 4:09 a.m. schrieb Jiasheng Jiang:
> As the possible failure of the allocation, kmemdup() may return NULL
> pointer.
> Therefore, it should be better to check the 'props2' in order to prevent
> the dereference of NULL pointer.
>
> Fixes: 3a87177eb141 ("drm/amdkfd: Add topology suppo
On 05/01/2022 15:46, Thomas Hellström wrote:
On Wed, 2022-01-05 at 14:58 +, Matthew Auld wrote:
The TTM backend is in theory the only user here(also purge should
only
be called once we have dropped the pages), where it is setup at
object
creation and is only removed once the object is destro
On Wed, 2022-01-05 at 15:52 +, Matthew Auld wrote:
> On 04/01/2022 12:51, Thomas Hellström wrote:
> > Implement async (non-blocking) unbinding by not syncing the vma
> > before
> > calling unbind on the vma_resource.
> > Add the resulting unbind fence to the object's dma_resv from where
> > it
On Wed, 2022-01-05 at 16:03 +, Matthew Auld wrote:
> On 05/01/2022 15:46, Thomas Hellström wrote:
> > On Wed, 2022-01-05 at 14:58 +, Matthew Auld wrote:
> > > The TTM backend is in theory the only user here(also purge should
> > > only
> > > be called once we have dropped the pages), where
Am 2022-01-05 um 3:08 a.m. schrieb Christian König:
> Am 04.01.22 um 19:08 schrieb Felix Kuehling:
>> [+Adrian]
>>
>> Am 2021-12-23 um 2:05 a.m. schrieb Christian König:
>>
>>> Am 22.12.21 um 21:53 schrieb Daniel Vetter:
On Mon, Dec 20, 2021 at 01:12:51PM -0500, Bhardwaj, Rajneesh wrote:
Am 2022-01-05 um 11:16 a.m. schrieb Felix Kuehling:
>> I was already wondering which mmaps through the KFD node we have left
>> which cause problems here.
> We still use the KFD FD for mapping doorbells and HDP flushing. These
> are both SG BOs, so they cannot be CPU-mapped through render nodes. Th
On Wed, Jan 05, 2022 at 09:35:44AM +, Tvrtko Ursulin wrote:
>
> On 04/01/2022 23:30, Matthew Brost wrote:
> > Don't use the interruptable version of the timeline mutex lock in the
>
> interruptible
>
> > error path of eb_pin_timeline as the cleanup must always happen.
> >
> > v2:
> > (Joh
The pcon_dsc_dpcd array holds 13 registers (0x92 through 0x9E). Fix the
math to calculate the max size. Found from a -Warray-bounds build:
drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_pcon_dsc_bpp_incr':
drivers/gpu/drm/drm_dp_helper.c:3130:28: error: array subscript 12 is outside
array b
On Wed, 5 Jan 2022 at 10:08, AngeloGioacchino Del Regno
wrote:
>
> Entering suspend while the display attached to this bridge is still on
> makes the resume sequence to resume the bridge first, display last:
> when this happens, we get a timeout while resuming the bridge, as its
> MCU will get stu
The link_status array was not large enough to read the Adjust Request
Post Cursor2 register, so remove the common helper function to avoid
an OOB read, found with a -Warray-bounds build:
drivers/gpu/drm/drm_dp_helper.c: In function
'drm_dp_get_adjust_request_post_cursor':
drivers/gpu/drm/drm_dp_h
Hey,
Thanks for submitting this fix.
On Wed, 5 Jan 2022 at 11:41, Miaoqian Lin wrote:
>
> If the probe fails, we should use pm_runtime_disable() to balance
> pm_runtime_enable().
> Add missing pm_runtime_disable() for __dw_mipi_dsi_probe.
>
> Fixes: 46fc515 ("drm/bridge/synopsys: Add MIPI DSI ho
Hey Miaoqian,
Thanks for submitting this patch!
On Wed, 5 Jan 2022 at 11:48, Miaoqian Lin wrote:
>
> The pm_runtime_enable will increase power disable depth.
> Thus a pairing decrement is needed on the error handling
> path to keep it balanced according to context.
>
> Fixes: 44cfc62 ("drm/bridg
Regards,
Oak
> -Original Message-
> From: Thomas Hellström
> Sent: January 5, 2022 8:44 AM
> To: Zeng, Oak ; intel-...@lists.freedesktop.org;
> dri-devel@lists.freedesktop.org; Bloomfield, Jon
> ; Vetter, Daniel ; Wilson,
> Chris P
> Cc: Auld, Matthew
> Subject: Re: [Intel-gfx] [PAT
On Wed, 05 Jan 2022, Kees Cook wrote:
> The link_status array was not large enough to read the Adjust Request
> Post Cursor2 register, so remove the common helper function to avoid
> an OOB read, found with a -Warray-bounds build:
>
> drivers/gpu/drm/drm_dp_helper.c: In function
> 'drm_dp_get_adj
On 2022-01-05 7:31 a.m., Christian König wrote:
Am 05.01.22 um 10:54 schrieb Lazar, Lijo:
On 12/23/2021 3:35 AM, Andrey Grodzovsky wrote:
Use reset domain wq also for non TDR gpu recovery trigers
such as sysfs and RAS. We must serialize all possible
GPU recoveries to gurantee no concurrency th
On 2022-01-05 2:59 a.m., Christian König wrote:
Am 05.01.22 um 08:34 schrieb JingWen Chen:
On 2022/1/5 上午12:56, Andrey Grodzovsky wrote:
On 2022-01-04 6:36 a.m., Christian König wrote:
Am 04.01.22 um 11:49 schrieb Liu, Monk:
[AMD Official Use Only]
See the FLR request from the hypervisor i
On Wed, Jan 05, 2022 at 05:42:16PM +, John Garry wrote:
> On 29/12/2021 16:55, Niklas Schnelle wrote:
> > On Wed, 2021-12-29 at 10:03 -0600, Bjorn Helgaas wrote:
> > > On Wed, Dec 29, 2021 at 01:12:07PM +0100, Mauro Carvalho Chehab wrote:
> > > > Em Wed, 29 Dec 2021 12:45:38 +0100
> > > > Nikla
(updating Andrzej's email)
On Fri, Oct 1, 2021 at 2:50 PM Brian Norris wrote:
> If the display is not enable()d, then we aren't holding a runtime PM
> reference here. Thus, it's easy to accidentally cause a hang, if user
> space is poking around at /dev/drm_dp_aux0 at the "wrong" time.
>
> Let's
Quoting Christophe JAILLET (2021-12-26 07:14:05)
> 'dp_bridge' is devm_alloc'ed, so there is no need to free it explicitly or
> there will be a double free().
>
> Fixes: 8a3b4c17f863 ("drm/msm/dp: employ bridge mechanism for display enable
> and disable")
> Signed-off-by: Christophe JAILLET
> ---
Le 05/01/2022 à 21:09, Stephen Boyd a écrit :
Quoting Christophe JAILLET (2021-12-26 07:14:05)
'dp_bridge' is devm_alloc'ed, so there is no need to free it explicitly or
there will be a double free().
Fixes: 8a3b4c17f863 ("drm/msm/dp: employ bridge mechanism for display enable and
disable")
Si
Quoting Kuogee Hsieh (2021-12-29 10:15:45)
> diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h
> b/drivers/gpu/drm/msm/dp/dp_catalog.h
> index 6965afa..7dea101 100644
> --- a/drivers/gpu/drm/msm/dp/dp_catalog.h
> +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h
> @@ -94,7 +94,7 @@ void dp_catalog_ctrl_mai
Quoting Kuogee Hsieh (2022-01-04 15:52:07)
> Each DP link training contains link training 1 followed by link
> training 2. There is maximum of 5 retries of DP link training
> before declared link training failed. It is required to stop link
> training at end of link training 2 if it is failed so t
[Why]
Creating the prop uses UNKNOWN as the initial value, which is not a
supported value if the prop is to be supported.
[How]
Set the panel orientation default value to NORMAL right after creating
the prop if no DSI panel exists.
Panels have their own orientations, and panel orientation can't be
https://bugzilla.kernel.org/show_bug.cgi?id=210263
jaromir@gmail.com changed:
What|Removed |Added
CC||jaromir@gmail.com
--- Comment
Quoting Kuogee Hsieh (2021-12-29 11:17:02)
> There is kernel crashed due to unable to handle kernel NULL
> pointer dereference of dp_panel->connector while running DP link
> layer compliance test case 4.2.2.6 (EDID Corruption Detection).
Can you explain how we get into that situation? Like
"We ne
On Wed, Jan 05, 2022 at 08:00:50PM +0200, Jani Nikula wrote:
> On Wed, 05 Jan 2022, Kees Cook wrote:
> > The link_status array was not large enough to read the Adjust Request
> > Post Cursor2 register, so remove the common helper function to avoid
> > an OOB read, found with a -Warray-bounds build
On 2022-01-05 06:21, Modem, Bhanuprakash wrote:
>> From: Harry Wentland
>> Sent: Wednesday, January 5, 2022 2:49 AM
>> To: Modem, Bhanuprakash ; igt-
>> d...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
>> Cc: Ville Syrjälä ; Shankar, Uma
>> ; ppaala...@gmail.com
>> Subject: Re: [i-g-
Quoting Christophe JAILLET (2021-12-22 11:33:47)
> dp_debug_init() always returns 0. So, make it a void function and simplify
> the only caller accordingly.
>
> While at it remove a useless 'rc' initialization in dp_debug_get()
>
> Signed-off-by: Christophe JAILLET
> ---
Reviewed-by: Stephen Boyd
INTF blocks are not really handled by resource manager, they are
assigned at dpu_encoder_setup_display using dpu_encoder_get_intf().
Then this allocation is passed to RM and then returned to then
dpu_encoder. So allocate them outside of RM and use them directly.
While we are at it, drop the lm_max
Add missing calls to dpu_hw_dspp_destroy() to free resources allocated
for DSPP hardware blocks.
Fixes: e47616df008b ("drm/msm/dpu: add support for color processing blocks in
dpu driver")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 8
1 file changed, 8
INTF blocks are not really handled by resource manager, they are
assigned at dpu_encoder_setup_display using dpu_encoder_get_intf().
Then this allocation is passed to RM and then returned to then
dpu_encoder.
So allocate them outside of RM and use them directly.
Signed-off-by: Dmitry Baryshkov
--
No code uses lm_max_width from resource manager, so drop it. Instead of
calculating the lm_max_width, code can use max_mixer_width field from
the hw catalog.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 4
Now as dpu_hw_intf is not hanled by dpu_rm_get_assigned_resources, there
is no point in embedding the (empty) struct dpu_hw_blk into dpu_hw_intf
(and using typecasts between dpu_hw_blk and dpu_hw_intf). Drop it and
use dpu_hw_intf directly.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm
Move handling of VBIF blocks into dpu_rm. This serves the purpose of
unification of handling of all hardware blocks inside the DPU driver.
This removes hand-coded loops in dpu_vbif (which look for necessary VBIF
instance by looping through the dpu_kms->hw_vbif and comparing
vbif_idx).
Signed-off-b
Register logging was used during early stages of msm driver development
to compare upstream and downstream register traces. However the tool was
never updated to work with mdp5 hardware. Later it was dropped
completely when Rob imported freedreno tools into mesa. All this makes
DRM_MSM_REGISTER_LOG
msm_ioremap() functions take additional argument dbgname which is now
unused.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 2 +-
drivers/gpu/drm/msm/dis
With the reglog removal, msm_readl/_writel became single line wrappers
around readl/writel. Move those two wrappers and msm_rmw to msm_drv.h to
remove need for extra function calls when doing register writes.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.c | 20
Quoting Dmitry Baryshkov (2022-01-05 15:26:58)
> Register logging was used during early stages of msm driver development
> to compare upstream and downstream register traces. However the tool was
> never updated to work with mdp5 hardware. Later it was dropped
> completely when Rob imported freedre
Quoting Dmitry Baryshkov (2022-01-05 15:26:59)
> msm_ioremap() functions take additional argument dbgname which is now
> unused.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Stephen Boyd
Quoting Dmitry Baryshkov (2022-01-05 15:27:00)
> With the reglog removal, msm_readl/_writel became single line wrappers
> around readl/writel. Move those two wrappers and msm_rmw to msm_drv.h to
> remove need for extra function calls when doing register writes.
>
> Signed-off-by: Dmitry Baryshkov
Pushed patches 1 & 2 to drm-misc-next. Thanks for your contribution!
Thanks for working on this! I've pushed a patch [1] to drm-misc-next which
touches the same function, can you rebase your patches on top of it?
[1]: https://patchwork.freedesktop.org/patch/467940/?series=98255&rev=3
On Thu, 6 Jan 2022 at 02:43, Stephen Boyd wrote:
>
> Quoting Dmitry Baryshkov (2022-01-05 15:27:00)
> > With the reglog removal, msm_readl/_writel became single line wrappers
> > around readl/writel. Move those two wrappers and msm_rmw to msm_drv.h to
> > remove need for extra function calls when
From: Bjorn Helgaas
Current default VGA device selection fails in some cases because part of it
is done in the vga_arb_device_init() subsys_initcall, and some arches
enumerate PCI devices in pcibios_init(), which runs *after* that.
For example:
- On BMC system, the AST2500 bridge [1a03:1150]
From: Huacai Chen
Move vga_arb_integrated_gpu() earlier in file to prepare for future patch.
No functional change intended.
[bhelgaas: pull #ifdefs inside function]
Link: https://lore.kernel.org/r/20211015061512.2941859-3-chenhua...@loongson.cn
Signed-off-by: Huacai Chen
Signed-off-by: Bjorn He
From: Bjorn Helgaas
On x86 and ia64, if a VGA device BARs include a framebuffer reported by
platform firmware, we select the device as the default VGA device. Factor
this code to a separate function. No functional change intended.
Signed-off-by: Bjorn Helgaas
Cc: Bruno Prémont
---
drivers/g
From: Bjorn Helgaas
Default VGA device selection fails when PCI devices are enumerated after
the vga_arb_device_init() subsys_initcall.
vga_arbiter_add_pci_device() selects the first fully enabled device to
which legacy VGA resources are routed as the default VGA device. This is
an ADD_DEVICE n
From: Bjorn Helgaas
Previously we selected a device that owns the boot framebuffer as the
default device in vga_arb_select_default_device(). This was only done in
the vga_arb_device_init() subsys_initcall, so devices enumerated later,
e.g., by pcibios_init(), were not eligible.
Fix this by movi
From: Bjorn Helgaas
a37c0f48950b ("vgaarb: Select a default VGA device even if there's no
legacy VGA") extended the vga_arb_device_init() subsys_initcall so it could
select a non-legacy VGA device as the default.
That failed to consider that PCI devices may be enumerated after
vga_arb_device_ini
From: Bjorn Helgaas
a37c0f48950b ("vgaarb: Select a default VGA device even if there's no
legacy VGA") extended the vga_arb_device_init() subsys_initcall so that if
there are no other eligible devices, it could select a disabled VGA device
as the default.
Move this detection from vga_arb_select_
From: Bjorn Helgaas
vga_arb_device_card_gone() has always been empty. Remove it.
Signed-off-by: Bjorn Helgaas
---
drivers/gpu/vga/vgaarb.c | 16 +---
1 file changed, 1 insertion(+), 15 deletions(-)
diff --git a/drivers/gpu/vga/vgaarb.c b/drivers/gpu/vga/vgaarb.c
index ad548917e60
From: Huacai Chen
Previously vga_arb_device_init() iterated through all VGA devices and
indicated whether legacy VGA routing to each could be controlled by an
upstream bridge.
But we determine that information in vga_arbiter_add_pci_device(), which we
call for every device, so we can log it ther
From: Bjorn Helgaas
Per Documentation/process/license-rules.rst, the SPDX MIT identifier is
equivalent to including the entire MIT license text from
LICENSES/preferred/MIT.
Replace the MIT license text with the equivalent SPDX identifier.
Signed-off-by: Bjorn Helgaas
---
drivers/gpu/vga/vgaar
From: Bjorn Helgaas
In struct vga_device, io_lock_cnt and mem_lock_cnt are unsigned, but we
previously printed them with "%d", the signed decimal format. Print them
with the unsigned format "%u" instead.
Signed-off-by: Bjorn Helgaas
---
drivers/gpu/vga/vgaarb.c | 2 +-
1 file changed, 1 inser
These patches coninue work started by AngeloGioacchino Del Regno in the
previous cycle by further decoupling and dissecting MDSS and MDP drivers
probe/binding paths.
This removes code duplication between MDP5 and DPU1 MDSS drivers, by
merging them and moving to the top level.
This patchset depend
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