Hi Dave, Daniel,
Fixes for 5.16.
The following changes since commit a687efed194bdc185fd7cb33920fe8b4e60ecb9e:
Merge tag 'drm-intel-fixes-2021-12-02' of
git://anongit.freedesktop.org/drm/drm-intel into drm-fixes (2021-12-03 05:59:31
+1000)
are available in the Git repository at:
https://g
> From: José Expósito
> Sent: Wednesday, December 8, 2021 2:37 PM
>
> If allocating the DMA buffer fails, mana_hwc_destroy_wq was called
> without previously storing the pointer to the queue.
>
> In order to avoid leaking the pointer to the queue, store it as soon as
> it is allocated.
>
> Addr
On Wed, Dec 08, 2021 at 01:19:28PM +0200, Jani Nikula wrote:
> On Fri, 03 Dec 2021, Kees Cook wrote:
> > The link_status array was not large enough to read the Adjust Request
> > Post Cursor2 register. Adjust the size to include it. Found with a
> > -Warray-bounds build:
> >
> > drivers/gpu/drm/dr
t/20211208-231502
base:
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
for-next
config: arc-allyesconfig
(https://download.01.org/0day-ci/archive/20211209/202112090830.yvovxyce-...@intel.com/config)
compiler: arceb-elf-gcc (GCC) 11.2.0
reproduce (this is a
Hello Laura,
On Wed, 8 Dec 2021 at 04:25, wrote:
>
> From: Laura Abbott
>
> Consolodate everything under an @kernel.org address.
>
> Signed-off-by: Laura Abbott
> ---
> Sumit, can you take this through your tree?
Thanks for the patch; sure I will!
> ---
> .mailmap| 3 +++
> MAINTAINERS | 2
Quoting Kuogee Hsieh (2021-12-08 12:36:24)
> Current DP drivers have regulators, clocks, irq and phy are grouped
> together within a function and executed not in a symmetric manner.
> This increase difficulty of code maintenance and limited code scalability.
> This patch divided the driver life cyc
Hello,
My static analysis tool reports a possible ABBA deadlock in the drm
driver in Linux 5.10:
drm_gem_prime_fd_to_handle()
mutex_lock(&dev->object_name_lock); --> Line 313 (Lock A)
drm_gem_handle_delete()
drm_gem_object_release_handle()
drm_gem_remove_prime_handles()
m
Fixes: 09234b88ef55 ("drm/selftests/test-drm_dp_mst_helper: Move
'sideband_msg_req_encode_decode' onto the heap")
Addresses-Coverity-ID: 1475685 ("Resource leak")
Signed-off-by: José Expósito
---
drivers/gpu/drm/selftests/test-drm_dp_mst_helper.c | 4 +++-
1 file changed, 3 insertions(+), 1 dele
Quoting Kuogee Hsieh (2021-12-08 09:41:02)
> Add checking aux read/write status at both dp_link_parse_sink_count()
> and dp_link_parse_sink_status_filed() to avoid long timeout delay if
> dp aux read/write failed at timeout due to cable unplugged.
>
> Changes in V4:
> -- split this patch as stand a
On Thursday, 9 December 2021 12:53:45 AM AEDT Jason Gunthorpe wrote:
> > I think a similar problem exists for device private fault handling as well
> > and
> > it has been on my list of things to fix for a while. I think the solution
> > is to
> > call try_get_page(), except it doesn't work with
From: Zack Rusin
v2: Old userspace doesn't like 3.x.x and we'd like to keep it working,
so lets just bump the minor version until we have no choice.
With GEM, GL4.3, stats and removal of a lot of old code it's time to bump
the minor version of the driver.
Signed-off-by: Zack Rusin
---
drivers
Quoting Sean Paul (2021-11-04 20:04:31)
> From: Sean Paul
>
> This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
$ git grep "This patch" -- Documentation/process/
> helpers.
>
> Cc: Stephen Boyd
> Cc: Abhinav Kumar
> Signed-off-by: Sean Paul
> Link:
> https://patchwork
Hi Mark:
Mark Yacoub 於 2021年10月28日 週四 上午12:28寫道：
>
> From: Mark Yacoub
>
> At the reset hook, call __drm_atomic_helper_plane_reset which is
> called at the initialization of the plane and sets the default value of
> rotation on all planes to DRM_MODE_ROTATE_0 which is equal to 1.
This patch loo
On Thu, Nov 18, 2021 at 2:50 PM Alexander Stein
wrote:
>
> From: Laurent Pinchart
>
> The SN65DSI8x EN signal may be tied to VCC, or otherwise controlled by
> means not available to the kernel. Make the GPIO optional.
Sorry, I couldn't understand what it means. Does it mean VCC enabled
designs n
On Wed, Nov 10, 2021 at 9:08 PM Guillaume Ranquet wrote:
>
> From: Markus Schneider-Pargmann
>
> This patch adds a DisplayPort driver for the Mediatek mt8195 SoC and a
> according phy driver mediatek-dp-phy.
>
> It supports both functional units on the mt8195, the embedded
> DisplayPort as well a
On Wed, Dec 08, 2021 at 01:19:28PM +0200, Jani Nikula wrote:
> On Fri, 03 Dec 2021, Kees Cook wrote:
> > The link_status array was not large enough to read the Adjust Request
> > Post Cursor2 register. Adjust the size to include it. Found with a
> > -Warray-bounds build:
> >
> > drivers/gpu/drm/dr
From: chiminghao
return value form directly instead of
taking this in another redundant variable.
Reported-by: Zeal Robot
Signed-off-by: chiminghao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ioc32.c | 5 +
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 6 ++
2 files changed, 3 insertions(+),
Clean up the following includecheck warning:
./drivers/gpu/drm/drm_gem_shmem_helper.c: linux/module.h is included
more than once.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/drm_gem_shmem_helper.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/
Hi Tim
On Tue, Oct 5, 2021 at 11:43 PM Tim Harvey wrote:
>
> On Sun, Jul 25, 2021 at 10:14 AM Jagan Teki
> wrote:
> >
> > Hi Sam,
> >
> > On Sun, Jul 25, 2021 at 10:35 PM Sam Ravnborg wrote:
> > >
> > > Hi Jagan,
> > >
> > > On Sun, Jul 04, 2021 at 02:32:13PM +0530, Jagan Teki wrote:
> > > > T
On 2021-10-18 11:36, Bjorn Andersson wrote:
On Mon 18 Oct 11:07 PDT 2021, abhin...@codeaurora.org wrote:
Hi Bjorn
On 2021-10-17 09:42, Bjorn Andersson wrote:
> On Fri 15 Oct 16:53 PDT 2021, abhin...@codeaurora.org wrote:
>
> > On 2021-10-15 16:17, Bjorn Andersson wrote:
> > > In the cleanup pa
On Thu, Dec 09, 2021 at 12:45:24PM +1100, Alistair Popple wrote:
> On Thursday, 9 December 2021 12:53:45 AM AEDT Jason Gunthorpe wrote:
> > > I think a similar problem exists for device private fault handling as
> > > well and
> > > it has been on my list of things to fix for a while. I think the
Hi
Am 08.12.21 um 18:49 schrieb Rob Herring:
On Tue, Dec 7, 2021 at 1:31 AM Hector Martin wrote:
This code is required for both simplefb and simpledrm, so let's move it
into the OF core instead of having it as an ad-hoc initcall in the
drivers.
Signed-off-by: Hector Martin
---
drivers/of/
Hello,
Could you please provide the feedback to my previous report?
Thanks a lot :)
Best wishes,
Jia-Ju Bai
On 2021/9/15 17:39, Jia-Ju Bai wrote:
Hello,
My static analysis tool reports a possible ABBA deadlock in the amdgpu
driver in Linux 5.10:
amdgpu_debugfs_process_reg_op()
mutex_loc
FYI this issue was fixed by [1]. Please don't merge.
[1]
https://lore.kernel.org/dri-devel/20211130095255.26710-1-tzimmerm...@suse.de/
Am 18.11.21 um 12:15 schrieb Dan Carpenter:
The ->gem_create_object() function pointers are supposed to return NULL
on error. This function returns an error
Always waiting for the exclusive fence resulted on some performance
regressions. So try to wait for the shared fences first, then the
exclusive fence should always be signaled already.
v2: fix incorrectly placed "(", add some comment why we do this.
Signed-off-by: Christian König
---
drivers/gp
On Thu, Nov 18, 2021 at 2:50 PM Alexander Stein
wrote:
>
> Add a VCC regulator which needs to be enabled before the EN pin is
> released.
>
> Reviewed-by: Sam Ravnborg
> Acked-by: Rob Herring
> Signed-off-by: Alexander Stein
> ---
> .../devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
On Thu, Nov 18, 2021 at 2:50 PM Alexander Stein
wrote:
>
> VCC needs to be enabled before releasing the enable GPIO.
>
> Signed-off-by: Alexander Stein
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi83.c | 19 +++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/brid
On Thursday, 9 December 2021 5:55:26 AM AEDT Sierra Guiza, Alejandro (Alex)
wrote:
>
> On 12/8/2021 11:30 AM, Felix Kuehling wrote:
> > Am 2021-12-08 um 11:58 a.m. schrieb Felix Kuehling:
> >> Am 2021-12-08 um 6:31 a.m. schrieb Alistair Popple:
> >>> On Tuesday, 7 December 2021 5:52:43 AM AEDT Al
On Wed, 2021-12-08 at 21:49 -0500, Zack Rusin wrote:
> From: Zack Rusin
>
> v2: Old userspace doesn't like 3.x.x and we'd like to keep it working,
> so lets just bump the minor version until we have no choice.
>
> With GEM, GL4.3, stats and removal of a lot of old code it's time to
> bump the mi
On Mon, 2021-12-06 at 12:26 -0500, Zack Rusin wrote:
> From: Zack Rusin
>
> Update the headers for GL43 userspace works that landed in Mesa3D. Also
> update the license headers to conform to the kernel guidelines.
>
> For GL43 the virtual device got D3D11.1 support with some GL extensions.
>
>
On Mon, 2021-12-06 at 12:26 -0500, Zack Rusin wrote:
> From: Zack Rusin
>
> Using MOBFMT_RANGE in the early days of guest backed objects was a major
> performance win but that has changed a lot since. There's no more
> a performance reason to use MOBFMT_RANGE. The device can/will still
> profit f
Am 07.12.21 um 21:45 schrieb Dan Moulding:
There is a pretty obvious typo in there:
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -359,7 +359,7 @@ nouveau_fence_sync(struct nouveau_bo *nvbo, struct
nouveau_channel *chan, bool e
On Tue, Nov 23, 2021 at 06:32:46PM +0200, Andy Shevchenko wrote:
> On Mon, Nov 15, 2021 at 01:35:47PM +0200, Andy Shevchenko wrote:
> > On Wed, Nov 10, 2021 at 05:39:33PM +0100, Thomas Zimmermann wrote:
> > > Am 10.11.21 um 17:34 schrieb Andy Shevchenko:
> > > > On Wed, Nov 10, 2021 at 3:55 PM Thom
On Mon, 29 Nov 2021 at 13:57, Maarten Lankhorst
wrote:
>
> This duck tape workaround is no longer required, unbind and destroy are
> fixed to take the obj->resv mutex before destroying and obj->mm.lock has
> been removed, always requiring obj->resv as well.
>
> Signed-off-by: Maarten Lankhorst
Re
Am 08.12.21 um 21:53 schrieb Rajneesh Bhardwaj:
When an application having open file access to a node forks, its shared
mappings also get reflected in the address space of child process even
though it cannot access them with the object permissions applied. With the
existing permission checks on t
On Thu, 9 Dec 2021 at 13:46, Maarten Lankhorst
wrote:
>
> On 09-12-2021 14:40, Matthew Auld wrote:
> > On Thu, 9 Dec 2021 at 13:25, Maarten Lankhorst
> > wrote:
> >> On 09-12-2021 14:05, Matthew Auld wrote:
> >>> On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
> >>> wrote:
> We want to remo
On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
wrote:
>
> Now that we cannot unbind kill the currently locked object directly
Can this be reworded slightly? Not sure what is meant by "unbind kill" here.
> because we're removing short term pinning, we may have to unbind the
> object from gtt man
Hi Rajneesh,
yes, separating this from the drm_gem_mmap_obj() change is certainly a
good idea.
The child cannot access the BOs mapped by the parent anyway with
access restrictions applied
exactly that is not correct. That behavior is actively used by some
userspace stacks as far as I know.
On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
wrote:
>
> We want to remove more members of i915_vma, which requires the locking to be
> held more often.
>
> Start requiring gem object lock for i915_vma_unbind, as it's one of the
> callers that may unpin pages.
>
> Some special care is needed whe
> -Original Message-
> From: Hansen, Dave
> Sent: Thursday, December 9, 2021 2:27 AM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Cc: x...@kernel.org; dri-devel@lists.freedesktop.org; Ingo Molnar
> ; Borislav Petkov ; Dave Hansen
> ; Joonas Lahtinen
> ; Tvrtko Ursulin
>
Hi all
On Sat, Oct 16, 2021 at 4:58 PM Michael Trimarchi
wrote:
>
> All the panel driver check the fact that their prepare/unprepare
> call was already called. It's not an ideal solution but fix
> for now the problem on ili9881c
>
> [ 9862.283296] [ cut here ]
> [ 9862.288
Hi Dave and Daniel,
here's this week's PR for drm-misc-next.
There was a problem with merging commit e580ea25c08d ("drm/cma-helper: Pass
GEM CMA object in public interfaces") into drm-tip. The commit is correct
in drm-misc-next, but it conflicted with commit 96c5f82ef0a1 ("drm/vc4: fix
error code
On Tue, Dec 7, 2021 at 9:19 AM Cai Huoqing wrote:
>
> Hi Oded Gabbay and habanalabs folks.
>
> I'm insterested in this kind of AI acceralator.
>
> After scanning the driver code.
> It seems that there are a linux firmware which is loaded by
> coprocessor(an slave cpu ?).
> shows in the code.
>
> .
On Mon, 2021-12-06 at 12:26 -0500, Zack Rusin wrote:
> From: Zack Rusin
>
> If the host supports SVGA3D_DEVCAP_GL43, we can handle 64 instead of
> just 8 UAVs.
> Based on a patch from Roland Scheidegger .
>
> Signed-off-by: Roland Scheidegger
> Signed-off-by: Zack Rusin
> ---
> drivers/gpu/dr
Fixes: 76ecd9c9fb24 ("drm/imx: parallel-display: check return code from
of_get_drm_display_mode()")
Addresses-Coverity-ID: 1443943 ("Resource leak")
Signed-off-by: José Expósito
---
drivers/gpu/drm/imx/parallel-display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/driv
Am Donnerstag, dem 09.12.2021 um 12:37 +0530 schrieb Jagan Teki:
> On Thu, Nov 18, 2021 at 2:50 PM Alexander Stein
> <
> alexander.st...@ew.tq-group.com
> > wrote:
> > From: Laurent Pinchart <
> > laurent.pinch...@ideasonboard.com
> > >
> >
> > The SN65DSI8x EN signal may be tied to VCC, or otherw
On Thu, Dec 9, 2021 at 5:30 PM Dmitry Osipenko wrote:
> 09.12.2021 18:05, Akhil R пишет:
> > +static int tegra_i2c_setup_smbalert(struct tegra_i2c_dev *i2c_dev)
> > +{
> > + struct tegra_i2c_smbalert *smbalert = &i2c_dev->smbalert;
> > + struct gpio_desc *alert_gpiod;
> > + struct i2c_
Hi,
the first patch concludes the first stage of refactoring which
makes the use of intel_gt on the different subsystem. It's taken
from Matt's series and it has alread been reviewed. The patch has
just been replaced before any multitile patches and I think it
can be already pushed.
Patch 2-10 ar
From: Michał Winiarski
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Michał Winiarski
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/i915_debugfs.c| 38 +++
drivers/gpu/drm/i915/i9
Hello Johannes,
Sorry for the late response. I was on holidays for a week and just came back.
On 12/4/21 13:41, Johannes Stezenbach wrote:
> Hi,
>
> On Wed, Oct 20, 2021 at 06:57:40PM +0200, Javier Martinez Canillas wrote:
>> This reverts commit b3484d2b03e4c940a9598aa841a52d69729c582a.
>>
>> Th
From: Michał Winiarski
We now support a per-gt uncore, yet we're not able to infer which GT
we're operating upon. Let's store a backpointer for now.
Signed-off-by: Michał Winiarski
Signed-off-by: Matt Roper
Reviewed-by: Andi Shyti
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel
This tiling layout uses 4KB tiles in a row-major layout. It has the same
shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It
only differs from Tile Y at the 256B granularity in between. At this
granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape
of
Tile4 in bspec format is 4K tile organized into
64B subtiles with same basic shape as for legacy TileY
which will be supported by Display13.
v2: - Moved Tile4 assocating struct for modifier/display to
the beginning(Imre Deak)
- Removed unneeded case I915_FORMAT_MOD_4_TILED modifier
Hi Laurent,
On Thu, Dec 9, 2021 at 10:09 PM Laurent Pinchart
wrote:
>
> Hi Jagan,
>
> On Thu, Dec 09, 2021 at 12:34:49PM +0530, Jagan Teki wrote:
> > On Thu, Nov 18, 2021 at 2:50 PM Alexander Stein wrote:
> > >
> > > VCC needs to be enabled before releasing the enable GPIO.
> > >
> > > Signed-off
Hi Dave, Daniel,
Here's this week drm-misc-fixes PR
Maxime
drm-misc-fixes-2021-12-09:
A fix in syncobj to handle fence already signalled better, and a fix for
a ttm_bo_swapout eviction check.
The following changes since commit 679d94cd7d900871e5bc9cf780bd5b73af35ab42:
dma-buf: system_heap: Us
From: Michał Winiarski
To allow further refactoring and abstract away the fact that GT is
stored inside i915 private.
No functional changes.
Signed-off-by: Michał Winiarski
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 7 +--
drivers/gpu/drm/i915/i915_drv.
Hi
Am 09.12.21 um 13:24 schrieb Andy Shevchenko:
On Tue, Nov 23, 2021 at 06:32:46PM +0200, Andy Shevchenko wrote:
On Mon, Nov 15, 2021 at 01:35:47PM +0200, Andy Shevchenko wrote:
On Wed, Nov 10, 2021 at 05:39:33PM +0100, Thomas Zimmermann wrote:
Am 10.11.21 um 17:34 schrieb Andy Shevchenko:
From: CQ Tang
Platforms of XeHP and beyond support 3D surface (buffer) compression and
various compression formats. This is accomplished by an additional
compression control state (CCS) stored for each surface.
Gen 12 devices(TGL family and DG1) stores compression states in a separate
region of
In the DC driver, we have multiple acronyms that are not obvious most of
the time; the same idea is valid for amdgpu. This commit introduces a DC
and amdgpu glossary in order to make it easier to navigate through our
driver.
Changes since V3:
- Yann: Add new acronyms to amdgpu glossary
- Daniel:
Hi Dave, Daniel,
Here goes the first PR towards 5.17.
On the bugfixing front most user visible items are a fix for GPU hangs caused by
certain media and OpenCL workloads applicable from Gen9 (Skylake) onward, a fix
for GPU hangs in Gnome shell on Tigerlake platforms and a fix for runtime power
From: Michał Winiarski
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Michał Winiarski
Signed-off-by: Andi Shyti
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 4 ++--
drivers/gpu/drm/i915/display/i
From: Michał Winiarski
GGTT is currently available both through i915->ggtt and gt->ggtt, and we
eventually want to get rid of the i915->ggtt one.
Use to_gt() for all i915->ggtt accesses to help with the future
refactoring.
Signed-off-by: Michał Winiarski
Cc: Michal Wajdeczko
Signed-off-by: And
Tegra I2C can use a gpio as an smbus-alert. Document the usage of
the same.
Signed-off-by: Akhil R
---
Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
b/Documentatio
On 09-12-2021 13:17, Matthew Auld wrote:
> On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
> wrote:
>> Now that we cannot unbind kill the currently locked object directly
> Can this be reworded slightly? Not sure what is meant by "unbind kill" here.
Oops, the word 'kill' doesn't belong here.
>> be
From: Michał Winiarski
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Michał Winiarski
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 2 +-
drivers/gpu/drm/i915/gt/int
When we recently converted the capture code to use vma snapshots,
we forgot to free the struct i915_capture_list list items after use.
Fix that by bringing back a kfree.
Fixes: ff20afc4cee7 ("drm/i915: Update error capture code to avoid using the
current vma state")
Cc: Ramalingam C
Signed-off-
Display core documentation is not well organized, and it is hard to find
information due to the lack of sections. This commit reorganizes the
documentation layout, and it is preparation work for future changes.
Changes since V1:
- Christian: Group amdgpu documentation together.
- Daniel: Drop redu
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_
Display core provides a feature that makes it easy for users to debug
Multiple planes by enabling a visual notification at the bottom of each
plane. This commit introduces how to use such a feature.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dc-debug.rst | 34 ++
From: Michał Winiarski
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Michał Winiarski
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 22
drivers/gpu/drm/i91
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Andi Shyti
Cc: Michał Winiarski
---
drivers/gpu/drm/i915/selftests/i915_active.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_gem.c | 2 +-
.../gpu/drm/i9
From: Matthew Auld
This is all kinds of awkward since we now have to contend with using 64K
GTT pages when mapping anything in LMEM(including the page-tables
themselves).
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Ramalingam C
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 189 +
Thanks Christian. Would it make it less intrusive if I just use the flag
for ttm bo mmap and remove the drm_gem_mmap_obj change from this patch?
For our use case, just the ttm_bo_mmap_obj change should suffice and we
don't want to put any more work arounds in the user space (thunk, in our
case)
> -Original Message-
> From: Lisovskiy, Stanislav
> Sent: Thursday, December 9, 2021 5:47 AM
> To: intel-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Lisovskiy, Stanislav
> ; Saarinen, Jani ; C,
> Ramalingam ; ville.syrj...@linux.intel.com; Deak,
> Imre ; Chery, Nanle
Introduce how to collect DTN log from debugfs.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dc-debug.rst | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/gpu/amdgpu/display/dc-debug.rst
b/Documentation/gpu/amdgpu/display/dc-debug.rst
i
From: Michał Winiarski
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Michał Winiarski
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gvt/gvt.c | 2 +-
drivers/gpu/drm/i915/gvt/scheduler.c | 2 +-
Display Core (DC) is one of the components under amdgpu, and it has
multiple features directly related to the KMS API. Unfortunately, we
don't have enough documentation about DC in the upstream, which makes
the life of some external contributors a little bit more challenging.
For these reasons, thi
From: Matthew Auld
On discrete platforms like DG2, we need to support a minimum page size
of 64K when dealing with device local-memory. This is quite tricky for
various reasons, so try to document the new implicit uapi for this.
v2: Fixed suggestions on formatting [Daniel]
Signed-off-by: Matthe
On 09/12/2021 00:24, John Harrison wrote:
On 12/8/2021 09:58, Robert Beckett wrote:
On 07/12/2021 23:15, John Harrison wrote:
On 12/7/2021 09:53, Adrian Larumbe wrote:
Beginning with DG2, all successive devices will require GuC FW to be
present and loaded at probe() time. This change alters
Emulate the SMBus block read using ContinueXfer and SMBus using GPIO
interrupt.
For SMBus block read, the driver reads the first byte with ContinueXfer
set which will help to parse the data count and read the remaining bytes
without stop condition in between.
SMBus alert is implemented using exte
On Thu, 9 Dec 2021 at 13:25, Maarten Lankhorst
wrote:
>
> On 09-12-2021 14:05, Matthew Auld wrote:
> > On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
> > wrote:
> >> We want to remove more members of i915_vma, which requires the locking to
> >> be
> >> held more often.
> >>
> >> Start requiring
This commit describes how DCN works by providing high-level diagrams
with an explanation of each component. In particular, it details the
Global Sync signals.
Change since V2:
- Add a comment about MMHUBBUB.
Signed-off-by: Rodrigo Siqueira
---
.../gpu/amdgpu/display/config_example.svg | 4
09.12.2021 18:05, Akhil R пишет:
> +static int tegra_i2c_setup_smbalert(struct tegra_i2c_dev *i2c_dev)
> +{
> + struct tegra_i2c_smbalert *smbalert = &i2c_dev->smbalert;
> + struct gpio_desc *alert_gpiod;
> + struct i2c_client *ara;
> +
> + alert_gpiod = devm_gpiod_get(i2c_dev->dev,
On 09-12-2021 14:05, Matthew Auld wrote:
> On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
> wrote:
>> We want to remove more members of i915_vma, which requires the locking to be
>> held more often.
>>
>> Start requiring gem object lock for i915_vma_unbind, as it's one of the
>> callers that may
Use i2c_timings struct and corresponding methods to get bus clock frequency
Signed-off-by: Akhil R
---
drivers/i2c/busses/i2c-tegra.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
The patch is in response to the discussion in a previous patch to use
i2c_timings stru
Hello:
This patch was applied to netdev/net.git (master)
by Jakub Kicinski :
On Wed, 8 Dec 2021 23:37:23 +0100 you wrote:
> If allocating the DMA buffer fails, mana_hwc_destroy_wq was called
> without previously storing the pointer to the queue.
>
> In order to avoid leaking the pointer to the
Hi Guilherme,
Am 09.12.21 um 17:00 schrieb Guilherme G. Piccoli:
Hi all, I have a question about the possibility of reusing a framebuffer
after a regular (or panic) kexec - my case is with amdgpu (APU, aka, not
a separate GPU hardware), but I guess the question is kinda generic
hence I've looped
From: Michel Dänzer
Use the struct display_mode_lib pointer instead of passing lots of large
arrays as parameters by value.
Addresses this warning (resulting in failure to build a RHEL debug kernel
with Werror enabled):
../drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c
On 09-12-2021 14:40, Matthew Auld wrote:
> On Thu, 9 Dec 2021 at 13:25, Maarten Lankhorst
> wrote:
>> On 09-12-2021 14:05, Matthew Auld wrote:
>>> On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
>>> wrote:
We want to remove more members of i915_vma, which requires the locking to
be
>>>
That still won't work.
But I think we could do this change for the amdgpu mmap callback only.
Regards,
Christian.
Am 09.12.21 um 16:29 schrieb Bhardwaj, Rajneesh:
Sounds good. I will send a v2 with only ttm_bo_mmap_obj change. Thank
you!
On 12/9/2021 10:27 AM, Christian König wrote:
Hi Rajn
On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
wrote:
>
> Add a flag PIN_VALIDATE, to indicate we don't need to pin and only
> protected by the object lock.
>
> This removes the need to unpin, which is done by just releasing the
> lock.
>
> eb_reserve is slightly reworked for readability, but the
Add support for SMBus Alert and SMBus block read functions to
i2c-tegra driver
Akhil R (2):
dt-bindings: i2c: tegra: Add SMBus feature properties
i2c: tegra: Add SMBus block read and SMBus alert functions
.../devicetree/bindings/i2c/nvidia,tegra20-i2c.txt | 4 ++
drivers/i2c/busses/i2c-tegr
On Thu, Dec 9, 2021 at 3:48 PM Akhil R wrote:
>
> Use i2c_timings struct and corresponding methods to get bus clock frequency
Thanks!
A couple of comments below, after addressing them, FWIW,
Reviewed-by: Andy Shevchenko
> Signed-off-by: Akhil R
> ---
> drivers/i2c/busses/i2c-tegra.c | 19
09.12.2021 18:05, Akhil R пишет:
> Emulate the SMBus block read using ContinueXfer and SMBus using GPIO
> interrupt.
>
> For SMBus block read, the driver reads the first byte with ContinueXfer
> set which will help to parse the data count and read the remaining bytes
> without stop condition in b
Hi Alexander,
Thank you for the patch.
On Thu, Nov 18, 2021 at 10:19:55AM +0100, Alexander Stein wrote:
> VCC needs to be enabled before releasing the enable GPIO.
>
> Signed-off-by: Alexander Stein
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi83.c | 19 +++
> 1 file changed, 19 in
Sounds good. I will send a v2 with only ttm_bo_mmap_obj change. Thank you!
On 12/9/2021 10:27 AM, Christian König wrote:
Hi Rajneesh,
yes, separating this from the drm_gem_mmap_obj() change is certainly a
good idea.
The child cannot access the BOs mapped by the parent anyway with
access res
In preparation of the multitile support, highlight the root GT by
calling it gt0 inside the drm i915 private data.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Lucas De Marchi
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
1 file chan
Details of the new features getting added as part of DG2 enabling and their
implicit impact on the uAPI.
v2: improvised the Flat-CCS documentation [Danvet & CQ]
Signed-off-by: Ramalingam C
cc: Daniel Vetter
cc: Matthew Auld
cc: Simon Ser
cc: Pekka Paalanen
Cc: Jordan Justen
Cc: Kenneth Grau
Display core provides a feature that makes it easy for users to debug
Pipe Split. This commit introduces how to use such a debug option.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dc-debug.rst | 28 +--
1 file changed, 26 insertions(+), 2 deletions(-)
d
From: Matthew Auld
The basic idea is that each 2M block(page-table) has a color, depending
on if the page-table is occupied by LMEM objects(64K) or SMEM
objects(4K), where our goal is to prevent mixing 64K and 4K GTT pages in
the page-table, which is not supported by the HW.
Signed-off-by: Matth
1 - 100 of 212 matches
Mail list logo
