[PATCH v9 6/8] MIPS: DTS: CI20: Add DT nodes for HDMI setup

2021-11-24 Thread H. Nikolaus Schaller
From: Paul Boddie We need to hook up * HDMI connector * HDMI power regulator * JZ4780_CLK_HDMI @ 27 MHz * DDC pinmux * HDMI and LCDC endpoint connections Signed-off-by: Paul Boddie Signed-off-by: H. Nikolaus Schaller --- arch/mips/boot/dts/ingenic/ci20.dts | 72 -

[PATCH v9 8/8] [RFC] MIPS: DTS: Ingenic: adjust register size to available registers

2021-11-24 Thread H. Nikolaus Schaller
After getting the regmap size from the device tree we should reduce the ranges to the really available registers. This allows to read only existing registers from the debug fs and makes the regmap check out-of-bounds access. For the jz4780 we have done this already. Suggested-for: Paul Cercueil

[PATCH 0/7] drm/msm: Improve GMU debugging

2021-11-24 Thread Rob Clark
From: Rob Clark This adds additional snapshotting for interesting GMU buffers to the devcore dumps, adds a couple WARN_ON()s, etc. (Plus a bonus comment) Akhil P Oommen (1): drm/msm/a6xx: Capture gmu log in devcoredump Rob Clark (6): drm/msm/gpu: Name GMU bos drm/msm/gpu: Add some WARN_O

[PATCH 1/7] drm/msm/a6xx: Capture gmu log in devcoredump

2021-11-24 Thread Rob Clark
From: Akhil P Oommen Capture gmu log in coredump to enhance debugging. Signed-off-by: Akhil P Oommen Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 41 + drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.

[PATCH v2 1/3] drm/msm/gpu: Fix idle_work time

2021-11-24 Thread Rob Clark
From: Rob Clark This was supposed to be a relative timer, not absolute. Fixes: 658f4c829688 ("drm/msm/devfreq: Add 1ms delay before clamping freq") Signed-off-by: Rob Clark Reviewed-by: Douglas Anderson --- drivers/gpu/drm/msm/msm_gpu_devfreq.c | 2 +- 1 file changed, 1 insertion(+), 1 deleti

[PATCH v2 2/3] drm/msm/gpu: Fix check for devices without devfreq

2021-11-24 Thread Rob Clark
From: Rob Clark Looks like 658f4c829688 ("drm/msm/devfreq: Add 1ms delay before clamping freq") was badly rebased on top of efb8a170a367 ("drm/msm: Fix devfreq NULL pointer dereference on a3xx") and ended up with the NULL check in the wrong place. Fixes: 658f4c829688 ("drm/msm/devfreq: Add 1ms d

[PATCH 2/7] drm/msm/gpu: Name GMU bos

2021-11-24 Thread Rob Clark
From: Rob Clark Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 22 +- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 71e52b2b2025..e1774ea342b1 100644 -

[PATCH v2 3/3] drm/msm/gpu: Respect PM QoS constraints

2021-11-24 Thread Rob Clark
From: Rob Clark Re-work the boost and idle clamping to use PM QoS requests instead, so they get aggreggated with other requests (such as cooling device). This does have the minor side-effect that devfreq sysfs min_freq/ max_freq files now reflect the boost and idle clamping, as they show (despit

[PATCH 3/7] drm/msm/gpu: Add some WARN_ON()s

2021-11-24 Thread Rob Clark
From: Rob Clark We don't expect either of these conditions to ever be true, so let's get shouty if they are. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/ms

[PATCH 4/7] drm/msm/gpu: Make a6xx_get_gmu_log() more generic

2021-11-24 Thread Rob Clark
From: Rob Clark Turn it into a thing we can use to snapshot other GMU buffers. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 34 + 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/dri

[PATCH 5/7] drm/msm/gpu: Also snapshot GMU HFI buffer

2021-11-24 Thread Rob Clark
From: Rob Clark This also includes a history of start index of the last 8 messages on each queue, since parsing backwards to decode recently sent HFI messages is hard(ish). Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 48 - drivers/gpu/drm/msm/

[PATCH 6/7] drm/msm/gpu: Snapshot GMU debug buffer

2021-11-24 Thread Rob Clark
From: Rob Clark It appears to be a GMU fw build option whether it does anything with debug and log buffers, but if they are all zeros it won't add anything to the devcore size. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 12 1 file changed, 12 insert

[PATCH 7/7] drm/msm/gpu: Add a comment in a6xx_gmu_init()

2021-11-24 Thread Rob Clark
From: Rob Clark If you don't realize is_a650_family() also encompasses a660 family, you'd think that the debug buffer is double allocated. Add a comment to make this more clear. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 3 +++ 1 file changed, 3 insertions(+) diff -

[PULL] drm-intel-fixes

2021-11-24 Thread Rodrigo Vivi
Hi Dave and Daniel, Only one fix for this round. Sending earlier today due to Holiday in US tomorrow. Here goes drm-intel-fixes-2021-11-24: Fix wakeref handling of PXP suspend. Thanks, Rodrigo. The following changes since commit 136057256686de39cc3a07c2e39ef6bc43003ff6: Linux 5.16-rc2 (2021

Re: [PATCH 0/6] drm/tiny/st7735r: Match up with staging/fbtft driver

2021-11-24 Thread David Lechner
On 11/24/21 9:07 AM, Noralf Trønnes wrote: Hi, This patchset adds a missing piece for decommissioning the staging/fbtft/fb_st7735r.c driver namely a way to configure the controller from Device Tree. All fbtft drivers have builtin support for one display panel and all other panels using that con

Re: [PATCH 1/2] dt-bindings: display: bridge: Add TI DLPC3433 bindings

2021-11-24 Thread Laurent Pinchart
Hi Jagan, Thank you for the patch. On Wed, Nov 24, 2021 at 10:55:52PM +0530, Jagan Teki wrote: > TI DLPC3433 is a MIPI DSI based display controller bridge > for processing high resolution DMD based projectors. > > It has a flexible configuration of MIPI DSI signal input > produces RGB565, RGB666

Re: [PATCH v1 7/9] lib: add support for device coherent type in test_hmm

2021-11-24 Thread Felix Kuehling
Am 2021-11-15 um 2:30 p.m. schrieb Alex Sierra: > Device Coherent type uses device memory that is coherently accesible by > the CPU. This could be shown as SP (special purpose) memory range > at the BIOS-e820 memory enumeration. If no SP memory is supported in > system, this could be faked by setti

Re: [PATCH v3 1/9] drm: vkms: Replace the deprecated drm_mode_config_init

2021-11-24 Thread NĂ­colas F . R . A . Prado
Hi Igor, just some nits on the commit message. On Mon, Nov 22, 2021 at 04:43:52PM -0300, Igor Torrente wrote: > The `drm_mode_config_init` was deprecated since c3b790e commit, and it's When referring to other commits, it's best to write it as 'commit <12-digit-SHA> ("description")' [1]. Also, im

Re: [PATCH 1/2] dt-bindings: display: bridge: Add TI DLPC3433 bindings

2021-11-24 Thread Jagan Teki
Hi Fabio, On Thu, Nov 25, 2021 at 12:47 AM Fabio Estevam wrote: > > Hi Jagan, > > On Wed, Nov 24, 2021 at 2:26 PM Jagan Teki wrote: > > > > TI DLPC3433 is a MIPI DSI based display controller bridge > > for processing high resolution DMD based projectors. > > > > It has a flexible configuration o

Re: [PATCH 1/2] dt-bindings: display: bridge: Add TI DLPC3433 bindings

2021-11-24 Thread Jagan Teki
Hi Laurent, On Thu, Nov 25, 2021 at 3:53 AM Laurent Pinchart wrote: > > Hi Jagan, > > Thank you for the patch. > > On Wed, Nov 24, 2021 at 10:55:52PM +0530, Jagan Teki wrote: > > TI DLPC3433 is a MIPI DSI based display controller bridge > > for processing high resolution DMD based projectors. > >

Exynos DSI bridge conversion

2021-11-24 Thread Jagan Teki
Hi Andrej and all, I'm trying to convert existing exynos dsi driver to bridge and make them accessible for i.MX8MM platform. I've a few questions on the existing exynos dsi driver and which is indeed incompatible to proceed to make the bridge conversion. 1. Hotplug event Commit from 295e7954c0d

Re: [PATCH v4 4/4] drm/msm/dp: dp_link_parse_sink_count() return immediately if aux read failed

2021-11-24 Thread Dmitry Baryshkov
On 04/05/2021 07:35, Stephen Boyd wrote: Quoting Kuogee Hsieh (2021-04-21 16:37:38) Add checking aux read/write status at both dp_link_parse_sink_count() and dp_link_parse_sink_status_filed() to avoid long timeout delay if s/filed/field/ dp aux read/write failed at timeout due to cable unplu

Re: [PATCH 1/2] drm/msm: Handle ringbuffer overflow

2021-11-24 Thread Dmitry Baryshkov
On 28/04/2021 22:36, Rob Clark wrote: From: Rob Clark Currently if userspace manages to fill up the ring faster than the GPU can consume we (a) spin for up to 1sec, and then (b) overwrite the ringbuffer contents from previous submits that the GPU is still busy executing. Which predictably goes

Re: [PATCH 07/11] dmaengine: qcom-adm: stop abusing slave_id config

2021-11-24 Thread kernel test robot
Hi Arnd, I love your patch! Perhaps something to improve: [auto build test WARNING on vkoul-dmaengine/next] [also build test WARNING on tiwai-sound/for-next staging/staging-testing linus/master v5.16-rc2 next-20211125] [If your patch is applied to the wrong git tree, kindly drop us a note. And w

Re: [PATCH v8 6/8] MIPS: DTS: CI20: Add DT nodes for HDMI setup

2021-11-24 Thread Geert Uytterhoeven
Hi Nikolaus, On Wed, Nov 24, 2021 at 5:31 PM H. Nikolaus Schaller wrote: > > Am 24.11.2021 um 17:21 schrieb Geert Uytterhoeven : > > On Wed, Nov 24, 2021 at 5:19 PM H. Nikolaus Schaller > > wrote: > >>> Am 23.11.2021 um 21:10 schrieb Paul Cercueil : > >>> Le mar., nov. 23 2021 at 19:13:59 +0100

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