PATCH V6 2021-11-10 20:43:33:
- changed CONFIG_DRM_INGENIC_DW_HDMI to "m" (by h...@goldelico.com)
- made ingenic-dw-hdmi an independent platform driver which can be compiled as
module
and removed error patch fixes for IPU (suggested by p...@crapouillou.net)
- moved assigned-clocks from jz4780.dt
Enable CONFIG options as modules.
Signed-off-by: Ezequiel Garcia
Signed-off-by: H. Nikolaus Schaller
---
arch/mips/configs/ci20_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig
index ab7ebb0668340..cc69b21585
From: Sam Ravnborg
Add DT bindings for the hdmi driver for the Ingenic JZ4780 SoC.
Based on .txt binding from Zubair Lutfullah Kakakhel
We also add add generic ddc-i2c-bus to synopsys,dw-hdmi.yaml
Signed-off-by: Sam Ravnborg
Signed-off-by: H. Nikolaus Schaller
Cc: Rob Herring
Cc: devicet...@
From: Paul Boddie
A specialisation of the generic Synopsys HDMI driver is employed for JZ4780
HDMI support. This requires a new driver, plus device tree and configuration
modifications.
Signed-off-by: Paul Boddie
Signed-off-by: Ezequiel Garcia
Signed-off-by: H. Nikolaus Schaller
---
drivers/
From: Paul Boddie
We need to hook up
* HDMI connector
* HDMI power regulator
* JZ4780_CLK_HDMI @ 27 MHz
* DDC pinmux
* HDMI and LCDC endpoint connections
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
---
arch/mips/boot/dts/ingenic/ci20.dts | 73 +++--
From: Paul Boddie
A specialisation of the generic Synopsys HDMI driver is employed for JZ4780
HDMI support. This requires a new driver, plus device tree and configuration
modifications.
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
---
arch/mips/boot/dts/ingenic/jz4780.dtsi |
After getting the regmap size from the device tree we should
reduce the ranges to the really available registers. This
allows to read only existing registers from the debug fs
and makes the regmap check out-of-bounds access.
For the jz4780 we have done this already.
Suggested-for: Paul Cercueil
On Wed, 10 Nov 2021 14:06:18 +0100, Guillaume Ranquet wrote:
> From: Markus Schneider-Pargmann
>
> This controller is present on several mediatek hardware. Currently
> mt8195 and mt8395 have this controller without a functional difference,
> so only one compatible field is added.
>
> The control
On Wed, 10 Nov 2021 16:01:40 +0100, patrice.chot...@foss.st.com wrote:
> From: Patrice Chotard
>
> Benjamin has left the company, add Fabrice and myself as maintainers.
>
> Signed-off-by: Patrice Chotard
> ---
> Documentation/devicetree/bindings/timer/st,stm32-timer.yaml | 3 ++-
> 1 file chan
On Wed, Nov 10, 2021 at 10:00:35AM +0100, Vincent Guittot wrote:
> Is it the same SCHED_WARN_ON(rq->tmp_alone_branch !=
> &rq->leaf_cfs_rq_list); that generates the deadlock on v5.15 too ?
>
> one remaining tmp_alone_branch warning has been fixed in v5.15 with
> 2630cde26711 ("sched/fair: Add ance
On Wed, 10 Nov 2021 16:01:42 +0100, patrice.chot...@foss.st.com wrote:
> From: Patrice Chotard
>
> Benjamin has left the company, remove his name from maintainers.
>
> Signed-off-by: Patrice Chotard
> ---
> Documentation/devicetree/bindings/media/st,stm32-cec.yaml | 1 -
> 1 file changed, 1 de
On Wed, 10 Nov 2021 16:01:43 +0100, patrice.chot...@foss.st.com wrote:
> From: Patrice Chotard
>
> Benjamin has left the company, remove his name from maintainers.
>
> Signed-off-by: Patrice Chotard
> ---
> .../devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml | 1 -
> 1 file change
On Wed, 10 Nov 2021 16:01:44 +0100, patrice.chot...@foss.st.com wrote:
> From: Patrice Chotard
>
> Not all @st.com email address are concerned, only people who have
> a specific @foss.st.com email will see their entry updated.
> For some people, who left the company, remove their email.
>
> Cc:
On Wed, 10 Nov 2021 16:01:41 +0100, patrice.chot...@foss.st.com wrote:
> From: Patrice Chotard
>
> Benjamin has left the company, remove his name from maintainers.
>
> Signed-off-by: Patrice Chotard
> ---
> Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml | 1 -
> 1 file changed, 1 d
On Wed, Nov 10, 2021 at 11:13:37AM +0106, John Ogness wrote:
> Even after we introduce kthread printers, there will still be situations
> where direct printing is used: booting (before kthreads exist) and
> shutdown/suspend/crash situations, when the kthreads may not be
> active.
Although I'm unaw
This series updates a few maintainer entries for VMware-maintained
subsystems and cleans up references to VMware's private mailing lists
to make it clear that they are effectively email-aliases to reach out
to reviewers.
Changes from v1->v3:
- Add Zack as the named maintainer for vmmouse driver
-
From: Srivatsa S. Bhat (VMware)
VMware mailing lists in the MAINTAINERS file are private lists meant
for VMware-internal review/notification for patches to the respective
subsystems. Anyone can post to these addresses, but there is no public
read access like open mailing lists, which makes them m
Hi Alex,
Dne sobota, 06. november 2021 ob 14:00:44 CET je Alex Bee napisal(a):
> As per CEA-861 quantization range is always limited in case of YUV
> output - indepentently which CEA mode it is or if it is an DMT mode.
>
> This is already correctly setup in HDMI AVI inforame, but we always do
> a
Dne sreda, 10. november 2021 ob 21:20:46 CET je Jernej Škrabec napisal(a):
> Hi Alex,
>
> Dne sobota, 06. november 2021 ob 14:00:44 CET je Alex Bee napisal(a):
> > As per CEA-861 quantization range is always limited in case of YUV
> > output - indepentently which CEA mode it is or if it is an DMT
Correct indentation in radeon_driver_load_kms.
Signed-off-by: Xu Wang
---
drivers/gpu/drm/radeon/radeon_kms.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c
b/drivers/gpu/drm/radeon/radeon_kms.c
index 482fb0ae6cb5..7afe28408085 100644
---
Fixed wrong register shift for single/dual link LVDS output.
Signed-off-by: Jiri Vanek
---
drivers/gpu/drm/bridge/tc358775.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/tc358775.c
b/drivers/gpu/drm/bridge/tc358775.c
index 2272adcc5b4a..1d6ec1baeff2
There are a couple of calls that are passing null pointers as
integer zeros rather than NULL. Fix this by using NULL instead.
Fixes: 07c2a41658c4 ("drm/v3d: alloc and init job in one shot")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/v3d/v3d_gem.c | 4 ++--
1 file changed, 2 insertions(+),
On Wed, Nov 10, 2021 at 01:46:46PM +0200, Ville Syrjälä wrote:
> On Wed, Nov 10, 2021 at 10:59:26AM +0530, Tilak Tangudu wrote:
> > Enable runtime pm autosuspend by default for gen12 and
> > later versions.
> >
> > Signed-off-by: Tilak Tangudu
> > ---
> > drivers/gpu/drm/i915/intel_runtime_pm.c
Hi Dave, Daniel,
Fixes for 5.16.
The following changes since commit 78469728809b8604dc37ae4e6b12ae12decac5be:
drm/amd/display: 3.2.160 (2021-11-03 12:32:34 -0400)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-5.16-2021-11-10
for
Hi all,
On Fri, 5 Nov 2021 12:51:22 +1100 Stephen Rothwell
wrote:
>
> On Thu, 28 Oct 2021 18:27:53 +1100 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the char-misc tree got a conflict in:
> >
> > drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> >
> > between commit:
> >
> >
[ adding dri-devel mailing list as Cc ]
Hello Ilya,
On 11/10/21 21:02, Ilya Trukhanov wrote:
> Suspend-to-RAM with elogind under Wayland stopped working in 5.15.
>
> This occurs with 5.15, 5.15.1 and latest master at
> 89d714ab6043bca7356b5c823f5335f5dce1f930. 5.14 and earlier releases work
> fi
Hi,
> > +#define for_each_gt(i915__, id__, gt__) \
> > + for ((id__) = 0; \
> > +(id__) < I915_MAX_TILES; \
> > +(id__)++) \
> > + for_each_if(((gt__) = (i915__)->gts[(id__)]))
>
> In this patch set, symbol I915_MAX_TILES is introduced.
> In a later patch set of this s
[Redundant sending of this email due to some mail issues]
On 2021-10-28 20:28:12, Matt Roper wrote:
> From: Tvrtko Ursulin
>
> Add some basic plumbing to support more than one dynamically allocated
> struct intel_gt. Up to four gts are supported in i915->gts[], with slot
> zero shadowing the ex
Hi, Nancy:
Nancy.Lin 於 2021年10月29日 週五 下午3:52寫道：
>
> MT8195 have two mmsys. Modify drm for MT8195 multi-mmsys support.
> The two mmsys (vdosys0 and vdosys1) will bring up two drm drivers,
> only one drm driver register as the drm device.
> Each drm driver binds its own component. The last bind drm
Hi,
This RFC is a preview of the progress we made in the KUnit hackathon[0].
This patch, made by Maíra and Arthur, converts the damage helper test
from the original DRM selftest framework to use the KUnit framework.
[0] https://groups.google.com/g/kunit-dev/c/YqFR1q2uZvk/m/IbvItSfHBAAJ
The IGT p
From: Maíra Canal
Considering the current adoption of the KUnit framework, convert the
DRM damage helper selftest to the KUnit API.
Co-developed-by: Arthur Grillo
Signed-off-by: Arthur Grillo
Signed-off-by: Maíra Canal
Signed-off-by: André Almeida
---
drivers/gpu/drm/Kconfig
On Thu, 11 Nov 2021 at 01:43, Hans Verkuil wrote:
>
> gv100_hdmi_ctrl() writes vendor_infoframe.subpack0_high to 0x6f0110, and
> then overwrites it with 0. Just drop the overwrite with 0, that's clearly
> a mistake.
>
> Because of this issue the HDMI VIC is 0 instead of 1 in the HDMI Vendor
> Info
On Thu, 11 Nov 2021 at 01:58, Hans Verkuil wrote:
>
> The nouveau driver outputs full range RGB, but the AVI InfoFrame just says
> 'Default' instead of 'Full'.
>
> Call drm_hdmi_avi_infoframe_quant_range to fill in the quantization field of
> the AVI InfoFrame correctly. Now displays that advertis
On Wed, 10 Nov 2021 at 23:32, Karol Herbst wrote:
>
> Some side notes on this. Atm we do want to use gitlab for bug tracking and
> merge requests. But due to the nature of the current linux kernel
> development, we can only do so for nouveau internal changes.
>
> Everything else still needs to be
On Wed, 10 Nov 2021 12:09:06 -0800 Srivatsa S. Bhat wrote:
> DRM DRIVER FOR VMWARE VIRTUAL GPU
> -M: "VMware Graphics"
> M: Zack Rusin
> +R: VMware Graphics Reviewers
> L: dri-devel@lists.freedesktop.org
> S: Supported
> T: git git://anongit.freedesktop.org/drm/drm-misc
It'd be
Hi Tzung-Bi,
Thanks for your suggestion.
On Wed, 2021-11-10 at 18:30 +0800, Tzung-Bi Shih wrote:
> On Tue, Nov 09, 2021 at 08:50:17PM +0800, Yunfei Dong wrote:
> > Manage each hardware information which includes irq/power/clk.
> > The hardware includes LAT0, LAT1 and CORE.
>
> The commit message
On Thu, Nov 11, 2021 at 11:49 AM yunfei.d...@mediatek.com
wrote:
>
> Hi Tzung-Bi,
>
> Thanks for your suggestion.
> On Wed, 2021-11-10 at 18:30 +0800, Tzung-Bi Shih wrote:
> > On Tue, Nov 09, 2021 at 08:50:17PM +0800, Yunfei Dong wrote:
> > > Manage each hardware information which includes irq/pow
Vdec and venc can use the same function to wake up interrupt event.
Reviewed-by: Tzung-Bi Shih
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 9 +
drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h |
Different platform may has different numbers of register bases. Gets the
numbers of register bases from DT (sizeof(u32) * 4 bytes for each).
Reviewed-by: Tzung-Bi Shih
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 37 ++-
1 file changed, 28 insert
This series adds support for multi hardware decode into mtk-vcodec, by first
adding use
of_platform_populate to manage each hardware information: interrupt, clock,
register
bases and power. Secondly add core work queue to deal with core hardware
message,
at the same time, add msg queue for diffe
Using the needed param for pm init/release function and remove unused
param mtkdev in 'struct mtk_vcodec_pm'.
Reviewed-by: Tzung-Bi Shih
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 6 ++---
.../platform/mtk-vcodec/mtk
Register each hardware as platform device, need to call pm functions
to open/close power and clock from module mtk-vcodec-dec, export these
functions.
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/dr
Separate decoder and encoder document for the dts are big difference.
Reviewed-by: Rob Herring
Signed-off-by: Yunfei Dong
---
.../media/mediatek,vcodec-decoder.yaml| 176 +
.../media/mediatek,vcodec-encoder.yaml| 187 ++
.../bindings/media/mediatek
Register each hardware(subdev) as platform device used to manage each
hardware information which includes irq/power/clk. The hardware includes
LAT0, LAT1 and CORE. And call of_platform_populate in main device.
Using subdev_bitmap to record whether each device is register done. Then check
whether a
Separates different architecture for hardware: pure_sin_core
and lat_sin_core. MT8183 is pure single core. Uses .hw_arch to
distinguish.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
.../platform/mtk-vcodec/mtk_vcodec_dec_stateful.c | 1 +
.../platform/mtk-vcodec
From: Yunfei Dong
Adds MT8192's compatible "mediatek,mt8192-vcodec-dec".
Adds MT8192's device private data mtk_lat_sig_core_pdata.
Signed-off-by: Yunfei Dong
---
.../media/platform/mtk-vcodec/mtk_vcodec_dec.h | 1 +
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 4
.../mtk-vcodec/
Adds irq interface for multi hardware.
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 33 +--
.../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 2 +-
.../platform/mtk-vcodec/mtk_vcodec_drv.h | 25 ++
.../platform/mtk-vcodec/mtk_vcod
For lat and core architecture, lat thread will send message to core
thread when lat decode done. Core hardware will use the message
from lat to decode, then free message to lat thread when decode done.
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/Makefile| 1 +
.../plat
For add new hardware, not only need to lock lat hardware, also
need to lock core hardware in case of different instance start
to decoder at the same time.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | 4 ++--
dri
Generalizes power and clock on/off interfaces to support different hardware.
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 6 +-
.../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 2 +-
.../platform/mtk-vcodec/mtk_vcodec_dec_hw.h | 4 +
.../platform/mtk-vcodec/
Add work queue to process core hardware information.
First, get lat_buf from message queue, then call core
hardware of each codec(H264/VP9/AV1) to decode, finally
puts lat_buf back to the message.
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 16 +++-
.../pla
Use the dma_set_mask_and_coherent helper to set vdec
DMA bit mask to support 34bits iova space(16GB) that
the mt8192 iommu HW support.
Whole the iova range separate to 0~4G/4G~8G/8G~12G/12G~16G,
regarding which iova range VDEC actually locate, it
depends on the dma-ranges property of vdec dtsi nod
There is just one core thread, in order to separate different
hardware, using codec type to separeate it in scp driver.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
.../media/platform/mtk-vcodec/vdec_ipi_msg.h | 12 ---
.../media/platform/mtk-vcodec/vdec_vpu_if.c
Add core dec and dec end ipi msg: AP_IPIMSG_DEC_CORE/AP_IPIMSG_DEC_CORE_END.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
.../media/platform/mtk-vcodec/vdec_ipi_msg.h | 4
.../media/platform/mtk-vcodec/vdec_vpu_if.c| 12
.../media/platform/mtk
Adds decoder dt-bindings for mt8192.
Signed-off-by: Yunfei Dong
---
.../media/mediatek,vcodec-subdev-decoder.yaml | 261 ++
1 file changed, 261 insertions(+)
create mode 100644
Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
diff --git
a/Documentat
There are only two lines in mtk_vcodec_release_enc_pm, using
pm_runtime_disable and put_device instead directly.
Move pm_runtime_enable outside mtk_vcodec_release_enc_pm to symmetry with
pm_runtime_disable, after that, rename mtk_vcodec_init_enc_pm to *_clk since
it only has clock operations now.
There are only two lines in mtk_vcodec_release_dec_pm, using
pm_runtime_disable and put_device instead directly.
Move pm_runtime_enable outside mtk_vcodec_init_dec_pm to symmetry with
pm_runtime_disable, after that, rename mtk_vcodec_init_dec_pm to *_clk since
it only has clock operations now.
Si
On Thu, Oct 28, 2021 at 08:28:09PM -0700, Matt Roper wrote:
> From: Daniele Ceraolo Spurio
>
> In coming patches we'll be doing the actual tile initialization between
> these two uncore init phases.
>
> Signed-off-by: Daniele Ceraolo Spurio
> Signed-off-by: Matt Roper
> Reviewed-by: Lucas De M
On Wed, 2021-11-10 at 17:39 -0800, Jakub Kicinski wrote:
> On Wed, 10 Nov 2021 12:09:06 -0800 Srivatsa S. Bhat wrote:
> > DRM DRIVER FOR VMWARE VIRTUAL GPU
> > -M: "VMware Graphics"
> > M: Zack Rusin
> > +R: VMware Graphics Reviewers
> > L: dri-devel@lists.freedesktop.org
> > S: Supported
>
This patch series deals with async migration and async vram management.
It still leaves an important part out, which is async unbinding which
will reduce latency further, at least when trying to migrate already active
objects.
Patches 1/6 and 2/6 deal with accessing and waiting for the TTM moving
From: Maarten Lankhorst
We want to get rid of i915_vma tracking to simplify the code and
lifetimes. Add a way to set/put the moving fence, in preparation for
removing the tracking.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 37 ++
driv
From: Maarten Lankhorst
For now, we will only allow async migration when TTM is used,
so the paths we care about are related to TTM.
The mmap path is handled by having the fence in ttm_bo->moving,
when pinning, the binding only becomes available after the moving
fence is signaled, and pinning a
Move the i915_gem_obj_copy_ttm() function to i915_gem_ttm_move.h.
This will help keep a number of functions static when introducing
async moves.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 47 ---
drivers/gpu/drm/i915/gem/i915_gem_ttm.h |
Don't wait sync while migrating, but rather make the GPU blit await the
dependencies and add a moving fence to the object.
This also enables asynchronous VRAM management in that on eviction,
rather than waiting for the moving fence to expire before freeing VRAM,
it is freed immediately and the fen
There is an interesting refcounting loop:
struct intel_memory_region has a struct ttm_resource_manager,
ttm_resource_manager->move may hold a reference to i915_request,
i915_request may hold a reference to intel_context,
intel_context may hold a reference to drm_i915_gem_object,
drm_i915_gem_object
Update the copy function i915_gem_obj_copy_ttm() to be asynchronous for
future users and update the only current user to sync the objects
as needed after this function.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 40 ++--
drivers/gpu/drm/i91
Hello Ilya,
On 11/11/21 01:45, Ilya Trukhanov wrote:
[snip]
>> Can you please share the kernel boot log for any of these cases too ?
>
Thanks a lot for the testing and providing the info!
>> This is just a guess though. Would be good if you could test following cases:
>>
>> 1) CONFIG_FB_EFI n
On Thu, Nov 11, 2021 at 12:07:19AM +0100, Javier Martinez Canillas wrote:
> [ adding dri-devel mailing list as Cc ]
>
> Hello Ilya,
>
> On 11/10/21 21:02, Ilya Trukhanov wrote:
> > Suspend-to-RAM with elogind under Wayland stopped working in 5.15.
> >
> > This occurs with 5.15, 5.15.1 and latest
amdgpu_connector_vga_get_modes missed function amdgpu_get_native_mode
which assign amdgpu_encoder->native_mode with *preferred_mode result in
amdgpu_encoder->native_mode.clock always be 0. That will cause
amdgpu_connector_set_property returned early on:
if ((rmx_type != DRM_MODE_SCALE_NONE) &&
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