On 16.10.21 04:23, Yong Wu wrote:
On Mon, 2021-10-11 at 14:36 +0200, Dafna Hirschfeld wrote:
On 29.09.21 03:37, Yong Wu wrote:
MediaTek IOMMU-SMI diagram is like below. all the consumer connect
with
smi-larb, then connect with smi-common.
M4U
|
smi-common
Hi Michal,
Thank you for the patch.
On Mon, Oct 18, 2021 at 08:40:12AM +0200, Michal Simek wrote:
> Commit cea0f76a483d ("dt-bindings: phy: Add DT bindings for Xilinx ZynqMP
> PSGTR PHY") clearly defines #phy-cells as 4. In past 5 cells were used by
> it never went to upstream. That's why fix exa
Hi,
On 16/10/2021 00:34, Martin Blumenstingl wrote:
> Hi Neil, Hi Sam,
>
> On Fri, Oct 15, 2021 at 4:11 PM Neil Armstrong
> wrote:
> [...]
>> +static const struct drm_bridge_funcs meson_encoder_cvbs_bridge_funcs = {
>> + .attach = meson_encoder_cvbs_attach,
>> + .enable = meson_enco
Hi,
On 16/10/2021 00:07, Martin Blumenstingl wrote:
> Hi Neil,
>
> On Fri, Oct 15, 2021 at 4:11 PM Neil Armstrong
> wrote:
>>
>> This implements the necessary change to no more use the embedded
>> connector in dw-hdmi and use the dedicated bridge connector driver
>> by passing DRM_BRIDGE_ATTACH
On Tue, 5 Oct 2021 17:16:31 -0300
Igor Matheus Andrade Torrente wrote:
> XRGB to ARGB behavior
> =
> During the development, I decided to always fill the alpha channel of
> the output pixel whenever the conversion from a format without an alpha
> channel to ARGB16161616 is necess
On 16/10/2021 00:47, Umesh Nerlige Ramappa wrote:
With GuC handling scheduling, i915 is not aware of the time that a
context is scheduled in and out of the engine. Since i915 pmu relies on
this info to provide engine busyness to the user, GuC shares this info
with i915 for all engines using sh
This patch fixes the following Coccinelle warning:
drivers/gpu/drm/nouveau/nouveau_gem.c:630: WARNING opportunity for vmemdup_user
Use vmemdup_user rather than duplicating its implementation
This is a little bit restricted to reduce false positives
Signed-off-by: Qing Wang
---
drivers/gpu/drm/
This patch fixes the following Coccinelle warning:
drivers/gpu/drm/tegra/submit.c:173:8-15: WARNING \
opportunity for vmemdup_user
Use vmemdup_user rather than duplicating its implementation
This is a little bit restricted to reduce false positives
Signed-off-by: Qing Wang
---
Hi Simon,
On Fri, Oct 15, 2021 at 04:33:45PM +, Simon Ser wrote:
> If an hotplug event only updates a single connector, use
> drm_kms_helper_connector_hotplug_event instead of
> drm_kms_helper_hotplug_event.
>
> Signed-off-by: Simon Ser
I guess we'd also need to update drm_connector_helper_
On 10/17/2021 10:03 PM, Lukas Wunner wrote:
On Wed, Oct 13, 2021 at 08:36:01PM +0200, Nirmoy Das wrote:
Debugfs APIs returns encoded error on failure so use
debugfs_lookup() instead of checking for NULL.
The commit message no longer matches up with the patch itself
(debugfs_lookup() isn't cal
On Tue, 5 Oct 2021 17:16:37 -0300
Igor Matheus Andrade Torrente wrote:
> Currently the blend function only accepts XRGB_ and ARGB_
> as a color input.
>
> This patch refactors all the functions related to the plane composition
> to overcome this limitation.
>
> Now the blend function r
The assignment will be overwritten by the later, but the variable
is not used.
The clang_analyzer complains as follows:
drivers/gpu/drm/i915/display/intel_dpll.c:1568:2 warning:
Value stored to 'dpio_val' is never read
Reported-by: Zeal Robot
Signed-off-by: luo penghao
---
drivers/gpu/drm/i9
Variable is not used in functions, and its assignment is redundant too.
So it should be deleted.
The clang_analyzer complains as follows:
drivers/gpu/drm/i915/display/vlv_dsi.c:143:2 warning:
Value stored to 'data' is never read.
Reported-by: Zeal Robot
Signed-off-by: luo penghao
---
drivers
Hi Jani,
On Fri, Oct 15, 2021 at 06:21:35PM +0300, Jani Nikula wrote:
> On Thu, 14 Oct 2021, Jani Nikula wrote:
> > The link training delays are different and/or available in different
> > DPCD offsets depending on:
> >
> > - Clock recovery vs. channel equalization
> > - DPRX vs. LTTPR
> > - 128b
On Friday, October 15th, 2021 at 21:44, Ville Syrjälä
wrote:
> > /* Send Hotplug uevent so userspace can reprobe */
> > drm_kms_helper_hotplug_event(connector->dev);
> > + drm_sysfs_connector_status_event(connector,
> > +
> > connector->dev->mode_con
On Friday, October 15th, 2021 at 21:41, Ville Syrjälä
wrote:
> So many things that "changed". Would it not be simpler to just grab the
> first changed connector always, and count how many there were in total?
Indeed, sounds much better. Will do that in the next version.
Variable is not used in functions, and its assignment is redundant too.
So it should be deleted.
The clang_analyzer complains as follows:
drivers/gpu/drm/i915/display/intel_dpll.c:1653:2 warning:
Value stored to 'bestm1' is never read.
drivers/gpu/drm/i915/display/intel_dpll.c:1651:2 warning:
Va
On Monday, October 18th, 2021 at 10:15, Maxime Ripard wrote:
> I guess we'd also need to update drm_connector_helper_hpd_irq_event ?
Good catch! IIRC this function didn't exist when I first wrote the
patchset.
Variable is not used in the loop, and its assignment is redundant too.
So it should be deleted.
The clang_analyzer complains as follows:
drivers/gpu/drm/i915/display/intel_fb.c:1018:3 warning:
Value stored to 'cpp' is never read.
Reported-by: Zeal Robot
Signed-off-by: luo penghao
---
drivers
On Friday, October 15th, 2021 at 22:03, Sam Ravnborg wrote:
> This code is a little confusing to read.
>
> In case we have only one connector with a change we hit the else part.
> What we really want to find out is if we have one or more connectors
> with a change.
> We could do something like:
>
The assignment in these two places is meaningless, so it should be deleted.
The clang_analyzer complains as follows:
drivers/gpu/drm/drm_crtc_helper.c:635:2 warning:
Value stored to 'count' is never read.
drivers/gpu/drm/drm_crtc_helper.c:681:2 warning:
Value stored to 'count' is never read.
Re
When a uevent only updates a single connector, add a CONNECTOR property
to the uevent. This allows user-space to ignore other connectors when
handling the uevent. This is purely an optimization, drivers can still
send a uevent without the CONNECTOR property.
The CONNECTOR property is already set w
When updating a single connector, use
drm_kms_helper_connector_hotplug_event instead of
drm_kms_helper_hotplug_event.
Signed-off-by: Simon Ser
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_
This function is the same as drm_kms_helper_hotplug_event, but takes
a connector instead of a device.
Signed-off-by: Simon Ser
Reviewed-by: Sam Ravnborg
Acked-by: Harry Wentland
---
drivers/gpu/drm/drm_probe_helper.c | 23 +++
include/drm/drm_probe_helper.h | 1 +
2 fi
If an hotplug event only updates a single connector, use
drm_kms_helper_connector_hotplug_event instead of
drm_kms_helper_hotplug_event.
Changes in v4:
- Simplify loop logic (Ville, Sam)
- Update drm_connector_helper_hpd_irq_event (Maxime)
Signed-off-by: Simon Ser
Cc: Ville Syrjala
Cc: Sam Ravn
In drm_connector_register, use drm_sysfs_connector_hotplug_event
instead of drm_sysfs_hotplug_event, because the hotplug event
only updates a single connector.
Signed-off-by: Simon Ser
Reviewed-by: Sam Ravnborg
Acked-by: Harry Wentland
---
drivers/gpu/drm/drm_connector.c | 2 +-
1 file changed
When link-status changes, send a hotplug uevent which contains the
connector ID. That way, user-space can more easily figure out that
only this connector has been updated.
Changes in v4: avoid sending two uevents (Ville)
Signed-off-by: Simon Ser
Cc: Ville Syrjala
---
drivers/gpu/drm/i915/displ
This function sends a hotplug uevent with a CONNECTOR property.
Signed-off-by: Simon Ser
Reviewed-by: Sam Ravnborg
Acked-by: Harry Wentland
---
drivers/gpu/drm/drm_sysfs.c | 25 +
include/drm/drm_sysfs.h | 1 +
2 files changed, 26 insertions(+)
diff --git a/driver
From: Stephen Rothwell
Commit cd06ab2fd48f ("drm/locking: add backtrace for locking contended
locks without backoff") added functions named __stack_depot_* in drm
which conflict with stack depot. Rename to __drm_stack_depot_*.
v2 by Jani:
- Also rename __stack_depot_print
References: https://lo
Thanks for having a look at this patch, Pekka!
On Friday, October 8th, 2021 at 09:29, Pekka Paalanen
wrote:
> > +#define DRM_IOCTL_MODE_CLOSEFB DRM_IOWR(0xCF, unsigned int)
>
> Should it have a structure with 'flags' for future-proofing?
>
> ISTR some rule of thumb that everything n
On Mon, Oct 18, 2021 at 08:43:31AM +, luo penghao wrote:
> Variable is not used in functions, and its assignment is redundant too.
> So it should be deleted.
>
> The clang_analyzer complains as follows:
>
> drivers/gpu/drm/i915/display/intel_dpll.c:1653:2 warning:
> Value stored to 'bestm1' i
From: penghao luo
The assignment of variables will be overwritten later, so the
assignment here is meaningless.
The clang_analyzer complains as follows:
drivers/gpu/drm/i915/gem/i915_gem_userptr.c:291: warning:
Although the value stored to 'ret' is used in the enclosing expression,
the value i
On Thu, Oct 14, 2021 at 02:21:43PM -0700, Nick Desaulniers wrote:
> On Thu, Oct 14, 2021 at 2:19 PM Nathan Chancellor wrote:
> >
> > A new warning in clang points out a place in this file where a bitwise
> > OR is being used with boolean types:
> >
> > drivers/gpu/drm/i915/intel_pm.c:3066:12: warn
On Wed, Oct 13, 2021 at 06:55:31AM -0400, Michael S. Tsirkin wrote:
> This will enable cleanups down the road.
> The idea is to disable cbs, then add "flush_queued_cbs" callback
> as a parameter, this way drivers can flush any work
> queued after callbacks have been disabled.
>
> Signed-off-by: Mi
For cached objects we can allocate our pages directly in shmem. This
should make it possible(in a later patch) to utilise the existing
i915-gem shrinker code for such objects. For now this is still disabled.
v2(Thomas):
- Add optional try_to_writeback hook for objects. Importantly we need
to
We already do this when mapping the pages.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 1 -
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen6_ppgtt
From: Thomas Hellström
Break out some shmem backend utils for future reuse by the TTM backend:
shmem_alloc_st(), shmem_free_st() and __shmem_writeback() which we can
use to provide a shmem-backed TTM page pool for cached-only TTM
buffer objects.
Main functional change here is that we now compute
We currently just evict lmem objects to system memory when under memory
pressure. For this case we might lack the usual object mm.pages, which
effectively hides the pages from the i915-gem shrinker, until we
actually "attach" the TT to the object, or in the case of lmem-only
objects it just gets mi
This should let us do an accelerated copy directly to the shmem pages
when temporarily moving lmem-only objects, where the i915-gem shrinker
can later kick in to swap out the pages, if needed.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i9
On Mon, 18 Oct 2021, luo penghao wrote:
> Variable is not used in the loop, and its assignment is redundant too.
> So it should be deleted.
>
> The clang_analyzer complains as follows:
>
> drivers/gpu/drm/i915/display/intel_fb.c:1018:3 warning:
>
> Value stored to 'cpp' is never read.
>
> Reported
Attempt to document shrink_pin and the other relevant interfaces that
interact with it, before we start messing with it.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
---
.../gpu/drm/i915/gem/i915_gem_object_types.h | 24 +-
drivers/gpu/drm/i915/ge
The comment here is no longer accurate, since the current shrinker code
requires a full ref before touching any objects. Also unset_pages()
should already do the required make_unshrinkable() for us, if needed,
which is also nicely balanced with set_pages().
Signed-off-by: Matthew Auld
Cc: Thomas
Turn on the shmem tt backend, and enable shrinking.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/driver
On Wed, Oct 13, 2021 at 06:55:31AM -0400, Michael S. Tsirkin wrote:
This will enable cleanups down the road.
The idea is to disable cbs, then add "flush_queued_cbs" callback
as a parameter, this way drivers can flush any work
queued after callbacks have been disabled.
Signed-off-by: Michael S. T
On Sat, 16 Oct 2021, Len Baker wrote:
> Hi Daniel and Jani,
>
> On Wed, Oct 13, 2021 at 01:51:30PM +0200, Daniel Vetter wrote:
>> On Wed, Oct 13, 2021 at 02:24:05PM +0300, Jani Nikula wrote:
>> > On Mon, 11 Oct 2021, Len Baker wrote:
>> > > Hi,
>> > >
>> > > On Sun, Oct 03, 2021 at 12:42:58PM +02
Hi
Am 05.10.21 um 22:16 schrieb Igor Matheus Andrade Torrente:
The `drm_mode_config_init` was deprecated since c3b790e commit, and it's
being replaced by the `drmm_mode_config_init`.
Signed-off-by: Igor Matheus Andrade Torrente
---
drivers/gpu/drm/vkms/vkms_drv.c | 5 -
1 file changed,
Hi
Am 05.10.21 um 22:16 schrieb Igor Matheus Andrade Torrente:
The `map` vector at `vkms_composer` uses a hardcoded value to define its
size.
If someday the maximum number of planes increases, this hardcoded value
can be a problem.
This value is being replaced with the DRM_FORMAT_MAX_PLANES ma
Hi
Am 05.10.21 um 22:16 schrieb Igor Matheus Andrade Torrente:
This commit is the groundwork to introduce new formats to the planes and
writeback buffer. As part of it, a new buffer metadata field is added to
`vkms_writeback_job`, this metadata is represented by the `vkms_composer`
struct.
This
Hi
Am 05.10.21 um 22:16 schrieb Igor Matheus Andrade Torrente:
Currently, the vkms atomic check only goes through the first position of
the `vkms_wb_formats` vector.
This change prepares the atomic_check to check the entire vector.
Signed-off-by: Igor Matheus Andrade Torrente
---
drivers/gp
On Fri, Oct 01, 2021 at 04:34:23PM +0200, Boris Brezillon wrote:
> +/*
> + * Mapping is only accessed by the device behind the iommu. That means other
> + * devices or CPUs are not expected to access this physical memory region,
> + * and the MMU driver can safely restrict the shareability domain t
Op 14-10-2021 om 15:56 schreef Tvrtko Ursulin:
>
> On 14/10/2021 14:45, Maarten Lankhorst wrote:
>> Op 14-10-2021 om 15:25 schreef Tvrtko Ursulin:
>>>
>>> On 14/10/2021 13:05, Maarten Lankhorst wrote:
Op 14-10-2021 om 10:37 schreef Tvrtko Ursulin:
>
> On 13/10/2021 11:41, Maarten Lankh
Am 15.10.21 um 13:57 schrieb Maarten Lankhorst:
Commit ada5c48b11a3 ("dma-buf: use new iterator in dma_resv_wait_timeout")
accidentally started mishandling timeout = 0, by forcing a blocking wait
with timeout = 1 passed to fences. This is not intended, as timeout = 0
may be used for peeking, simi
This patch fixes the following Coccinelle warning:
drivers/gpu/drm/tegra/submit.c:173: WARNING opportunity for vmemdup_user
Use vmemdup_user rather than duplicating its implementation
This is a little bit restricted to reduce false positives
Signed-off-by: Qing Wang
---
drivers/gpu/drm
This patch fixes the following Coccinelle warning:
drivers/gpu/drm/nouveau/nouveau_gem.c:630: WARNING opportunity for vmemdup_user
Use vmemdup_user rather than duplicating its implementation
This is a little bit restricted to reduce false positives
Signed-off-by: Qing Wang
---
drivers/gpu/drm/
Am 13.10.21 um 16:42 schrieb Arnd Bergmann:
From: Arnd Bergmann
When CONFIG_COMMON_CLOCK is disabled, the 8996 specific
phy code is left out, which results in a link failure:
ld: drivers/gpu/drm/msm/hdmi/hdmi_phy.o:(.rodata+0x3f0): undefined reference to
`msm_hdmi_phy_8996_cfg'
This was only
Am 18.10.21 um 13:38 schrieb Geert Uytterhoeven:
Hi Christian,
On Mon, Oct 18, 2021 at 1:37 PM Christian König
wrote:
Am 13.10.21 um 16:42 schrieb Arnd Bergmann:
From: Arnd Bergmann
When CONFIG_COMMON_CLOCK is disabled, the 8996 specific
phy code is left out, which results in a link failure
Hi Christian,
On Mon, Oct 18, 2021 at 1:37 PM Christian König
wrote:
> Am 13.10.21 um 16:42 schrieb Arnd Bergmann:
> > From: Arnd Bergmann
> >
> > When CONFIG_COMMON_CLOCK is disabled, the 8996 specific
> > phy code is left out, which results in a link failure:
> >
> > ld: drivers/gpu/drm/msm/hd
On Mon, Oct 18, 2021 at 1:40 PM Christian König
wrote:
> >> I have absolutely no idea how a platform can have IOMMU but no MMU
> >> support but it indeed seems to be the case here.
> > Huh?
> >
> > Parisc has config MMU def_bool y?
>
> Then why vmap isn't available?
>
> See the mail thread: [linux
Am 18.10.21 um 13:46 schrieb Arnd Bergmann:
On Mon, Oct 18, 2021 at 1:40 PM Christian König
wrote:
I have absolutely no idea how a platform can have IOMMU but no MMU
support but it indeed seems to be the case here.
Huh?
Parisc has config MMU def_bool y?
Then why vmap isn't available?
See th
Hi Christian,
On Mon, Oct 18, 2021 at 1:41 PM Christian König
wrote:
> Am 18.10.21 um 13:38 schrieb Geert Uytterhoeven:
> > On Mon, Oct 18, 2021 at 1:37 PM Christian König
> > wrote:
> >> Am 13.10.21 um 16:42 schrieb Arnd Bergmann:
> >>> From: Arnd Bergmann
> >>>
> >>> When CONFIG_COMMON_CLOCK
Hello Joerg,
On Mon, 18 Oct 2021 12:25:38 +0200
Joerg Roedel wrote:
> On Fri, Oct 01, 2021 at 04:34:23PM +0200, Boris Brezillon wrote:
> > +/*
> > + * Mapping is only accessed by the device behind the iommu. That means
> > other
> > + * devices or CPUs are not expected to access this physical m
Hi luo,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on next-20211015]
url:
https://github.com/0day-ci/linux/commits/luo-penghao/drm-i915-display-Remove-unused-variable-in-the-for-loop/20211018-164557
base:7c832d2f9b959e3181370c8b0dacaf9efe13fc05
config
On Fri, Oct 15, 2021 at 10:40 AM Thomas Zimmermann wrote:
>
> psb_gtt_alloc_range() allocates struct gtt_range, create the GTT resource
> and performs some half-baked initialization. Inline the function into its
> only caller psb_gem_create(). For creating the GTT resource, introduce a
> new helpe
On Fri, Oct 15, 2021 at 10:40 AM Thomas Zimmermann wrote:
>
> struct gtt_range represents a GEM object and should not be used for GTT
> setup. Change psb_gtt_insert() and psb_gtt_remove() to receive all
> necessary parameters from their caller. This also eliminates possible
> failure from psb_gtt_
Hi Rob,
On Wed, Oct 13, 2021 at 05:16:58PM -0700, Rob Clark wrote:
> On Wed, Oct 13, 2021 at 7:16 AM Maxime Ripard wrote:
> >
> > Hi Caleb,
> >
> > On Thu, Sep 30, 2021 at 09:20:52PM +0100, Caleb Connolly wrote:
> > > Hi,
> > >
> > > On 30/09/2021 20:49, Amit Pundir wrote:
> > > > On Thu, 30 Sept
Am So., 10. Okt. 2021 um 16:08 Uhr schrieb Christophe JAILLET
:
>
> 'destroy_workqueue()' already drains the queue before destroying it, so
> there is no need to flush it explicitly.
>
> Remove the redundant 'flush_workqueue()' calls.
>
> This was generated with coccinelle:
>
> @@
> expression E;
>
Am 12.10.21 um 14:09 schrieb Gal Pressman:
The pin callback does not necessarily have to move the memory to system
memory, remove the sentence from the comment.
Signed-off-by: Gal Pressman
Reviewed-by: Christian König
---
include/linux/dma-buf.h | 4 ++--
1 file changed, 2 insertions(+)
From: Thomas Zimmermann
commit b693e42921e0220c0d564c55c6cdc680b0f85390 upstream.
Clamp the fbdev surface size of the available maximumi height to avoid
failing to init console emulation. An example error is shown below.
bad framebuffer height 2304, should be >= 768 && <= 768
[drm] Initiali
On Sun, 17 Oct 2021 16:43:50 +0200, David Heidelberg wrote:
> Conversion of text binding for Adreno GPU to the YAML format.
>
> Signed-off-by: David Heidelberg
> ---
> v2:
> - added compatbile description from Rob Clark
> - dropped reg description
> - reg numbers increased to 3 (since we al
I got a null-ptr-deref report:
BUG: kernel NULL pointer dereference, address: 0030
...
RIP: 0010:kobject_put+0x2a/0x180
...
Call Trace:
put_device+0x25/0x30
drm_minor_alloc_release.cold+0x45/0x7f [drm]
drm_managed_release+0x158/0x2d0 [drm]
drm_dev_init+0x3a7/0x4a0 [drm]
__devm_drm
On Wed, Oct 13, 2021 at 04:40:58PM +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> Without CONFIG_IOMMU_API, the nvdec_writel() function is
> unused, causing a warning:
>
> drivers/gpu/drm/tegra/nvdec.c:48:13: error: 'nvdec_writel' defined but not
> used [-Werror=unused-function]
>48
On Wed, Oct 13, 2021 at 04:41:36PM +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> The resume helper is called conditionally and causes a harmless
> warning when stubbed out:
>
> drivers/gpu/drm/tegra/nvdec.c:240:12: error: 'nvdec_runtime_resume' defined
> but not used [-Werror=unused-fun
Hi Neil,
Thank you for the patch.
On Fri, Oct 15, 2021 at 04:11:04PM +0200, Neil Armstrong wrote:
> This moves all the non-DW-HDMI code where it should be:
> an encoder in the drm/meson core driver.
>
> The bridge functions are copied as-is, except:
> - the encoder init uses the simple kms helpe
Hi Rob,
On Mon, Oct 11, 2021 at 07:43:16PM -0500, Rob Herring wrote:
> On Mon, Oct 11, 2021 at 11:46:19AM +0200, Markus Schneider-Pargmann wrote:
> > This controller is present on several mediatek hardware. Currently
> > mt8195 and mt8395 have this controller without a functional difference,
> > s
https://bugzilla.kernel.org/show_bug.cgi?id=205649
--- Comment #5 from Michael Rauch (mich...@rauch.be) ---
Created attachment 299241
--> https://bugzilla.kernel.org/attachment.cgi?id=299241&action=edit
error messages with kernel 5.13
I still get errors and kernel freeze.
--
You may reply to
https://bugzilla.kernel.org/show_bug.cgi?id=205649
Michael Rauch (mich...@rauch.be) changed:
What|Removed |Added
Kernel Version|5.3, 5.4, 5.5-rc3, 5.9-rc7 |5.3, 5.4, 5.5-rc3, 5.9-
https://bugzilla.kernel.org/show_bug.cgi?id=205649
Michael Rauch (mich...@rauch.be) changed:
What|Removed |Added
Summary|Daisy Chain (MST) Session |Daisy Chain (MST) Sessi
This patchset is the follow-up the v4 patchset from Benoit Parrot at [1].
This patch series adds virtual-plane support to omapdrm driver to allow the use
of display wider than 2048 pixels.
In order to do so we introduce the concept of hw_overlay which can then be
dynamically allocated to a plane.
From: Benoit Parrot
In order to be able to dynamically assign overlays to planes we need to
be able to asses the overlay capabilities.
Add a helper function to be able to retrieve the supported capabilities
of an overlay.
And export the function to check if a fourcc is supported on a given
over
From: Benoit Parrot
Split out the hardware overlay specifics from omap_plane.
To start, the hw overlays are statically assigned to planes.
The goal is to eventually assign hw overlays dynamically to planes
during plane->atomic_check() based on requested caps (scaling, YUV,
etc). And then perform
From: Benoit Parrot
Now that we added specific item to our subclassed drm_plane_state
we can add omap_plane_atomic_print_state() helper to dump out our own
driver specific plane state.
Signed-off-by: Benoit Parrot
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/omapdrm/omap_plane.c | 16 +++
From: Benoit Parrot
(re)assign the hw overlays to planes based on required caps, and to
handle situations where we could not modify an in-use plane.
This means all planes advertise the superset of formats and properties.
Userspace must (as always) use atomic TEST_ONLY step for atomic updates,
as
Call drm_atomic_helper_check_plane_state() from the plane
atomic_check() callback in order to add plane state sanity
checking.
It will permit filtering out totally bad scaling factors, even
if the real check are done later in the atomic commit.
Signed-off-by: Benoit Parrot
Signed-off-by: Neil Ar
From: Benoit Parrot
Global shared resources (like hw overlays) for omapdrm are implemented
as a part of atomic state using the drm_private_obj infrastructure
available in the atomic core.
omap_global_state is introduced as a drm atomic private object. The two
funcs omap_get_global_state() and om
From: Benoit Parrot
We currently assume that an overlay has the same maximum width and
maximum height as the overlay manager. This assumption is incorrect. On
some variants the overlay manager maximum width is twice the maximum
width that the overlay can handle. We need to add the appropriate dat
From: Benoit Parrot
If the drm_plane has a source width that's greater than the max width
supported by a single hw overlay, then we assign a 'r_overlay' to it in
omap_plane_atomic_check().
Both overlays should have the capabilities required to handle the source
framebuffer. The only parameters t
From: Benoit Parrot
In preparation to add omap plane state specific extensions we need to
subclass drm_plane_state and add the relevant helpers.
The addition of specific extension will be done separately.
Signed-off-by: Benoit Parrot
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/omapdrm/
Convert the Toshiba TC358767 txt documentation to YAML.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Rob Herring
---
.../display/bridge/toshiba,tc358767.txt | 54
.../display/bridge/toshiba,tc358767.yaml | 118 ++
2 files changed, 118 insertions(+
Convert the Toshiba TC358764 txt documentation to YAML.
Signed-off-by: AngeloGioacchino Del Regno
---
Note: dtbs_check on exynos5250-arndale.dts will give some warnings after
applying this patch: since the preferred way is to have 'ports',
this warning was ignored.
I have no Ex
On Sat, Oct 16, 2021 at 05:34:59AM +0300, Laurent Pinchart wrote:
> On Thu, Oct 14, 2021 at 09:41:10AM +0200, Maxime Ripard wrote:
> > On Wed, Oct 13, 2021 at 12:37:47PM +0300, Laurent Pinchart wrote:
> > > On Wed, Oct 13, 2021 at 09:47:22AM +0200, Maxime Ripard wrote:
> > > > On Tue, Oct 12, 2021
From: Rob Clark
Until we better understand the stability issues caused by frequent
frequency changes, lets limit them to a618.
Signed-off-by: Rob Clark
---
Caleb/John, I think this should help as a workaround for the power
instability issues on a630.. could you give it a try?
drivers/gpu/drm/
On Mon, Oct 18, 2021 at 5:34 AM Maxime Ripard wrote:
>
> Hi Rob,
>
> On Wed, Oct 13, 2021 at 05:16:58PM -0700, Rob Clark wrote:
> > On Wed, Oct 13, 2021 at 7:16 AM Maxime Ripard wrote:
> > >
> > > Hi Caleb,
> > >
> > > On Thu, Sep 30, 2021 at 09:20:52PM +0100, Caleb Connolly wrote:
> > > > Hi,
>
On Mon, Oct 18, 2021 at 8:31 AM Rob Clark wrote:
>
> From: Rob Clark
>
> Until we better understand the stability issues caused by frequent
> frequency changes, lets limit them to a618.
>
> Signed-off-by: Rob Clark
> ---
> Caleb/John, I think this should help as a workaround for the power
> inst
Am 13.10.21 um 15:38 schrieb Arunpravin:
Move vram related defines and inline functions into
a separate header file
Signed-off-by: Arunpravin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 72
1 file changed, 72 insertions(+)
create mode 100644 drivers/gpu/drm/amd/
Hi all,
On 18/10/2021 17:42, John Stultz wrote:
On Mon, Oct 18, 2021 at 8:31 AM Rob Clark wrote:
From: Rob Clark
Until we better understand the stability issues caused by frequent
frequency changes, lets limit them to a618.
Signed-off-by: Rob Clark
---
Caleb/John, I think this should help
Hello,
On 10/18/21 7:14 AM, Thomas Zimmermann wrote:
Hi
Am 05.10.21 um 22:16 schrieb Igor Matheus Andrade Torrente:
Currently, the vkms atomic check only goes through the first position of
the `vkms_wb_formats` vector.
This change prepares the atomic_check to check the entire vector.
Signed-
Hi Maxime,
On Mon, Oct 18, 2021 at 05:20:13PM +0200, Maxime Ripard wrote:
> On Sat, Oct 16, 2021 at 05:34:59AM +0300, Laurent Pinchart wrote:
> > On Thu, Oct 14, 2021 at 09:41:10AM +0200, Maxime Ripard wrote:
> > > On Wed, Oct 13, 2021 at 12:37:47PM +0300, Laurent Pinchart wrote:
> > > > On Wed, O
These are userspace objects, so mark them as such. In a later patch it's
useful to determine how paranoid we need to be when managing cache
flushes. In theory no functional changes.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 3 ++-
1 file c
These are userspace objects, so mark them as such. In a later patch it's
useful to determine how paranoid we need to be when managing cache
flushes. In theory no functional changes.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 3 ++-
1 file
On non-LLC platforms, force the flush-on-acquire if this is ever
swapped-in. Our async flush path is not trust worthy enough yet(and
happens in the wrong order), and with some tricks it's conceivable for
userspace to change the cache-level to I915_CACHE_NONE after the pages
are swapped-in, and sinc
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