[bug report] vmwgfx: Implement fence objects

2021-09-10 Thread Dan Carpenter
Hello Thomas Hellstrom, The patch ae2a104058e2: "vmwgfx: Implement fence objects" from Sep 1, 2011, leads to the following Smatch static checker warning: drivers/dma-buf/dma-fence.c:790 dma_fence_default_wait() warn: user controlled unbound timeout drivers/gpu/drm/vmwgfx/vmwgfx_f

Re: i915 ttm_tt shmem backend

2021-09-10 Thread Thomas Hellström
Hi, On 9/9/21 4:56 PM, Matthew Auld wrote: Hi Christian, We are looking into using shmem as a ttm_tt backend in i915 for cached system memory objects. We would also like to make such objects visible to the i915-gem shrinker, so that they may be swapped out or discarded when under memory pressur

Re: i915 ttm_tt shmem backend

2021-09-10 Thread Christian König
Am 09.09.21 um 18:56 schrieb Matthew Auld: On Thu, 9 Sept 2021 at 17:43, Koenig, Christian wrote: Hi Matthew, this doesn't work, I've already tried something similar. TTM uses the reverse lookup functionality when migrating BOs between system and device memory. And that doesn't seem to work

Re: i915 ttm_tt shmem backend

2021-09-10 Thread Thomas Hellström
Perhaps some background and goal is worth mentioning here. On Thu, 2021-09-09 at 17:56 +0100, Matthew Auld wrote: > On Thu, 9 Sept 2021 at 17:43, Koenig, Christian > wrote: > > > > Hi Matthew, > > > > this doesn't work, I've already tried something similar. > > > > TTM uses the reverse lookup

Re: [Intel-gfx] [PATCH v8 10/17] drm/i915/pxp: interfaces for using protected objects

2021-09-10 Thread Daniele Ceraolo Spurio
On 9/9/2021 2:07 PM, Rodrigo Vivi wrote: On Thu, Sep 09, 2021 at 05:29:08AM -0700, Daniele Ceraolo Spurio wrote: This api allow user mode to create protected buffers and to mark contexts as making use of such objects. Only when using contexts marked in such a way is the execution guaranteed t

[PATCH] drm/i915: Add ww context to intel_dpt_pin

2021-09-10 Thread Maarten Lankhorst
Ensure i915_vma_pin_iomap and vma_unpin are done with dpt->obj lock held. I don't think there's much of a point in merging intel_dpt_pin() with intel_pin_fb_obj_dpt(), they touch different objects. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/display/intel_dpt.c | 40 ++

Re: i915 ttm_tt shmem backend

2021-09-10 Thread Christian König
Am 10.09.21 um 10:08 schrieb Thomas Hellström: Perhaps some background and goal is worth mentioning here. On Thu, 2021-09-09 at 17:56 +0100, Matthew Auld wrote: On Thu, 9 Sept 2021 at 17:43, Koenig, Christian wrote: Hi Matthew, this doesn't work, I've already tried something similar. TT

[PATCH 01/14] dma-buf: add dma_resv_for_each_fence_unlocked

2021-09-10 Thread Christian König
Abstract the complexity of iterating over all the fences in a dma_resv object. The new loop handles the whole RCU and retry dance and returns only fences where we can be sure we grabbed the right one. Signed-off-by: Christian König --- drivers/dma-buf/dma-resv.c | 63 +++

[PATCH 02/14] dma-buf: add dma_resv_for_each_fence

2021-09-10 Thread Christian König
A simpler version of the iterator to be used when the dma_resv object is locked. Signed-off-by: Christian König --- drivers/dma-buf/dma-resv.c | 38 ++ include/linux/dma-resv.h | 18 ++ 2 files changed, 56 insertions(+) diff --git a/drivers/

[PATCH 03/14] dma-buf: use new iterator in dma_resv_copy_fences

2021-09-10 Thread Christian König
This makes the function much simpler since the complex retry logic is now handled else where. Signed-off-by: Christian König --- drivers/dma-buf/dma-resv.c | 81 +++--- 1 file changed, 32 insertions(+), 49 deletions(-) diff --git a/drivers/dma-buf/dma-resv.c b/dr

[PATCH 04/14] dma-buf: use new iterator in dma_resv_get_fences

2021-09-10 Thread Christian König
This makes the function much simpler since the complex retry logic is now handled elsewhere. Signed-off-by: Christian König --- drivers/dma-buf/dma-resv.c | 110 + 1 file changed, 37 insertions(+), 73 deletions(-) diff --git a/drivers/dma-buf/dma-resv.c b/dri

[PATCH 07/14] drm/i915: use the new iterator in i915_gem_busy_ioctl

2021-09-10 Thread Christian König
This makes the function much simpler since the complex retry logic is now handled else where. Signed-off-by: Christian König --- drivers/gpu/drm/i915/gem/i915_gem_busy.c | 30 +++- 1 file changed, 9 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_ge

[PATCH 06/14] dma-buf: use new iterator in dma_resv_test_signaled

2021-09-10 Thread Christian König
This makes the function much simpler since the complex retry logic is now handled elsewhere. Signed-off-by: Christian König --- drivers/dma-buf/dma-resv.c | 54 +- 1 file changed, 7 insertions(+), 47 deletions(-) diff --git a/drivers/dma-buf/dma-resv.c b/driv

[PATCH 05/14] dma-buf: use new iterator in dma_resv_wait_timeout

2021-09-10 Thread Christian König
This makes the function much simpler since the complex retry logic is now handled elsewhere. Signed-off-by: Christian König --- drivers/dma-buf/dma-resv.c | 64 +- 1 file changed, 7 insertions(+), 57 deletions(-) diff --git a/drivers/dma-buf/dma-resv.c b/driv

[PATCH 08/14] drm/ttm: use the new iterator in ttm_bo_flush_all_fences

2021-09-10 Thread Christian König
This is probably a fix since we didn't even grabed a reference to the fences. Signed-off-by: Christian König --- drivers/gpu/drm/ttm/ttm_bo.c | 12 ++-- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index 0a3127

[PATCH 10/14] drm/amdgpu: use the new iterator in amdgpu_sync_resv

2021-09-10 Thread Christian König
Simplifying the code a bit. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 44 1 file changed, 14 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c index 862eb3

[PATCH 09/14] drm/etnaviv: use new iterator in etnaviv_gem_describe

2021-09-10 Thread Christian König
Instead of hand rolling the logic. Signed-off-by: Christian König --- drivers/gpu/drm/etnaviv/etnaviv_gem.c | 27 +-- 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c b/drivers/gpu/drm/etnaviv/etnaviv_gem.c index b8fa6e

[PATCH 14/14] drm/radeon: use new iterator in radeon_sync_resv

2021-09-10 Thread Christian König
Simplifying the code a bit. Signed-off-by: Christian König --- drivers/gpu/drm/radeon/radeon_sync.c | 22 +++--- 1 file changed, 3 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_sync.c b/drivers/gpu/drm/radeon/radeon_sync.c index 9257b60144c4..14a4d81

[PATCH 13/14] drm/nouveau: use the new iterator in nouveau_fence_sync

2021-09-10 Thread Christian König
Simplifying the code a bit. Signed-off-by: Christian König --- drivers/gpu/drm/nouveau/nouveau_fence.c | 48 +++-- 1 file changed, 12 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c index 05d0b3eb

[PATCH 11/14] drm/amdgpu: use new iterator in amdgpu_ttm_bo_eviction_valuable

2021-09-10 Thread Christian König
Simplifying the code a bit. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 14 -- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 489e22190e29..0a9270

[PATCH 12/14] drm/msm: use new iterator in msm_gem_describe

2021-09-10 Thread Christian König
Simplifying the code a bit. Also drop the RCU read side lock since the object is locked anyway. Untested since I can't get the driver to compile on !ARM. Signed-off-by: Christian König --- drivers/gpu/drm/msm/msm_gem.c | 19 +-- 1 file changed, 5 insertions(+), 14 deletions(-)

Re: [Intel-gfx] [PATCH 05/27] drm/i915: Add GT PM unpark worker

2021-09-10 Thread Tvrtko Ursulin
On 20/08/2021 23:44, Matthew Brost wrote: Sometimes it is desirable to queue work up for later if the GT PM isn't held and run that work on next GT PM unpark. Sounds maybe plausible, but it depends how much work can happen on unpark and whether it can have too much of a negative impact on la

Re: i915 ttm_tt shmem backend

2021-09-10 Thread Thomas Hellström
On Fri, 2021-09-10 at 10:25 +0200, Christian König wrote: > > > Am 10.09.21 um 10:08 schrieb Thomas Hellström: > > Perhaps some background and goal is worth mentioning here. > > > > > > On Thu, 2021-09-09 at 17:56 +0100, Matthew Auld wrote: > > > On Thu, 9 Sept 2021 at 17:43, Koenig, Christian

RE: [PATCH] drm/ttm: add a BUG_ON in ttm_set_driver_manager when array bounds

2021-09-10 Thread Chen, Guchun
[Public] Hi Christian and Xinhui, Thanks for your suggestion. The cause is I saw data corruption in several proprietary use cases. BUILD_BUG_ON will have build variation per gcc difference? Anyway, WARN_ON is fine to me, and I will send a new patch set soon to address this. Regards, Guchun

Re: i915 ttm_tt shmem backend

2021-09-10 Thread Christian König
Am 10.09.21 um 10:40 schrieb Thomas Hellström: On Fri, 2021-09-10 at 10:25 +0200, Christian König wrote: Am 10.09.21 um 10:08 schrieb Thomas Hellström: Perhaps some background and goal is worth mentioning here. On Thu, 2021-09-09 at 17:56 +0100, Matthew Auld wrote: On Thu, 9 Sept 2021 at 17

Re: [Intel-gfx] [PATCH v8 16/17] drm/i915/pxp: add PXP documentation

2021-09-10 Thread Daniele Ceraolo Spurio
On 9/9/2021 2:25 PM, Rodrigo Vivi wrote: On Thu, Sep 09, 2021 at 05:29:14AM -0700, Daniele Ceraolo Spurio wrote: Now that all the pieces are in place we can add a description of how the feature works. Also modify the comments in struct intel_pxp into kerneldoc. Signed-off-by: Daniele Ceraolo

[PATCH] drm/ttm: add a WARN_ON in ttm_set_driver_manager when array bounds (v2)

2021-09-10 Thread Guchun Chen
Vendor will define their own memory types on top of TTM_PL_PRIV, but call ttm_set_driver_manager directly without checking mem_type value when setting up memory manager. So add such check to aware the case when array bounds. v2: lower check level to WARN_ON Signed-off-by: Leslie Shi Signed-off-b

[PATCH v4 00/24] drm/bridge: Make panel and bridge probe order consistent

2021-09-10 Thread Maxime Ripard
Hi, We've encountered an issue with the RaspberryPi DSI panel that prevented the whole display driver from probing. The issue is described in detail in the commit 7213246a803f ("drm/vc4: dsi: Only register our component once a DSI device is attached"), but the basic idea is that since the panel i

[PATCH v4 01/24] drm/bridge: Add documentation sections

2021-09-10 Thread Maxime Ripard
The bridge documentation overview is quite packed already, and we'll add some more documentation that isn't part of an overview at all. Let's add some sections to the documentation to separate each bits. Reviewed-by: Andrzej Hajda Reviewed-by: Sam Ravnborg Signed-off-by: Maxime Ripard --- Doc

[PATCH v4 02/24] drm/bridge: Document the probe issue with MIPI-DSI bridges

2021-09-10 Thread Maxime Ripard
Interactions between bridges, panels, MIPI-DSI host and the component framework are not trivial and can lead to probing issues when implementing a display driver. Let's document the various cases we need too consider, and the solution to support all the cases. Signed-off-by: Maxime Ripard --- Do

[PATCH v4 03/24] drm/mipi-dsi: Create devm device registration

2021-09-10 Thread Maxime Ripard
Devices that take their data through the MIPI-DSI bus but are controlled through a secondary bus like I2C have to register a secondary device on the MIPI-DSI bus through the mipi_dsi_device_register_full() function. At removal or when an error occurs, that device needs to be removed through a call

[PATCH v4 04/24] drm/mipi-dsi: Create devm device attachment

2021-09-10 Thread Maxime Ripard
MIPI-DSI devices need to call mipi_dsi_attach() when their probe is done to attach against their host. However, at removal or when an error occurs, that attachment needs to be undone through a call to mipi_dsi_detach(). Let's create a device-managed variant of the attachment function that will au

[PATCH v4 05/24] drm/bridge: adv7533: Switch to devm MIPI-DSI helpers

2021-09-10 Thread Maxime Ripard
Let's switch to the new devm MIPI-DSI function to register and attach our secondary device. This also avoids leaking the device when we detach the bridge. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/adv7511/adv7511.h | 1 - drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 2 -- d

[PATCH v4 06/24] drm/bridge: adv7511: Register and attach our DSI device at probe

2021-09-10 Thread Maxime Ripard
In order to avoid any probe ordering issue, the best practice is to move the secondary MIPI-DSI device registration and attachment to the MIPI-DSI host at probe time. Let's do this. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 13 ++--- 1 file changed,

[PATCH v4 07/24] drm/bridge: anx7625: Switch to devm MIPI-DSI helpers

2021-09-10 Thread Maxime Ripard
Let's switch to the new devm MIPI-DSI function to register and attach our secondary device. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/analogix/anx7625.c | 20 +--- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625

[PATCH v4 08/24] drm/bridge: anx7625: Register and attach our DSI device at probe

2021-09-10 Thread Maxime Ripard
In order to avoid any probe ordering issue, the best practice is to move the secondary MIPI-DSI device registration and attachment to the MIPI-DSI host at probe time. Let's do this. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/analogix/anx7625.c | 20 ++-- 1 file chang

[PATCH v4 09/24] drm/bridge: lt8912b: Switch to devm MIPI-DSI helpers

2021-09-10 Thread Maxime Ripard
Let's switch to the new devm MIPI-DSI function to register and attach our secondary device. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/lontium-lt8912b.c | 20 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/bridge/lontium-lt8912b.c

[PATCH v4 10/24] drm/bridge: lt8912b: Register and attach our DSI device at probe

2021-09-10 Thread Maxime Ripard
In order to avoid any probe ordering issue, the best practice is to move the secondary MIPI-DSI device registration and attachment to the MIPI-DSI host at probe time. Let's do this. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/lontium-lt8912b.c | 11 +++ 1 file changed, 7 inse

[PATCH v4 11/24] drm/bridge: lt9611: Switch to devm MIPI-DSI helpers

2021-09-10 Thread Maxime Ripard
Let's switch to the new devm MIPI-DSI function to register and attach our secondary device. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/lontium-lt9611.c | 24 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/bridge/lontium-lt9611

[PATCH v4 12/24] drm/bridge: lt9611: Register and attach our DSI device at probe

2021-09-10 Thread Maxime Ripard
In order to avoid any probe ordering issue, the best practice is to move the secondary MIPI-DSI device registration and attachment to the MIPI-DSI host at probe time. Let's do this. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/lontium-lt9611.c | 38 - 1 file ch

[PATCH v4 13/24] drm/bridge: lt9611uxc: Switch to devm MIPI-DSI helpers

2021-09-10 Thread Maxime Ripard
Let's switch to the new devm MIPI-DSI function to register and attach our secondary device. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/lontium-lt9611uxc.c | 38 +- 1 file changed, 8 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/bridge/lontium-lt961

[PATCH v4 14/24] drm/bridge: lt9611uxc: Register and attach our DSI device at probe

2021-09-10 Thread Maxime Ripard
In order to avoid any probe ordering issue, the best practice is to move the secondary MIPI-DSI device registration and attachment to the MIPI-DSI host at probe time. Let's do this. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/lontium-lt9611uxc.c | 31 +- 1 file ch

[PATCH v4 15/24] drm/bridge: ps8640: Switch to devm MIPI-DSI helpers

2021-09-10 Thread Maxime Ripard
Let's switch to the new devm MIPI-DSI function to register and attach our secondary device. This also avoids leaking the device on removal. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/parade-ps8640.c | 10 +++--- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/drive

[PATCH v4 16/24] drm/bridge: ps8640: Register and attach our DSI device at probe

2021-09-10 Thread Maxime Ripard
In order to avoid any probe ordering issue, the best practice is to move the secondary MIPI-DSI device registration and attachment to the MIPI-DSI host at probe time. Let's do this. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/parade-ps8640.c | 97 +++--- 1 file ch

[PATCH v4 17/24] drm/bridge: sn65dsi83: Switch to devm MIPI-DSI helpers

2021-09-10 Thread Maxime Ripard
Let's switch to the new devm MIPI-DSI function to register and attach our secondary device. This also avoids leaking the device when we detach the bridge but don't remove its driver. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/ti-sn65dsi83.c | 12 +++- 1 file changed, 3 inser

[PATCH v4 18/24] drm/bridge: sn65dsi83: Register and attach our DSI device at probe

2021-09-10 Thread Maxime Ripard
In order to avoid any probe ordering issue, the best practice is to move the secondary MIPI-DSI device registration and attachment to the MIPI-DSI host at probe time. Let's do this. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/ti-sn65dsi83.c | 80 +++ 1 file ch

[PATCH v4 19/24] drm/bridge: sn65dsi86: Switch to devm MIPI-DSI helpers

2021-09-10 Thread Maxime Ripard
Let's switch to the new devm MIPI-DSI function to register and attach our secondary device. This also avoids leaking the device when we detach the bridge. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/ti-sn65dsi86.c | 22 +++--- 1 file changed, 7 insertions(+), 15 delet

[PATCH v4 21/24] drm/bridge: tc358775: Switch to devm MIPI-DSI helpers

2021-09-10 Thread Maxime Ripard
Let's switch to the new devm MIPI-DSI function to register and attach our secondary device. This also avoids leaking the device when we detach the bridge. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/tc358775.c | 13 - 1 file changed, 4 insertions(+), 9 deletions(-) diff

[PATCH v4 20/24] drm/bridge: sn65dsi86: Register and attach our DSI device at probe

2021-09-10 Thread Maxime Ripard
In order to avoid any probe ordering issue, the best practice is to move the secondary MIPI-DSI device registration and attachment to the MIPI-DSI host at probe time. Let's do this. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/ti-sn65dsi86.c | 74 ++- 1 file ch

[PATCH v4 22/24] drm/bridge: tc358775: Register and attach our DSI device at probe

2021-09-10 Thread Maxime Ripard
In order to avoid any probe ordering issue, the best practice is to move the secondary MIPI-DSI device registration and attachment to the MIPI-DSI host at probe time. Let's do this. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/bridge/tc358775.c | 37 +-- 1 file ch

[PATCH v4 23/24] drm/kirin: dsi: Adjust probe order

2021-09-10 Thread Maxime Ripard
Without proper care and an agreement between how DSI hosts and devices drivers register their MIPI-DSI entities and potential components, we can end up in a situation where the drivers can never probe. Most drivers were taking evasive maneuvers to try to workaround this, but not all of them were f

[PATCH v4 24/24] drm/exynos: dsi: Adjust probe order

2021-09-10 Thread Maxime Ripard
Without proper care and an agreement between how DSI hosts and devices drivers register their MIPI-DSI entities and potential components, we can end up in a situation where the drivers can never probe. Most drivers were taking evasive maneuvers to try to workaround this, but not all of them were f

Re: [Intel-gfx] [PATCH 08/27] drm/i915: Add logical engine mapping

2021-09-10 Thread Tvrtko Ursulin
On 20/08/2021 23:44, Matthew Brost wrote: Add logical engine mapping. This is required for split-frame, as workloads need to be placed on engines in a logically contiguous manner. v2: (Daniel Vetter) - Add kernel doc for new fields Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH 23/27] drm/i915/guc: Implement no mid batch preemption for multi-lrc

2021-09-10 Thread Tvrtko Ursulin
On 20/08/2021 23:44, Matthew Brost wrote: For some users of multi-lrc, e.g. split frame, it isn't safe to preempt mid BB. To safely enable preemption at the BB boundary, a handshake between to parent and child is needed. This is implemented via custom emit_bb_start & emit_fini_breadcrumb functi

Re: [PATCH RESEND] drm/i915: Mark GPU wedging on driver unregister unrecoverable

2021-09-10 Thread Michał Winiarski
On 03.09.2021 16:28, Janusz Krzysztofik wrote: GPU wedged flag now set on driver unregister to prevent from further using the GPU can be then cleared unintentionally when calling __intel_gt_unset_wedged() still before the flag is finally marked unrecoverable. We need to have it marked unrecovera

[Bug 213391] AMDGPU retries page fault with some specific processes amdgpu and sometimes followed [gfxhub0] retry page fault until *ERROR* ring gfx timeout, but soft recovered

2021-09-10 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=213391 --- Comment #36 from Lahfa Samy (s...@lahfa.xyz) --- Did anyone test whether this has been fixed in newer firmware updates, or should we still stay on version 20210315.3568f96-3 ? -- You may reply to this email to add a comment. You are receivi

Re: [Intel-gfx] [PATCH 5/6] drm/i915/uncore: Drop gen11 mmio read handlers

2021-09-10 Thread Tvrtko Ursulin
On 10/09/2021 06:33, Matt Roper wrote: Consolidate down to just a single 'fwtable' implementation. For reads we don't need to worry about shadow tables. Also, the NEEDS_FORCE_WAKE() check we previously had in the fwtable implementation can be dropped --- if a register is outside that range on

Re: [Intel-gfx] [PATCH 1/6] drm/i915/uncore: Convert gen6/gen7 read operations to fwtable

2021-09-10 Thread Tvrtko Ursulin
On 10/09/2021 06:33, Matt Roper wrote: On gen6-gen8 (except vlv/chv) we don't use a forcewake lookup table; we simply check whether the register offset is < 0x4, and return FORCEWAKE_RENDER if it is. To prepare for upcoming refactoring, let's define a single-entry forcewake table from [0x

Re: [Intel-gfx] [PATCH 0/6] i915: Simplify mmio handling & add new DG2 shadow table

2021-09-10 Thread Tvrtko Ursulin
On 10/09/2021 06:33, Matt Roper wrote: Our uncore MMIO functions for reading/writing registers have become very complicated over time. There's significant macro magic used to generate several nearly-identical functions that only really differ in terms of which platform-specific shadow register

Re: [PATCH v5 1/3] dt-bindings: Add YAML bindings for NVDEC

2021-09-10 Thread Rob Herring
On Fri, 10 Sep 2021 13:42:45 +0300, Mikko Perttunen wrote: > Add YAML device tree bindings for NVDEC, now in a more appropriate > place compared to the old textual Host1x bindings. > > Signed-off-by: Mikko Perttunen > --- > v5: > * Changed from nvidia,instance to nvidia,host1x-class optional >

[PATCH 0/3] drm/bridge: Create a function to abstract panels away

2021-09-10 Thread Maxime Ripard
Hi, This series used to be part of the DSI probe order series, but got removed since it wasn't useful there anymore. However, I still believe there is value in moving towards merging bridges and panels by only making encoder (or upstream bridges) manipulate bridges. The first patch creates a new

[PATCH 1/3] drm/bridge: Add a function to abstract away panels

2021-09-10 Thread Maxime Ripard
Display drivers so far need to have a lot of boilerplate to first retrieve either the panel or bridge that they are connected to using drm_of_find_panel_or_bridge(), and then either deal with each with ad-hoc functions or create a drm panel bridge through drm_panel_bridge_add. In order to reduce t

[PATCH 2/3] drm/vc4: dpi: Switch to devm_drm_of_get_bridge

2021-09-10 Thread Maxime Ripard
The new devm_drm_of_get_bridge removes most of the boilerplate we have to deal with. Let's switch to it. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_dpi.c | 15 --- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_dpi.c b/drivers/gpu

[PATCH 3/3] drm/vc4: dsi: Switch to devm_drm_of_get_bridge

2021-09-10 Thread Maxime Ripard
The new devm_drm_of_get_bridge removes most of the boilerplate we have to deal with. Let's switch to it. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_drv.c | 2 ++ drivers/gpu/drm/vc4/vc4_dsi.c | 28 2 files changed, 6 insertions(+), 24 deletions(-) dif

[RFC PATCH] drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Thomas Hellström
Both the provider (resource manager) and the consumer (the TTM driver) want to subclass struct ttm_resource. Since this is left for the resource manager, we need to provide a private pointer for the TTM driver. Provide a struct ttm_resource_private for the driver to subclass for data with the same

Re: [PATCH v2 3/6] drm/i915 Implement LMEM backup and restore for suspend / resume

2021-09-10 Thread Thomas Hellström
On 9/6/21 6:55 PM, Thomas Hellström wrote: Just evict unpinned objects to system. For pinned LMEM objects, make a backup system object and blit the contents to that. Backup is performed in three steps, 1: Opportunistically evict evictable objects using the gpu blitter. 2: After gt idle, evict

[Bug 213391] AMDGPU retries page fault with some specific processes amdgpu and sometimes followed [gfxhub0] retry page fault until *ERROR* ring gfx timeout, but soft recovered

2021-09-10 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=213391 --- Comment #37 from Michel Dänzer (mic...@daenzer.net) --- (In reply to Lahfa Samy from comment #36) > Did anyone test whether this has been fixed in newer firmware updates, or > should we still stay on version 20210315.3568f96-3 ? It's fixed in

Re: [Intel-gfx] [PATCH v5] drm/i915: Use Transparent Hugepages when IOMMU is enabled

2021-09-10 Thread Tvrtko Ursulin
On 09/09/2021 17:17, Rodrigo Vivi wrote: On Thu, Sep 09, 2021 at 12:44:48PM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Usage of Transparent Hugepages was disabled in 9987da4b5dcf ("drm/i915: Disable THP until we have a GPU read BW W/A"), but since it appears majority of performance re

Re: [PATCH v2 5/9] vfio/mdev: Consolidate all the device_api sysfs into the core code

2021-09-10 Thread Jason Gunthorpe
On Fri, Sep 10, 2021 at 01:10:46PM +0100, Christoph Hellwig wrote: > On Thu, Sep 09, 2021 at 04:38:45PM -0300, Jason Gunthorpe wrote: > > Every driver just emits a static string, simply feed it through the ops > > and provide a standard sysfs show function. > > Looks sensible. But can you make th

Re: [PATCH v3 1/6] drm/vc4: select PM

2021-09-10 Thread Dave Stevenson
On Thu, 19 Aug 2021 at 14:59, Maxime Ripard wrote: > > We already depend on runtime PM to get the power domains and clocks for > most of the devices supported by the vc4 driver, so let's just select it > to make sure it's there, and remove the ifdef. > > Signed-off-by: Maxime Ripard Reviewed-by:

Re: [PATCH] drm/vc4: hdmi: Remove unused struct

2021-09-10 Thread Dave Stevenson
On Thu, 19 Aug 2021 at 15:08, Maxime Ripard wrote: > > Commitc7d30623540b ("drm/vc4: hdmi: Remove unused struct") removed the > references to the vc4_hdmi_audio_widgets and vc4_hdmi_audio_routes > structures, but not the structures themselves resulting in two warnings. > Remove it. > > Fixes: c7d3

Re: [Intel-gfx] [PATCH 0/6] i915: Simplify mmio handling & add new DG2 shadow table

2021-09-10 Thread Matt Roper
On Fri, Sep 10, 2021 at 02:03:44PM +0100, Tvrtko Ursulin wrote: > > On 10/09/2021 06:33, Matt Roper wrote: > > Our uncore MMIO functions for reading/writing registers have become very > > complicated over time. There's significant macro magic used to generate > > several nearly-identical function

Re: [RFC PATCH] drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Christian König
Am 10.09.21 um 15:15 schrieb Thomas Hellström: Both the provider (resource manager) and the consumer (the TTM driver) want to subclass struct ttm_resource. Since this is left for the resource manager, we need to provide a private pointer for the TTM driver. Provide a struct ttm_resource_priva

[PATCH v5 2/3] arm64: tegra: Add NVDEC to Tegra186/194 device trees

2021-09-10 Thread Mikko Perttunen
Add a device tree node for NVDEC on Tegra186, and device tree nodes for NVDEC and NVDEC1 on Tegra194. Signed-off-by: Mikko Perttunen --- v5: * Change from nvidia,instance to nvidia,host1x-class v4: * Add dma-coherent markers v3: * Change read2 to read-1 v2: * Add NVDECSRD1 memory client * Add als

[PATCH v5 3/3] drm/tegra: Add NVDEC driver

2021-09-10 Thread Mikko Perttunen
Add support for booting and using NVDEC on Tegra210, Tegra186 and Tegra194 to the Host1x and TegraDRM drivers. Booting in secure mode is not currently supported. Signed-off-by: Mikko Perttunen --- v5: * Remove num_instances * Change from nvidia,instance to nvidia,host1x-class v3: * Change num_ins

[PATCH v5 1/3] dt-bindings: Add YAML bindings for NVDEC

2021-09-10 Thread Mikko Perttunen
Add YAML device tree bindings for NVDEC, now in a more appropriate place compared to the old textual Host1x bindings. Signed-off-by: Mikko Perttunen --- v5: * Changed from nvidia,instance to nvidia,host1x-class optional property. * Added dma-coherent v4: * Fix incorrect compatibility string in

[PATCH v5 0/3] NVIDIA Tegra NVDEC support

2021-09-10 Thread Mikko Perttunen
Here's the v5 of the NVDEC support series, containing the following changes: * Changed from nvidia,instance property to nvidia,host1x-class property. * Set additionalProperties to false in DT bindings. * Added dma-coherent property to DT bindings. NVDEC hardware documentation can be found at ht

Re: [PATCH v3 2/8] mm: Introduce a function to check for confidential computing features

2021-09-10 Thread Borislav Petkov
On Wed, Sep 08, 2021 at 05:58:33PM -0500, Tom Lendacky wrote: > In prep for other confidential computing technologies, introduce a generic preparation > helper function, cc_platform_has(), that can be used to check for specific > active confidential computing attributes, like memory encryption. T

[PATCH 1/1] lib, stackdepot: Add helper to print stack entries into buffer.

2021-09-10 Thread Imran Khan
To print stack entries into a buffer, users of stackdepot, first get a list of stack entries using stack_depot_fetch and then print this list into a buffer using stack_trace_snprint. Provide a helper in stackdepot for this purpose. Also change above mentioned users to use this helper. Signed-off-b

[PATCH 0/1] lib, stackdepot: Add helper to print stack entries into buffer.

2021-09-10 Thread Imran Khan
This change is in response to discussion at [1]. The patch has been created on top of my earlier changes [2] and [3]. If needed I can resend all of these patches together, though my earlier patches have been Acked. [1] https://lore.kernel.org/lkml/e6f6fb85-1d83-425b-9e36-b5784cc9e...@suse.cz/ [2]

Re: [Intel-gfx] [PATCH 0/6] i915: Simplify mmio handling & add new DG2 shadow table

2021-09-10 Thread Tvrtko Ursulin
On 10/09/2021 15:24, Matt Roper wrote: On Fri, Sep 10, 2021 at 02:03:44PM +0100, Tvrtko Ursulin wrote: On 10/09/2021 06:33, Matt Roper wrote: Our uncore MMIO functions for reading/writing registers have become very complicated over time. There's significant macro magic used to generate seve

Re: [PATCH v2] kernel/locking: Add context to ww_mutex_trylock.

2021-09-10 Thread Peter Zijlstra
On Thu, Sep 09, 2021 at 11:32:18AM +0200, Maarten Lankhorst wrote: > diff --git a/kernel/locking/mutex.c b/kernel/locking/mutex.c > index d456579d0952..791c28005eef 100644 > --- a/kernel/locking/mutex.c > +++ b/kernel/locking/mutex.c > @@ -736,6 +736,44 @@ __ww_mutex_lock(struct mutex *lock, unsign

Re: [Intel-gfx] [PATCH 0/6] i915: Simplify mmio handling & add new DG2 shadow table

2021-09-10 Thread Matt Roper
On Fri, Sep 10, 2021 at 04:03:50PM +0100, Tvrtko Ursulin wrote: > > On 10/09/2021 15:24, Matt Roper wrote: > > On Fri, Sep 10, 2021 at 02:03:44PM +0100, Tvrtko Ursulin wrote: > > > > > > On 10/09/2021 06:33, Matt Roper wrote: > > > > Our uncore MMIO functions for reading/writing registers have be

Re: [PATCH v2 1/3] video: fbdev: asiliantfb: Error out if 'pixclock' equals zero

2021-09-10 Thread Geert Uytterhoeven
Hi Zheyu, On Mon, Jul 26, 2021 at 12:04 PM Zheyu Ma wrote: > The userspace program could pass any values to the driver through > ioctl() interface. If the driver doesn't check the value of 'pixclock', > it may cause divide error. > > Fix this by checking whether 'pixclock' is zero first. > > The

Re: [RFC PATCH] drm/ttm: Add a private member to the struct ttm_resource

2021-09-10 Thread Thomas Hellström
On Fri, 2021-09-10 at 16:40 +0200, Christian König wrote: > > > Am 10.09.21 um 15:15 schrieb Thomas Hellström: > > Both the provider (resource manager) and the consumer (the TTM > > driver) > > want to subclass struct ttm_resource. Since this is left for the > > resource > > manager, we need to p

[PATCH v9 00/17] drm/i915: Introduce Intel PXP

2021-09-10 Thread Daniele Ceraolo Spurio
PXP (Protected Xe Path) is an i915 component, available on GEN12i and newer platforms, that helps to establish the hardware protected session and manage the status of the alive software session, as well as its life cycle. changes from v8: - comments/docs improvements - remove rpm put race (pxp_inv

[PATCH v9 01/17] drm/i915/pxp: Define PXP component interface

2021-09-10 Thread Daniele Ceraolo Spurio
This will be used for communication between the i915 driver and the mei one. Defining it in a stand-alone patch to avoid circualr dependedencies between the patches modifying the 2 drivers. Split out from an original patch from Huang, Sean Z v2: rename the component struct (Rodrigo) Signed-off-

[PATCH v9 02/17] mei: pxp: export pavp client to me client bus

2021-09-10 Thread Daniele Ceraolo Spurio
From: Vitaly Lubart Export PAVP client to work with i915 driver, for binding it uses kernel component framework. v2:drop debug prints, refactor match code to match mei_hdcp (Tomas) Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Ro

[PATCH v9 03/17] drm/i915/pxp: define PXP device flag and kconfig

2021-09-10 Thread Daniele Ceraolo Spurio
Ahead of the PXP implementation, define the relevant define flag and kconfig option. v2: flip kconfig default to N. Some machines have IFWIs that do not support PXP, so we need it to be an opt-in until we add support to query the caps from the mei device. Signed-off-by: Daniele Ceraolo Spurio Re

[PATCH v9 04/17] drm/i915/pxp: allocate a vcs context for pxp usage

2021-09-10 Thread Daniele Ceraolo Spurio
The context is required to send the session termination commands to the VCS, which will be implemented in a follow-up patch. We can also use the presence of the context as a check of pxp initialization completion. v2: use perma-pinned context (Chris) v3: rename pinned_context functions (Chris) v4:

[PATCH v9 07/17] drm/i915/pxp: Create the arbitrary session after boot

2021-09-10 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" Create the arbitrary session, with the fixed session id 0xf, after system boot, for the case that application allocates the protected buffer without establishing any protection session. Because the hardware requires at least one alive session for protected buffer creation. T

[PATCH v9 05/17] drm/i915/pxp: Implement funcs to create the TEE channel

2021-09-10 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" Implement the funcs to create the TEE channel, so kernel can send the TEE commands directly to TEE for creating the arbitrary (default) session. v2: fix locking, don't pollute dev_priv (Chris) v3: wait for mei PXP component to be bound. v4: drop the wait, as the component

[PATCH v9 06/17] drm/i915/pxp: set KCR reg init

2021-09-10 Thread Daniele Ceraolo Spurio
The setting is required by hardware to allow us doing further protection operation such as sending commands to GPU or TEE. The register needs to be re-programmed on resume, so for simplicitly we bundle the programming with the component binding, which is automatically called on resume. Further HW

[PATCH v9 08/17] drm/i915/pxp: Implement arb session teardown

2021-09-10 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" Teardown is triggered when the display topology changes and no long meets the secure playback requirement, and hardware trashes all the encryption keys for display. Additionally, we want to emit a teardown operation to make sure we're clean on boot and resume v2: emit in th

[PATCH v9 10/17] drm/i915/pxp: interfaces for using protected objects

2021-09-10 Thread Daniele Ceraolo Spurio
This api allow user mode to create protected buffers and to mark contexts as making use of such objects. Only when using contexts marked in such a way is the execution guaranteed to work as expected. Contexts can only be marked as using protected content at creation time (i.e. the parameter is imm

[PATCH v9 14/17] drm/i915/pxp: black pixels on pxp disabled

2021-09-10 Thread Daniele Ceraolo Spurio
From: Anshuman Gupta When protected sufaces has flipped and pxp session is disabled, display black pixels by using plane color CTM correction. v2: - Display black pixels in async flip too. v3: - Removed the black pixels logic for async flip. [Ville] - Used plane state to force black pixels. [Vi

[PATCH v9 17/17] drm/i915/pxp: enable PXP for integrated Gen12

2021-09-10 Thread Daniele Ceraolo Spurio
Note that discrete cards can support PXP as well, but we haven't tested on those yet so keeping it disabled for now. Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i91

[PATCH v9 11/17] drm/i915/pxp: start the arb session on demand

2021-09-10 Thread Daniele Ceraolo Spurio
Now that we can handle destruction and re-creation of the arb session, we can postpone the start of the session to the first submission that requires it, to avoid keeping it running with no user. Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/gem/i915_g

[PATCH v9 09/17] drm/i915/pxp: Implement PXP irq handler

2021-09-10 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" The HW will generate a teardown interrupt when session termination is required, which requires i915 to submit a terminating batch. Once the HW is done with the termination it will generate another interrupt, at which point it is safe to re-create the session. Since the term

[PATCH v9 13/17] drm/i915/pxp: Add plane decryption support

2021-09-10 Thread Daniele Ceraolo Spurio
From: Anshuman Gupta Add support to enable/disable PLANE_SURF Decryption Request bit. It requires only to enable plane decryption support when following condition met. 1. PXP session is enabled. 2. Buffer object is protected. v2: - Used gen fb obj user_flags instead gem_object_metadata. [Krishna

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