On Tue, 7 Sept 2021 at 19:23, Alex Deucher wrote:
>
> On Tue, Sep 7, 2021 at 4:53 AM Daniel Gomez wrote:
> >
> > Add custom power profile mode support on smu10.
> > Update workload bit list.
> > ---
> >
> > Hi,
> >
> > I'm trying to add custom profile for the Raven Ridge but not sure if
> > I'd n
Hi Philipp,
Thanks for the reviews.
On Wed, 2021-09-08 at 08:39 +0200, Philipp Zabel wrote:
> Hi Jason,
>
> On Wed, 2021-09-08 at 14:03 +0800, jason-jh.lin wrote:
> > add MERGE additional properties description for mt8195:
> > 1. async clock
> > 2. fifo setting enable
> > 3. reset controller
> >
On Tue, 7 Sep 2021 14:42:56 +0200
Hans de Goede wrote:
> Hi,
>
> On 9/7/21 12:07 PM, Pekka Paalanen wrote:
> > On Fri, 3 Sep 2021 21:08:21 +0200
> > Dennis Filder wrote:
> >
> >> Hans de Goede asked me to take a topic from a private discussion here.
> >> I must also preface that I'm not a gr
Hi,
On 9/8/21 9:36 AM, Pekka Paalanen wrote:
> On Tue, 7 Sep 2021 14:42:56 +0200
> Hans de Goede wrote:
>
>> Hi,
>>
>> On 9/7/21 12:07 PM, Pekka Paalanen wrote:
>>> On Fri, 3 Sep 2021 21:08:21 +0200
>>> Dennis Filder wrote:
>>>
Hans de Goede asked me to take a topic from a private discu
Hi, Matt,
Thanks for reviewing.
On 9/7/21 7:37 PM, Matthew Auld wrote:
+ i915_gem_ww_unlock_single(backup);
+ i915_gem_object_put(backup);
I assume we need to set ttm.backup = NULL somewhere here on the
failure path, or don't drop the ref? Or at least it looks like
potential uaf lat
Hi,
On Tue, 7 Sept 2021 at 22:13, Jeffrey Hugo wrote:
>
> On Wed, Sep 1, 2021 at 12:11 PM AngeloGioacchino Del Regno
> wrote:
> >
> > Bringup functionality for MSM8998 in the DPU, driver which is mostly
> > the same as SDM845 (just a few variations).
> >
> > Signed-off-by: AngeloGioacchino Del R
Hi Jason,
Thank you for your patch. One small comment below.
On 8/9/21 8:02, jason-jh.lin wrote:
> Power:
> 1. Add description for power-domains property.
>
> GCE:
> 1. Add description for mboxes property.
> 2. Add description for mediatek,gce-client-reg property.
>
> Signed-off-by: jason-jh.li
On 07/09/2021 12:13, Eero Tamminen wrote:
Hi,
For completeness sake, it might be worth mentioning specifically what
(synthetic) test-cases regress with THP patch.
* Skylake GT4e:
20-25% SynMark TexMem*
(whereas all MemBW GPU tests either improve or are not affected)
* Broxton J4205:
On Wed, Sep 8, 2021 at 5:14 AM Masahiro Yamada wrote:
>
> On Mon, Sep 6, 2021 at 4:34 PM Daniel Vetter wrote:
> >
> > On Mon, Sep 6, 2021 at 12:49 AM Stephen Rothwell
> > wrote:
> > > Hi all,
> > >
> > > On Thu, 2 Sep 2021 07:50:38 +1000 Stephen Rothwell
> > > wrote:
> > > >
> > > > On Fri, 2
On 08/09/2021 00:27, Vinay Belgaumkar wrote:
Seeing these errors when GT is likely in suspend state-
"RPM wakelock ref not held during HW access"
Ensure GT is awake before trying to access HW registers. Avoid
reading the register if that is not the case.
Signed-off-by: Vinay Belgaumkar
Fix
On Sun, 5 Sep 2021 13:27:42 +0100
Daniel Stone wrote:
> Since there's a lot of confusion around this, document both the rules
> and the best practice around negotiating, allocating, importing, and
> using buffers when crossing context/process/device/subsystem boundaries.
>
> This ties up all of
> stride
>
I think what's clear is:
- Per-plane property
- In bytes
- Offset between two consecutive rows
How that applies to weird YUV formats is the tricky question…
> Btw. there was a fun argument whether the same modifier value could
> mean different things on different devices.
On 07/09/2021 18:19, Matt Roper wrote:
Introduce a Compute Command Streamer (CCS), which has access to
the media and GPGPU pipelines (but not the 3D pipeline).
To begin with, define the compute class/engine common functions, based
on the existing render ones.
Bspec: 46167, 45544
Original-patc
> On Tue, 07 Sep 2021 10:19:03 +
> Simon Ser wrote:
>
> > FWIW, I've just hit a case where a compositor leaves a "rotation" KMS
> > prop set behind, then Xorg tries to startup and fails because it doesn't
> > reset this prop. So none of this is theoretical.
> >
> > I still think a "reset all K
On 07/09/2021 18:19, Matt Roper wrote:
The reset domain is shared between render and all compute engines,
so resetting one will affect the others.
Note: Before performing a reset on an RCS or CCS engine, the GuC will
attempt to preempt-to-idle the other non-hung RCS/CCS engines to avoid
impac
On 07/09/2021 18:19, Matt Roper wrote:
Add execlists and GuC interrupts for compute CS into existing IRQ handlers.
All compute command streamers belong to the same compute class, so the
only change needed to enable their interrupts is to program their GT engine
interrupt mask registers.
CCS0
Hi Enric,
Thanks for the reviews.
On Wed, 2021-09-08 at 10:32 +0200, Enric Balletbo i Serra wrote:
> Hi Jason,
>
> Thank you for your patch. One small comment below.
>
> On 8/9/21 8:02, jason-jh.lin wrote:
> > Power:
> > 1. Add description for power-domains property.
> >
> > GCE:
> > 1. Add de
On 07/09/2021 18:19, Matt Roper wrote:
The compute engine handles the same commands the render engine can
(except 3D pipeline), so it makes sense that CCS is more similar to RCS
than non-render engines.
The CCS context state (lrc) is also similar to the render one, so reuse
it. Note that the c
syzbot is reporting page fault at vga16fb_fillrect() [1], for
vga16fb_check_var() is failing to detect multiplication overflow.
if (vxres * vyres > maxmem) {
vyres = maxmem / vxres;
if (vyres < yres)
return -ENOMEM;
}
Since no module would accept too huge resolutions where multi
On Tue, Sep 07, 2021 at 03:20:44PM +0200, Maarten Lankhorst wrote:
> i915 will soon gain an eviction path that trylock a whole lot of locks
> for eviction, getting dmesg failures like below:
>
> BUG: MAX_LOCK_DEPTH too low!
> turning off the locking correctness validator.
> depth: 48 max: 48!
> 4
On 06/09/2021 17:55, Thomas Hellström wrote:
Pinned context images are now reset during resume. Don't back them up,
and assuming that rings can be assumed empty at suspend, don't back them
up either.
Introduce a new object flag, I915_BO_ALLOC_PM_VOLATILE meaning that an
object is allowed to lose
On 06/09/2021 17:55, Thomas Hellström wrote:
Pinned context images are now reset during resume. Don't back them up,
and assuming that rings can be assumed empty at suspend, don't back them
up either.
Introduce a new object flag, I915_BO_ALLOC_PM_VOLATILE meaning that an
object is allowed to lose
Hi Marek and Andrzej
On Tue, 7 Sept 2021 at 22:24, Marek Vasut wrote:
>
> On 9/7/21 7:29 PM, Andrzej Hajda wrote:
> >
> > W dniu 07.09.2021 o 16:25, Marek Vasut pisze:
> >> On 9/7/21 9:31 AM, Andrzej Hajda wrote:
> >>> On 07.09.2021 04:39, Marek Vasut wrote:
> In rare cases, the bridge may n
On Wed, 08 Sep 2021 09:51:54 +
Simon Ser wrote:
> > On Tue, 07 Sep 2021 10:19:03 +
> > Simon Ser wrote:
> >
> > > FWIW, I've just hit a case where a compositor leaves a "rotation" KMS
> > > prop set behind, then Xorg tries to startup and fails because it doesn't
> > > reset this prop.
tree: git://people.freedesktop.org/~airlied/linux.git i915-uncore-vfunc
head: b42168f90718a90b11f2d52306d9aeaa9468
commit: 99aebd17891290abfca80c48eca01f4e02413fb3 [30/31] drm/i915/uncore:
constify the register vtables.
config: i386-randconfig-a014-20210908 (attached as .config)
compiler
On Fri, Sep 03, 2021 at 10:38:42PM +0530, Sireesh Kodali wrote:
> SoCs based on the MSM8953 platform use the 14nm DSI PHY driver
>
> Signed-off-by: Sireesh Kodali
> ---
> Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/D
-randconfig-a006-20210908 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
git remote add drm git://people.freedesktop.org/~airlied/linux.git
git fetch --no-tags drm i915-uncore-vfunc
git checkout b42168f90718a90b11f2d52306d9aeaa9468
On Wed, 2021-09-08 at 12:07 +0100, Matthew Auld wrote:
> On 06/09/2021 17:55, Thomas Hellström wrote:
> > Pinned context images are now reset during resume. Don't back them
> > up,
> > and assuming that rings can be assumed empty at suspend, don't back
> > them
> > up either.
> >
> > Introduce a n
On 08/09/2021 13:26, Thomas Hellström wrote:
On Wed, 2021-09-08 at 12:07 +0100, Matthew Auld wrote:
On 06/09/2021 17:55, Thomas Hellström wrote:
Pinned context images are now reset during resume. Don't back them
up,
and assuming that rings can be assumed empty at suspend, don't back
them
up eit
Last round for this set I think, already got RBs for most patches.
Only patch #2 is currently missing anything.
Please point out anything which can be quickly improved and keep in mind
that it's better to have this enabled with some typos than not enabled
at all.
Cheers,
Christian.
Clean up to start over with new and more accurate documentation.
Signed-off-by: Christian König
Reviewed-by: Matthew Auld
---
Documentation/gpu/drm-mm.rst | 49
1 file changed, 49 deletions(-)
diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/dr
For now just a brief description of what TTM is all about.
Signed-off-by: Christian König
---
Documentation/gpu/drm-mm.rst | 3 ++-
drivers/gpu/drm/ttm/ttm_module.c | 12
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/gpu/drm-mm.rst b/Documentation
Fix the last two remaining warnings and finally enable this.
v2: add caching enum link
Signed-off-by: Christian König
Reviewed-by: Matthew Auld
Reviewed-by: Alex Deucher
---
Documentation/gpu/drm-mm.rst | 9 +
include/drm/ttm/ttm_resource.h | 6 ++
2 files changed, 11 insertions
Fix the remaining warnings, switch to inline structure documentation
and finally enable this.
v2: adjust based on suggestions from Alex
Signed-off-by: Christian König
Reviewed-by: Matthew Auld
---
Documentation/gpu/drm-mm.rst | 9 +
include/drm/ttm/ttm_device.h | 72 +++---
Fix the last remaining warning and finally enable this.
Signed-off-by: Christian König
Reviewed-by: Matthew Auld
Reviewed-by: Alex Deucher
---
Documentation/gpu/drm-mm.rst| 6 ++
include/drm/ttm/ttm_placement.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/Documentation/gpu/drm
Fix the remaining warnings and finally enable this.
v2: add caching enum link
Signed-off-by: Christian König
Reviewed-by: Matthew Auld
Reviewed-by: Alex Deucher
---
Documentation/gpu/drm-mm.rst | 9 +
include/drm/ttm/ttm_tt.h | 11 ---
2 files changed, 17 insertions(+), 3
Briefly describe what this is all about.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
---
Documentation/gpu/drm-mm.rst | 3 +++
include/drm/ttm/ttm_caching.h | 17 +
2 files changed, 20 insertions(+)
diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/dr
Fix the remaining warnings and finally enable this.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
---
Documentation/gpu/drm-mm.rst | 9 +
include/drm/ttm/ttm_pool.h | 5 +++--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/gpu/drm-mm.rst b/Doc
tree: git://people.freedesktop.org/~airlied/linux.git i915-vtable-cleanup
head: b0d0061aeef594fc572295c0e3c02ba91596cbf6
commit: b0d0061aeef594fc572295c0e3c02ba91596cbf6 [12/12] drm/i915/display:
constify the audio functions
config: i386-allyesconfig (attached as .config)
compiler: gcc-9 (Debi
On Wed, 8 Sept 2021 at 14:29, Christian König
wrote:
>
> For now just a brief description of what TTM is all about.
>
> Signed-off-by: Christian König
Reviewed-by: Matthew Auld
On 08/09/2021 03:21, Bjorn Andersson wrote:
On Mon 09 Aug 10:26 PDT 2021, Akhil P Oommen wrote:
On 8/9/2021 9:48 PM, Caleb Connolly wrote:
On 09/08/2021 17:12, Rob Clark wrote:
On Mon, Aug 9, 2021 at 7:52 AM Akhil P Oommen
wrote:
[..]
I am a bit confused. We don't define a power domai
tree: git://people.freedesktop.org/~airlied/linux.git i915-uncore-vfunc
head: b42168f90718a90b11f2d52306d9aeaa9468
commit: b42168f90718a90b11f2d52306d9aeaa9468 [31/31] RFC: drm/i915: start
splitting trace points
config: i386-randconfig-a014-20210908 (attached as .config)
compiler
From: Chris Morgan
After commit 928f9e268611 ("clk: fractional-divider: Hide
clk_fractional_divider_ops from wide audience") was merged it appears
that the DSI panel on my Odroid Go Advance stopped working. Upon closer
examination of the problem, it looks like it was the fixup in the
rockchip_drm
On 08/09/2021 11:13, Tvrtko Ursulin wrote:
On 07/09/2021 18:19, Matt Roper wrote:
The compute engine handles the same commands the render engine can
(except 3D pipeline), so it makes sense that CCS is more similar to RCS
than non-render engines.
The CCS context state (lrc) is also similar to
On 07/09/2021 18:19, Matt Roper wrote:
In Dual Context mode the EUs are shared between render and compute
command streamers. The hardware provides a field in the lrc descriptor
to indicate the prioritization of the thread dispatch associated to the
corresponding context.
The context priority i
On 07/09/2021 18:19, Matt Roper wrote:
We have to specify in the Render Control Unit Mode register
when CCS is enabled.
Bspec: 46034
Original-patch-by: Michel Thierry
Cc: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin
Cc: Vinay Belgaumkar
Signed-off-by: Daniele Ceraolo Spurio
Signed-off-by: Ara
On 07/09/2021 18:19, Matt Roper wrote:
From: John Harrison
Now that OpenCL workloads can run on the compute engine, we need to set
preempt_timeout_ms = 0 on the CCS engines too.
Signed-off-by: John Harrison
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 9 +
On Wed, Sep 8, 2021 at 2:26 AM Dmitry Baryshkov
wrote:
>
> Hi,
>
> On Tue, 7 Sept 2021 at 22:13, Jeffrey Hugo wrote:
> >
> > On Wed, Sep 1, 2021 at 12:11 PM AngeloGioacchino Del Regno
> > wrote:
> > >
> > > Bringup functionality for MSM8998 in the DPU, driver which is mostly
> > > the same as SD
On 2021-09-08 2:50 a.m., Boris Brezillon wrote:
On Tue, 7 Sep 2021 14:53:58 -0400
Andrey Grodzovsky wrote:
On 2021-06-29 7:24 a.m., Christian König wrote:
Am 29.06.21 um 13:18 schrieb Boris Brezillon:
Hi Christian,
On Tue, 29 Jun 2021 13:03:58 +0200
Christian König wrote:
Am 29.06.2
On Wed, 8 Sep 2021 10:53:21 -0400
Andrey Grodzovsky wrote:
> > Note that we need to be careful to not call the sync
> > variant in helpers that are called from the interrupt handler itself
> > to avoid deadlocks (i.e. drm_sched_stop()).
>
>
> I am not clear here - which interrupt handler is d
On 9/8/21 1:11 PM, Dave Stevenson wrote:
Hi Marek and Andrzej
Hello Dave,
skipping the protocol discussion, which I hope Andrej will pick up.
[...]
Usually video transmission starts in crtc->enable (CRTC->Encoder), and
in encoder->enable (encoder->bridge), so in bridges->enable it would be
On Wed, 8 Sept 2021 at 16:26, Marek Vasut wrote:
>
> On 9/8/21 1:11 PM, Dave Stevenson wrote:
> > Hi Marek and Andrzej
>
> Hello Dave,
>
> skipping the protocol discussion, which I hope Andrej will pick up.
>
> [...]
>
> >>> Usually video transmission starts in crtc->enable (CRTC->Encoder), and
>
On Wed, Sep 08, 2021 at 09:51:54AM +, Simon Ser wrote:
> > On Tue, 07 Sep 2021 10:19:03 +
> > Simon Ser wrote:
> >
> > > FWIW, I've just hit a case where a compositor leaves a "rotation" KMS
> > > prop set behind, then Xorg tries to startup and fails because it doesn't
> > > reset this pro
On Tue, Sep 07, 2021 at 05:52:41PM +0200, Sebastian Wick wrote:
> > On Tue, 07 Sep 2021 10:19:03 +
> > Simon Ser wrote:
> >
> > > FWIW, I've just hit a case where a compositor leaves a "rotation" KMS
> > > prop set behind, then Xorg tries to startup and fails because it doesn't
> > > reset thi
On Wed, Sep 8, 2021 at 9:36 AM Pekka Paalanen wrote:
>
> On Tue, 7 Sep 2021 14:42:56 +0200
> Hans de Goede wrote:
>
> > Hi,
> >
> > On 9/7/21 12:07 PM, Pekka Paalanen wrote:
> > > On Fri, 3 Sep 2021 21:08:21 +0200
> > > Dennis Filder wrote:
> > >
> > >> Hans de Goede asked me to take a topic fro
On Tue, Sep 07, 2021 at 10:19:09AM -0700, Matt Roper wrote:
> Introduce a Compute Command Streamer (CCS), which has access to
> the media and GPGPU pipelines (but not the 3D pipeline).
>
> To begin with, define the compute class/engine common functions, based
> on the existing render ones.
>
> Bs
On Tue, Sep 07, 2021 at 10:19:10AM -0700, Matt Roper wrote:
> The reset domain is shared between render and all compute engines,
> so resetting one will affect the others.
>
> Note: Before performing a reset on an RCS or CCS engine, the GuC will
> attempt to preempt-to-idle the other non-hung RCS
On Wed, Sep 08, 2021 at 12:03:56AM +0530, Jeevan B wrote:
> change igt_warn to igt_info when unloading the snd module before
> unbinding i915 until WA is fixed.
>
> Signed-off-by: Jeevan B
Please submit per
https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/blob/master/CONTRIBUTING.md#sending-p
On Wed, Sep 08, 2021 at 07:27:49PM +0900, Tetsuo Handa wrote:
> syzbot is reporting page fault at vga16fb_fillrect() [1], for
> vga16fb_check_var() is failing to detect multiplication overflow.
>
> if (vxres * vyres > maxmem) {
> vyres = maxmem / vxres;
> if (vyres < yres)
> return
On Thu, Sep 02, 2021 at 04:01:40PM +0100, Tvrtko Ursulin wrote:
>
> On 02/09/2021 15:33, Daniel Vetter wrote:
> > On Tue, Aug 31, 2021 at 02:18:15PM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 31/08/2021 13:43, Daniel Vetter wrote:
> > > > On Tue, Aug 31, 2021 at 10:15:03AM +0100, Tvrtko Ursulin
On Sat, Sep 04, 2021 at 11:50:37AM +0800, David Gow wrote:
> On Thu, Sep 2, 2021 at 10:46 PM Daniel Vetter wrote:
> >
> > On Thu, Sep 02, 2021 at 07:19:01AM +0100, Anton Ivanov wrote:
> > > On 02/09/2021 06:52, Randy Dunlap wrote:
> > > > On 9/1/21 10:48 PM, Anton Ivanov wrote:
> > > > > On 02/09/
On Thu, Sep 02, 2021 at 10:57:37PM +0100, Colin King wrote:
> From: Colin Ian King
>
> There is a statement that is indented one character too deeply,
> clean this up.
>
> Signed-off-by: Colin Ian King
Queued to drm-intel-gt-next, thanks for patch.
-Daniel
> ---
> drivers/gpu/drm/i915/gt/int
On Fri, Sep 03, 2021 at 02:05:54PM +0200, Boris Brezillon wrote:
> drm_sched_job_cleanup() will pass an uninitialized fence to
> drm_sched_fence_free(), which will cause to_drm_sched_fence() to return
> a NULL fence object, causing a NULL pointer deref when this NULL object
> is passed to kmem_cach
On Fri, Sep 03, 2021 at 12:24:05PM +0100, Matthew Auld wrote:
> Currently we blow up in trace_dma_fence_init, when calling into
> get_driver_name or get_timeline_name, since both the engine and context
> might be NULL(or contain some garbage address) in the case of newly
> allocated slab objects vi
On Fri, Sep 03, 2021 at 01:00:16PM +, Simon Ser wrote:
> validate_lease expects one CRTC, one connector and one plane.
>
> Signed-off-by: Simon Ser
> Cc: Daniel Vetter
> Cc: Pekka Paalanen
> Cc: Keith Packard
Reviewed-by: Daniel Vetter
> ---
> include/uapi/drm/drm_mode.h | 3 +++
> 1 f
Hi Dave and Daniel,
here's this week's PR for drm-misc-fixes. One patch is a potential deadlock
in TTM, the other enables an additional plane in kmb. I'm slightly unhappy
that the latter one ended up in -fixes as it's not a bugfix AFAICT.
Best regards
Thomas
drm-misc-fixes-2021-09-08:
Short summ
On Fri, Sep 03, 2021 at 11:47:55AM -0700, Rob Clark wrote:
> From: Rob Clark
>
> As the finished fence is the one that is exposed to userspace, and
> therefore the one that other operations, like atomic update, would
> block on, we need to propagate the deadline from from the finished
> fence to
On Fri, Sep 03, 2021 at 11:47:56AM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
Why do you need a kthread_work here? Is this just to make sure you're
running at realtime prio? Maybe a comment to that effect would be good.
-Daniel
> ---
> drivers/gpu/drm/msm/msm_fence
On Fri, Sep 03, 2021 at 11:47:59AM -0700, Rob Clark wrote:
> From: Rob Clark
>
> The initial purpose is for igt tests, but this would also be useful for
> compositors that wait until close to vblank deadline to make decisions
> about which frame to show.
>
> Signed-off-by: Rob Clark
Needs user
Hi
Am 03.08.21 um 07:10 schrieb Sam Ravnborg:
Hi Anitha,
On Mon, Aug 02, 2021 at 08:44:26PM +, Chrisanthus, Anitha wrote:
Hi Sam,
Thanks. Where should this go, drm-misc-fixes or drm-misc-next?
Looks like a drm-misc-next candidate to me.
I may improve something for existing users, but it
On Wed, Sep 8, 2021 at 10:48 AM Daniel Vetter wrote:
>
> On Fri, Sep 03, 2021 at 11:47:56AM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > Signed-off-by: Rob Clark
>
> Why do you need a kthread_work here? Is this just to make sure you're
> running at realtime prio? Maybe a comment to that e
On Fri, Sep 03, 2021 at 11:47:58AM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
> ---
> drivers/dma-buf/dma-fence-chain.c | 13 +
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/dma-buf/dma-fence-chain.c
> b/drivers/dma-buf/dma-fence-chain.c
>
On Fri, Sep 03, 2021 at 11:47:52AM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Add a way to hint to the fence signaler of an upcoming deadline, such as
> vblank, which the fence waiter would prefer not to miss. This is to aid
> the fence signaler in making power management decisions, like boos
On Fri, Sep 03, 2021 at 11:47:57AM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
> ---
> drivers/dma-buf/dma-fence-array.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/dma-buf/dma-fence-array.c
> b/drivers/dma-buf/dma-fence-array.c
> i
On Wed, Sep 08, 2021 at 08:53:56AM -0500, Chris Morgan wrote:
> From: Chris Morgan
>
> After commit 928f9e268611 ("clk: fractional-divider: Hide
> clk_fractional_divider_ops from wide audience") was merged it appears
> that the DSI panel on my Odroid Go Advance stopped working. Upon closer
> exam
Hi
Am 07.09.21 um 13:57 schrieb Noralf Trønnes:
For devices that don't support XRGB give the user the ability to
choose what's most important: Color depth or frames per second.
Add an 'xrgb' module parameter to override the emulation format.
Assume the user wants full control if xrgb88
On Wed, Sep 8, 2021 at 10:54 AM Daniel Vetter wrote:
>
> On Fri, Sep 03, 2021 at 11:47:58AM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > Signed-off-by: Rob Clark
> > ---
> > drivers/dma-buf/dma-fence-chain.c | 13 +
> > 1 file changed, 13 insertions(+)
> >
> > diff --git a/dr
On Sun, Sep 05, 2021 at 01:27:42PM +0100, Daniel Stone wrote:
> Since there's a lot of confusion around this, document both the rules
> and the best practice around negotiating, allocating, importing, and
> using buffers when crossing context/process/device/subsystem boundaries.
>
> This ties up a
Replace the direct i2c access (i2c_smbus_* functions) with regmap APIs,
which will simplify the future update on ps8640 driver.
Signed-off-by: Philip Chen
---
drivers/gpu/drm/bridge/parade-ps8640.c | 66 +++---
1 file changed, 39 insertions(+), 27 deletions(-)
diff --git a/
Implement the first version of AUX support, which will be useful as
we expand the driver to support varied use cases.
Signed-off-by: Philip Chen
---
drivers/gpu/drm/bridge/parade-ps8640.c | 123 +
1 file changed, 123 insertions(+)
diff --git a/drivers/gpu/drm/bridge/par
On Wed, Sep 8, 2021 at 10:50 AM Daniel Vetter wrote:
>
> On Fri, Sep 03, 2021 at 11:47:59AM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > The initial purpose is for igt tests, but this would also be useful for
> > compositors that wait until close to vblank deadline to make decisions
> > ab
On Mon, Sep 06, 2021 at 10:56:27AM +1000, Ben Skeggs wrote:
> From: Ben Skeggs
>
> We don't currently have any kind of real acceleration on Ampere GPUs,
> but the TTM memcpy() fallback paths aren't really designed to handle
> copies between different devices, such as on Optimus systems, and
> res
On Tue, Sep 07, 2021 at 04:49:00AM +0200, Marek Vasut wrote:
> The mxsfb->crtc.funcs may already be NULL when unloading the driver,
> in which case calling mxsfb_irq_disable() via drm_irq_uninstall() from
> mxsfb_unload() leads to NULL pointer dereference.
>
> Since all we care about is masking th
On Tue, Sep 07, 2021 at 11:28:23AM +0200, Christian König wrote:
> Am 07.09.21 um 11:05 schrieb Daniel Vetter:
> > On Tue, Sep 07, 2021 at 08:22:20AM +0200, Christian König wrote:
> > > Added a Fixes tag and pushed this to drm-misc-fixes.
> > We're in the merge window, this should have been drm-mis
On Wed, Sep 08, 2021 at 12:14:23PM +0200, Peter Zijlstra wrote:
> On Tue, Sep 07, 2021 at 03:20:44PM +0200, Maarten Lankhorst wrote:
> > i915 will soon gain an eviction path that trylock a whole lot of locks
> > for eviction, getting dmesg failures like below:
> >
> > BUG: MAX_LOCK_DEPTH too low!
On Tue, Sep 07, 2021 at 10:08:36AM -0400, Alex Xu (Hello71) wrote:
> drivers/gpu/drm/drm_plane_helper.c: In function 'drm_primary_helper_update':
> drivers/gpu/drm/drm_plane_helper.c:113:32: error: 'visible' is used
> uninitialized [-Werror=uninitialized]
> 113 | struct drm_plane_state p
On Wed, Sep 08, 2021 at 11:19:15AM -0700, Rob Clark wrote:
> On Wed, Sep 8, 2021 at 10:54 AM Daniel Vetter wrote:
> >
> > On Fri, Sep 03, 2021 at 11:47:58AM -0700, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > Signed-off-by: Rob Clark
> > > ---
> > > drivers/dma-buf/dma-fence-chain.c | 13
On Wed, Sep 08, 2021 at 11:23:42AM -0700, Rob Clark wrote:
> On Wed, Sep 8, 2021 at 10:50 AM Daniel Vetter wrote:
> >
> > On Fri, Sep 03, 2021 at 11:47:59AM -0700, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > The initial purpose is for igt tests, but this would also be useful for
> > > comp
Clark Williams reported two issues with the i915 driver running on
PREEMPT_RT. While #1 looks simple I have no idea about #2 thus the RFC.
Sebastian
execlists_dequeue() is invoked from a function which uses
local_irq_disable() to disable interrupts so the spin_lock() behaves
like spin_lock_irq().
This breaks PREEMPT_RT because local_irq_disable() + spin_lock() is not
the same as spin_lock_irq().
execlists_dequeue_irq() and execlists_dequeue()
Disabling interrupts and invoking the irq_work function directly breaks
on PREEMPT_RT.
PREEMPT_RT does not invoke all irq_work from hardirq context because
some of the user have spinlock_t locking in the callback function.
These locks are then turned into a sleeping locks which can not be
acquired
nvkm test builds fail with the following error.
drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c:
In function 'nvkm_control_mthd_pstate_info':
drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c:60:35: error:
overflow in conversion from 'int' to '__s8' {aka 'signed char'}
Hi Thomas,
On Wed, Sep 08, 2021 at 07:50:42PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 03.08.21 um 07:10 schrieb Sam Ravnborg:
> > Hi Anitha,
> >
> > On Mon, Aug 02, 2021 at 08:44:26PM +, Chrisanthus, Anitha wrote:
> > > Hi Sam,
> > > Thanks. Where should this go, drm-misc-fixes or drm-mi
tree: git://people.freedesktop.org/~airlied/linux.git i915-uncore-vfunc
head: b42168f90718a90b11f2d52306d9aeaa9468
commit: 99aebd17891290abfca80c48eca01f4e02413fb3 [30/31] drm/i915/uncore:
constify the register vtables.
config: i386-allyesconfig (attached as .config)
compiler: gcc-9 (Debia
On Wed, Sep 8, 2021 at 11:49 AM Daniel Vetter wrote:
>
> On Wed, Sep 08, 2021 at 11:23:42AM -0700, Rob Clark wrote:
> > On Wed, Sep 8, 2021 at 10:50 AM Daniel Vetter wrote:
> > >
> > > On Fri, Sep 03, 2021 at 11:47:59AM -0700, Rob Clark wrote:
> > > > From: Rob Clark
> > > >
> > > > The initial
On Wed, Sep 08, 2021 at 11:07:07AM +0100, Tvrtko Ursulin wrote:
>
> On 07/09/2021 18:19, Matt Roper wrote:
> > The reset domain is shared between render and all compute engines,
> > so resetting one will affect the others.
> >
> > Note: Before performing a reset on an RCS or CCS engine, the GuC
On Wed, Sep 8, 2021 at 9:36 PM Rob Clark wrote:
> On Wed, Sep 8, 2021 at 11:49 AM Daniel Vetter wrote:
> > On Wed, Sep 08, 2021 at 11:23:42AM -0700, Rob Clark wrote:
> > > On Wed, Sep 8, 2021 at 10:50 AM Daniel Vetter wrote:
> > > >
> > > > On Fri, Sep 03, 2021 at 11:47:59AM -0700, Rob Clark wro
Hi,
On Sun, Sep 5, 2021 at 11:46 AM Sam Ravnborg wrote:
>
> On Wed, Sep 01, 2021 at 01:19:28PM -0700, Douglas Anderson wrote:
> > All of the "HPD" handling added to panel-simple recently was for eDP
> > panels. Remove it from panel-simple now that panel-simple-edp handles
> > eDP panels. The "pre
W dniu 08.09.2021 o 13:11, Dave Stevenson pisze:
> Hi Marek and Andrzej
>
> On Tue, 7 Sept 2021 at 22:24, Marek Vasut wrote:
>> On 9/7/21 7:29 PM, Andrzej Hajda wrote:
>>> W dniu 07.09.2021 o 16:25, Marek Vasut pisze:
On 9/7/21 9:31 AM, Andrzej Hajda wrote:
> On 07.09.2021 04:39, Marek
x27;m confused because I'm not even seeing this function anywhere in
upstream.
It is still here:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/gpu/drm/mxsfb/mxsfb_drv.c#n171
as of:
999569d59a0aa ("Add linux-next specific files for 20210908")
Is there some other tree I should be looking at ?
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