Bugzzy has different type of panel from clamshell.
So we need to add quirk to change orientation.
Signed-off-by: Jongpil Jung
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/drm_panel_orientation_quirks.c
b/dri
On 24/08/2021 18:30, Alyssa Rosenzweig wrote:
> In lock_region, simplify the calculation of the region_width parameter.
> This field is the size, but encoded as ceil(log2(size)) - 1.
> ceil(log2(size)) may be computed directly as fls(size - 1). However, we
> want to use the 64-bit versions as the a
On 24/08/2021 18:30, Alyssa Rosenzweig wrote:
> When locking memory, the base address is rounded down to the nearest
> page. The current code does not adjust the size in this case,
> truncating the lock region:
>
> Input: [size]
> Round: [size]
>
> To fix the trun
On 24/08/2021 18:26, Alyssa Rosenzweig wrote:
> Use upper_32_bits/lower_32_bits helpers instead of open-coding them.
> This is easier to scan quickly compared to bitwise manipulation, and it
> is pleasingly symmetric. I noticed this when debugging lock_region,
> which had a particularly "creative"
From: Changcheng Deng
Clean up the following includecheck warning:
./drivers/gpu/drm/i915/selftests/mock_region.c: drm/ttm/ttm_placement.h
is included more than once.
No functional change.
Reported-by: Zeal Robot
Signed-off-by: Changcheng Deng
---
drivers/gpu/drm/i915/selftests/mock_region.
Add #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
Signed-off-by: zhaoxiao
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 9f5a3023
Hi Chun-Kuang,
Thanks for the review.
On Fri, 2021-08-20 at 23:43 +0800, Chun-Kuang Hu wrote:
> Hi, Jason:
>
> jason-jh.lin 於 2021年8月19日 週四 上午10:23寫道：
> >
> > Add MERGE engine file:
> > MERGE module is used to merge two slice-per-line inputs
> > into one side-by-side output.
> >
> > Signed-of
20.08.2021 14:35, Thierry Reding пишет:
> On Fri, Aug 20, 2021 at 01:37:13AM +0300, Dmitry Osipenko wrote:
>> 19.08.2021 20:03, Thierry Reding пишет:
>>> On Tue, Aug 17, 2021 at 04:27:40AM +0300, Dmitry Osipenko wrote:
The SDHCI on Tegra belongs to the core power domain and we're going to
On 8/25/21 12:54 AM, Nathan Chancellor wrote:
Clang warns a couple of times:
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c:63:6: warning:
variable 'import_obj' is used uninitialized whenever 'if' condition is
true [-Wsometimes-uninitialized]
if (import != &obj->base) {
On 8/25/21 12:54 AM, Nathan Chancellor wrote:
Clang warns:
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c:127:13: warning:
variable 'err' is used uninitialized whenever 'if' condition is false
[-Wsometimes-uninitialized]
} else if (PTR_ERR(import) != -EOPNOTSUPP) {
Add cmdq support for mtk-mmsys config API.
The mmsys config register settings need to take effect with the other
HW settings(like OVL_ADAPTOR...) at the same vblanking time.
If we use CPU to write the mmsys reg, we can't guarantee all the
settings can be written in the same vblanking time.
Cmdq is
Add display node for vdosys1.
Signed-off-by: Nancy.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 221 +++
1 file changed, 221 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 4064a92e28a5..6ea6d0c6d840
Add vdosys1 reset control bit for MT8195 platform.
Signed-off-by: Nancy.Lin
---
include/dt-bindings/reset/mt8195-resets.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/dt-bindings/reset/mt8195-resets.h
b/include/dt-bindings/reset/mt8195-resets.h
index a26bccc8b957..e
Among other features the mmsys driver should implement a reset
controller to be able to reset different bits from their space.
For MT8195 vdosys1, many async modules need to reset after
the display pipe stops and restart.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h | 1 +
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
---
.../display/mediatek/mediatek,ethdr.yaml | 144 ++
1 file changed, 144 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
diff --git
a/Documentation/devicetree
The mmsys system controller exposes a set of memory client resets and
needs to specify the #reset-cells property in order to advertise the
number of cells needed to describe each of the resets
Signed-off-by: Nancy.Lin
---
.../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 3 +++
1
MT8195 vdosys1 merge1 to merge4 have HW mute function.
Add MERGE additional mute property description.
Signed-off-by: Nancy.Lin
---
.../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/med
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add DRM and these modules support by the patches below:
Changes in v4:
- use merge common driver for merge1~4.
- refine ovl_adaptor rdma driver.
- use ovl_adaptor ddp_comp functio
Add merge new API.
1. Vdosys1 merge1~merge4 support HW mute function, so add unmute API.
2. Add merge new advance config API. The original merge API is
mtk_ddp_comp_funcs function prototype. The API interface parameters
cannot be modified, so add a new config API for extension.
3. Add merge e
MT8195 have two mmsys. Modify drm for MT8195 multi-mmsys support.
The two mmsys (vdosys0 and vdosys1) will bring up two drm drivers,
only one drm driver register as the drm device.
Each drm driver binds its own component. The first bind drm driver
will allocate the drm device, and the last bind drm
Add ovl_adaptor driver for MT8195.
Ovl_adaptor is an encapsulated module and designed for simplified
DRM control flow. This module is composed of 8 RDMAs, 4 MERGEs and
an ETHDR. Two RDMAs merge into one layer, so this module support 4
layers.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek
Add mt8195 vdosys1 clock driver name and routing table to
the driver data of mtk-mmsys.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h| 136 +
drivers/soc/mediatek/mtk-mmsys.c | 10 ++
include/linux/soc/mediatek/mtk-mmsys.h | 2 +
3 files ch
Add mmsys config API. The config API is used for config mmsys reg.
Some mmsys regs need to be setting according to the HW engine binding
to the mmsys simultaneously.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h| 62 ++
drivers/soc/mediatek/mtk-mmsy
Add driver data of mt8195 vdosys1 to mediatek-drm and the sub driver.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 4
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 15 +++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
drivers/gpu/drm/mediatek
Add vdosys1 RDMA definition.
Signed-off-by: Nancy.Lin
---
.../display/mediatek/mediatek,mdp-rdma.yaml | 77 +++
1 file changed, 77 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
diff --git
a/Documentation/devicetre
Add mtk-mutex support for mt8195 vdosys1.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements,
so change it to support multi-bit control.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mtk-mutex.c | 270 ++-
Add MDP_RDMA driver for MT8195. MDP_RDMA is the DMA engine of
the ovl_adaptor component.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 7 +
drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 306
drivers
ETHDR is a part of ovl_adaptor.
ETHDR is designed for HDR video and graphics conversion in the external
display path. It handles multiple HDR input types and performs tone
mapping, color space/color format conversion, and then combine
different layers, output the required HDR or SDR signal to the
s
Hi,
Updated the series again to avoid recursive locking caught by the
Intel-gfx CI. Patch 5 touches a number of files, including the Intel and
VMware drivers, but most changes are simply switching a function call to
the appropriate locked/unlocked version.
Overall, this series fixes races with mo
drm_master_release can be called on a drm_file without a master, which
results in a null ptr dereference of file_priv->master->magic_map. The
three cases are:
1. Error path in drm_open_helper
drm_open():
drm_open_helper():
drm_master_open():
drm_new_set_master(); <--- returns -
drm_device.master_mutex currently protects the following:
- drm_device.master
- drm_file.master
- drm_file.was_master
- drm_file.is_master
- drm_master.unique
- drm_master.unique_len
- drm_master.magic_map
There is a clear separation between functions that read or change
these attributes. Hence, c
In a future patch, a read lock on drm_device.master_rwsem is
held in the ioctl handler before the check for ioctl
permissions. However, this inverts the lock hierarchy of
drm_global_mutex --> master_rwsem.
To avoid this, we do some prep work to grab the drm_global_mutex
before checking for ioctl p
In drm_client_modeset.c and drm_fb_helper.c,
drm_master_internal_{acquire,release} are used to avoid races with DRM
userspace. These functions hold onto drm_device.master_rwsem while
committing, and bail if there's already a master.
However, there are other places where modesetting rights can race
Dear all,
The following patchset is a reimplementation of the patch sent by Jitao
Shi [1] some time ago. As suggested by Chun-Kuang Hu, this time the
reset is done using the reset API, where the mmsys driver is the reset
controller and the mtk_dsi driver is the reset consumer.
Note that the first
Reset dsi0 HW to default when power on. This prevents to have different
settingis between the bootloader and the kernel.
As not all Mediatek boards have the reset consumer configured in their
board description, also is not needed on all of them, the reset is optional,
so the change is compatible w
Update device tree binding documentation for the dsi to add the optional
property to reset the dsi controller.
Signed-off-by: Enric Balletbo i Serra
Acked-by: Rob Herring
---
(no changes since v2)
Changes in v2:
- Added a new patch to describe the dsi reset optional property.
.../devicetree/
__drm_mode_object_find checks if the given drm file holds the required
lease on a object by calling _drm_lease_held. _drm_lease_held in turn
uses drm_file_get_master to access drm_file.master.
However, in a future patch, the drm_file.master_lookup_lock in
drm_file_get_master will be replaced by dr
drm_lease_held calls drm_file_get_master. However, this function is
sometimes called while holding on to modeset_mutex. Since
drm_device.master_rwsem will replace drm_file.master_lookup_lock in
drm_file_get_master in a future patch, this inverts the master_rwsem
--> modeset_mutex lock hierarchy.
T
Previously, master_lookup_lock was introduced in
commit 0b0860a3cf5e ("drm: serialize drm_file.master with a new
spinlock") to serialize accesses to drm_file.master. This then allowed
us to write drm_file_get_master in commit 56f0729a510f ("drm: protect
drm_master pointers in drm_lease.c").
The ra
On 27/07/2021 01:23, Matthew Brost wrote:
When using GuC submission, if a context gets banned disable scheduling
and mark all inflight requests as complete.
Cc: John Harrison
Signed-off-by: Matthew Brost
Reviewed-by: John Harrison
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
Hi,
On Wed, 2021-08-25 at 18:05 +0800, Nancy.Lin wrote:
> Among other features the mmsys driver should implement a reset
> controller to be able to reset different bits from their space.
>
> For MT8195 vdosys1, many async modules need to reset after
> the display pipe stops and restart.
>
> Sign
On 8/25/21 05:48, Alex Sierra wrote:
> From: Ralph Campbell
>
> ZONE_DEVICE struct pages have an extra reference count that complicates the
> code for put_page() and several places in the kernel that need to check the
> reference count to see that a page is not being used (gup, compaction,
> migr
From: Colin Ian King
There is a spelling mistake in a DC_LOG_WARNING message. Fix it.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.
https://bugzilla.kernel.org/show_bug.cgi?id=211277
--- Comment #37 from James Zhu (jam...@amd.com) ---
HiJerome and kolAflash,
would you mind base on your original test configuration,and add pci=noats in
boot parameter? for example:
linux /boot/vmlinuz-5.4.0-54-generic
root=UUID=803844cc-7291-
Am 25.08.21 um 14:18 schrieb Jason Gunthorpe:
On Wed, Aug 25, 2021 at 08:17:51AM +0200, Christian König wrote:
The only real option where you could do P2P with buffer pinning are those
compute boards where we know that everything is always accessible to
everybody and we will never need to migra
On Wed, Aug 25, 2021 at 02:27:08PM +0200, Christian König wrote:
> Am 25.08.21 um 14:18 schrieb Jason Gunthorpe:
> > On Wed, Aug 25, 2021 at 08:17:51AM +0200, Christian König wrote:
> >
> > > The only real option where you could do P2P with buffer pinning are those
> > > compute boards where we kn
On Wed, Aug 25, 2021 at 08:17:51AM +0200, Christian König wrote:
> The only real option where you could do P2P with buffer pinning are those
> compute boards where we know that everything is always accessible to
> everybody and we will never need to migrate anything. But even then you want
> some
Hi
Am 24.08.21 um 20:17 schrieb Amanoel Dawod:
Thanks for your reply.
This is on x86 platform. Specifically, Gigabyte B450i board with AMD Ryzen 3400G
(integrated graphics). Up to date bios version.
Resolution is 3840 x 2160.
Simpledrm is probably slow with this resolution, but that's an un
On Wed, Aug 25, 2021 at 07:59:27AM +0300, Maor Gottlieb wrote:
>
> On 8/24/2021 10:12 PM, Jason Gunthorpe wrote:
> > On Tue, Aug 24, 2021 at 05:25:30PM +0300, Maor Gottlieb wrote:
> > > @@ -514,11 +531,13 @@ struct scatterlist
> > > *sg_alloc_append_table_from_pages(struct sg_table *sgt,
> > >
> > In practice, the current callers pass PAGE_SIZE aligned inputs, avoiding
> > the bug. Therefore this doesn't need to be backported. Still, that's a
> > happy accident and not a precondition of lock_region, so we let's do the
> > right thing to future proof.
>
> Actually it's worse than that du
On 2021-08-25 7:36 a.m., Colin King wrote:
> From: Colin Ian King
>
> There is a spelling mistake in a DC_LOG_WARNING message. Fix it.
>
> Signed-off-by: Colin Ian King
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 2 +-
> 1 file changed,
Sorry for the noise. Sending out a new version because the Intel-gfx CI
caught that __drm_mode_object_find has to be exported for loadable
modules like the Intel and VMware DRM drivers.
Hi,
Updated the series again to avoid recursive locking caught by the
Intel-gfx CI. Patch 5 touches a number of
drm_master_release can be called on a drm_file without a master, which
results in a null ptr dereference of file_priv->master->magic_map. The
three cases are:
1. Error path in drm_open_helper
drm_open():
drm_open_helper():
drm_master_open():
drm_new_set_master(); <--- returns -
drm_device.master_mutex currently protects the following:
- drm_device.master
- drm_file.master
- drm_file.was_master
- drm_file.is_master
- drm_master.unique
- drm_master.unique_len
- drm_master.magic_map
There is a clear separation between functions that read or change
these attributes. Hence, c
In a future patch, a read lock on drm_device.master_rwsem is
held in the ioctl handler before the check for ioctl
permissions. However, this inverts the lock hierarchy of
drm_global_mutex --> master_rwsem.
To avoid this, we do some prep work to grab the drm_global_mutex
before checking for ioctl p
In drm_client_modeset.c and drm_fb_helper.c,
drm_master_internal_{acquire,release} are used to avoid races with DRM
userspace. These functions hold onto drm_device.master_rwsem while
committing, and bail if there's already a master.
However, there are other places where modesetting rights can race
__drm_mode_object_find checks if the given drm file holds the required
lease on a object by calling _drm_lease_held. _drm_lease_held in turn
uses drm_file_get_master to access drm_file.master.
However, in a future patch, the drm_file.master_lookup_lock in
drm_file_get_master will be replaced by dr
drm_lease_held calls drm_file_get_master. However, this function is
sometimes called while holding on to modeset_mutex. Since
drm_device.master_rwsem will replace drm_file.master_lookup_lock in
drm_file_get_master in a future patch, this inverts the master_rwsem
--> modeset_mutex lock hierarchy.
T
Previously, master_lookup_lock was introduced in
commit 0b0860a3cf5e ("drm: serialize drm_file.master with a new
spinlock") to serialize accesses to drm_file.master. This then allowed
us to write drm_file_get_master in commit 56f0729a510f ("drm: protect
drm_master pointers in drm_lease.c").
The ra
Am 25.08.21 um 14:38 schrieb Jason Gunthorpe:
On Wed, Aug 25, 2021 at 02:27:08PM +0200, Christian König wrote:
Am 25.08.21 um 14:18 schrieb Jason Gunthorpe:
On Wed, Aug 25, 2021 at 08:17:51AM +0200, Christian König wrote:
The only real option where you could do P2P with buffer pinning are tho
On Thu, 19 Aug 2021, Ville Syrjälä wrote:
> On Fri, Aug 13, 2021 at 01:43:20PM +0300, Jani Nikula wrote:
>> Extend the use of extended receiver cap at 0x2200 to cover
>> MAIN_LINK_CHANNEL_CODING_CAP in 0x2206, in case an implementation hides
>> the DP 2.0 128b/132b channel encoding cap.
>>
>> Cc:
On 25/08/2021 15:07, Alyssa Rosenzweig wrote:
>>> In practice, the current callers pass PAGE_SIZE aligned inputs, avoiding
>>> the bug. Therefore this doesn't need to be backported. Still, that's a
>>> happy accident and not a precondition of lock_region, so we let's do the
>>> right thing to futur
Am 2021-08-24 um 11:48 p.m. schrieb Alex Sierra:
> In this case, this is used to migrate pages from device memory, back to
> system memory. This particular device memory type should be accessible
> by the CPU, through IOMEM access. Typically, zone device public type
> memory falls into this categor
drm_gem_cma_mmap() cannot assume every implementation of dma_mmap_wc()
will end up calling remap_pfn_range() (which happens to set the relevant
vma flag, among others), so in order to make sure expectations around
VM_DONTEXPAND are met, let it explicitly set the flag like most other
GEM mmap implem
Am 2021-08-24 um 11:48 p.m. schrieb Alex Sierra:
> When CPU is connected throug XGMI, it has coherent
> access to VRAM resource. In this case that resource
> is taken from a table in the device gmc aperture base.
> This resource is used along with the device type, which could
> be DEVICE_PRIVATE or
On Wed, Aug 25, 2021 at 03:51:14PM +0200, Christian König wrote:
> Am 25.08.21 um 14:38 schrieb Jason Gunthorpe:
> > On Wed, Aug 25, 2021 at 02:27:08PM +0200, Christian König wrote:
> > > Am 25.08.21 um 14:18 schrieb Jason Gunthorpe:
> > > > On Wed, Aug 25, 2021 at 08:17:51AM +0200, Christian König
1. Add mediatek,dsc.yaml to describe DSC module in details.
2. Add mt8195 SoC binding to mediatek,dsc.yaml.
Signed-off-by: jason-jh.lin
---
.../display/mediatek/mediatek,dsc.yaml| 70 +++
1 file changed, 70 insertions(+)
create mode 100644
Documentation/devicetree/bindi
There are 2 mmsys, namely vdosys0 and vdosys1 in mt8195.
Each of them is bound to a display pipeline, so add their
definition in mtk-mmsys documentation with 2 compatibles.
Signed-off-by: jason-jh.lin
---
this patch is base on [1][2]
[1] dt-bindings: arm: mediatek: mmsys: convert to YAML format
Remove the unsed define in mtk_drm_ddp_comp.c
Signed-off-by: jason-jh.lin
---
rebase on [1] series
[1] drm/mediatek: Separate aal module
- https://patchwork.kernel.org/project/linux-mediatek/list/?series=516463
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 10 --
1 file changed, 10 d
Power:
1. Add description for power-domains property.
GCE:
1. Add description for mboxes property.
2. Add description for mediatek,gce-client-reg property.
Signed-off-by: jason-jh.lin
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 28 ++-
1 file changed, 27 insertions(+), 1
DSC is designed for real-time systems with real-time compression,
transmission, decompression and display.
The DSC standard is a specification of the algorithms used for
compressing and decompressing image display streams, including
the specification of the syntax and semantics of the compressed
vi
Add display node for vdosys0.
Signed-off-by: jason-jh.lin
---
This patch is based on [1][2][3]
[1]arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile
-
https://patchwork.kernel.org/project/linux-mediatek/patch/20210601075350.31515-2-seiya.w...@mediatek.com/
[2]arm64: dts:
Change in v9:
- seperate power and gce properties of mmsys into another dt-binding patch
- rebase on "Separate aal module" series
https://patchwork.kernel.org/project/linux-mediatek/list/?series=516463
- keep mtk_ddp_clk_enable/disable in the same place
- change mtk_dsc_start config register to m
Add mt8195 vdosys0 clock driver name and routing table to
the driver data of mtk-mmsys.
Signed-off-by: jason-jh.lin
---
This patch is base on [1][2]
[1] soc: mediatek: mmsys: add MT8365 support
-
https://patchwork.kernel.org/project/linux-mediatek/patch/20210519161847.3747352-3-fpar...@baylibre.
Add mtk-mutex support for mt8195 vdosys0.
Signed-off-by: jason-jh.lin
---
drivers/soc/mediatek/mtk-mutex.c | 98 +++-
1 file changed, 95 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index 2e4bcc300576.
1. Add mt8195 SoC binding to AAL, CCORR, COLOR, DITHER, GAMMA, MERGE,
MUTEX, OVL and RDMA yaml schema.
2. Add MERGE additional property description for mt8195
- async clock
- fifo setting enable
- reset controller
Signed-off-by: jason-jh.lin
---
.../display/mediatek/mediatek,aal.yaml
Add DISP_REG prefix for the define of register offset to
make the difference from the define of register value.
Signed-off-by: jason-jh.lin
---
rebase on [1] series
[1] drm/mediatek: Separate aal module
- https://patchwork.kernel.org/project/linux-mediatek/list/?series=516463
---
drivers/gpu/drm
Add driver data of mt8195 vdosys0 to mediatek-drm and the sub driver.
Signed-off-by: jason-jh.lin
---
rebase on [1] series
[1] drm/mediatek: Separate aal module
- https://patchwork.kernel.org/project/linux-mediatek/list/?series=516463
---
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 6 +
dri
Add MERGE engine file:
MERGE module is used to merge two slice-per-line inputs
into one side-by-side output.
Signed-off-by: jason-jh.lin
---
drivers/gpu/drm/mediatek/Makefile | 1 +
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 8 +
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 239
Am 2021-08-24 um 11:48 p.m. schrieb Alex Sierra:
> Ref counter from device pages is init to zero during memmap init zone.
> The first time a new device page is allocated to migrate data into it,
> its ref counter needs to be initialized to one.
>
> Signed-off-by: Alex Sierra
> ---
> drivers/gpu/d
1. Remove mediatek,dislpay.txt
2. Split each display function block to individual yaml file.
Signed-off-by: jason-jh.lin
---
.../display/mediatek/mediatek,aal.yaml| 75 ++
.../display/mediatek/mediatek,ccorr.yaml | 69 ++
.../display/mediatek/mediatek,color.yaml | 84
Adjust to the alphabetic order for the define, function, struct
and array in mediatek-drm driver
Signed-off-by: jason-jh.lin
---
rebase on [1] series
[1] drm/mediatek: Separate aal module
- https://patchwork.kernel.org/project/linux-mediatek/list/?series=516463
---
drivers/gpu/drm/mediatek/mtk_d
On Tue, 27 Jul 2021, Daniel Vetter wrote:
> +static void __exit i915_exit(void)
> +{
> + int i;
> +
> + for (i = init_progress - 1; i >= 0; i--) {
> + GEM_BUG_ON(i >= ARRAY_SIZE(init_funcs));
Not introduced by you, but it's kind of silly we're using GEM_BUG_ON()
in generic dri
> > Horrifying, and not what I wanted to read my last day before 2 weeks of
> > leave. Let's drop this patch, hopefully by the time I'm back, your
> > friends in GPU can confirm that's a spec bug and not an actual
> > hardware/driver one...
> >
> > Can you apply the other 3 patches in the mean tim
Am 25.08.21 um 16:47 schrieb Jason Gunthorpe:
On Wed, Aug 25, 2021 at 03:51:14PM +0200, Christian König wrote:
Am 25.08.21 um 14:38 schrieb Jason Gunthorpe:
On Wed, Aug 25, 2021 at 02:27:08PM +0200, Christian König wrote:
Am 25.08.21 um 14:18 schrieb Jason Gunthorpe:
On Wed, Aug 25, 2021 at 0
On Tue, Aug 24, 2021 at 10:48:15PM -0500, Alex Sierra wrote:
> From: Ralph Campbell
>
> There are several places where ZONE_DEVICE struct pages assume a reference
> count == 1 means the page is idle and free. Instead of open coding this,
> add a helper function to hide this detail.
>
> Signed-of
Use upper_32_bits/lower_32_bits helpers instead of open-coding them.
This is easier to scan quickly compared to bitwise manipulation, and it
is pleasingly symmetric. I noticed this when debugging lock_region,
which had a particularly "creative" way of writing upper_32_bits.
v2: Use helpers for one
22.08.2021 21:35, Dmitry Osipenko пишет:
> 20.08.2021 08:18, Viresh Kumar пишет:
>> On 19-08-21, 16:55, Ulf Hansson wrote:
>>> Right, that sounds reasonable.
>>>
>>> We already have pm_genpd_opp_to_performance_state() which translates
>>> an OPP to a performance state. This function invokes the
>>>
On Wed, Aug 25, 2021 at 05:14:06PM +0200, Christian König wrote:
> Yeah, that's exactly what I'm talking about by adding cgroup or similar. You
> need a knob to control this.
We have the pinned memory ulimit today.
A pinned memory cgroup might be interesting, but even containrs are
covered under
On Tue, Aug 24, 2021 at 10:48:15PM -0500, Alex Sierra wrote:
> From: Ralph Campbell
>
> There are several places where ZONE_DEVICE struct pages assume a reference
> count == 1 means the page is idle and free. Instead of open coding this,
> add a helper function to hide this detail.
>
> Signed-of
On Wed, Aug 25, 2021 at 6:14 PM Christian König
wrote:
>
> Am 25.08.21 um 16:47 schrieb Jason Gunthorpe:
> > On Wed, Aug 25, 2021 at 03:51:14PM +0200, Christian König wrote:
> >> Am 25.08.21 um 14:38 schrieb Jason Gunthorpe:
> >>> On Wed, Aug 25, 2021 at 02:27:08PM +0200, Christian König wrote:
>
https://bugzilla.kernel.org/show_bug.cgi?id=205089
--- Comment #20 from Alois Nespor (i...@aloisnespor.info) ---
(In reply to Alois Nespor from comment #15)
> i can confirm, have same problem now with Ryzen 5 3400G (RX Vega 11).
>
> kernel 5.13.4 and mesa 21.1.5
seems fixed with linux-firmware 2
On Tue, 2021-08-24 at 18:48 +0200, Hans de Goede wrote:
> Hi,
>
> On 8/24/21 10:45 AM, Jani Nikula wrote:
> > On Fri, 20 Aug 2021, Hans de Goede wrote:
> > > Hello drm-misc and drm-intel maintainers,
> > >
> > > My "Add support for out-of-band hotplug notification" patchset:
> > > https://patchw
On 2021-07-27 15:44, Lyude Paul wrote:
Nice timing, you literally got me as I was 2 minutes away from leaving
work
for the day :P. I will go ahead and push it now.
Hi Lyude,
Had you pushed this patch yet?
We still did not see this patch at msm-nex and v5.10 branch.
Thanks,
BTW - in the futu
On 2021-08-25 2:43 a.m., Christian König wrote:
Am 24.08.21 um 23:01 schrieb Andrey Grodzovsky:
Handle all DMA IOMMU group related dependencies before the
group is removed and we try to access it after free.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
In preparation for FORTIFY_SOURCE performing compile-time and run-time
field bounds checking for memcpy(), memmove(), and memset(), avoid
intentionally writing across neighboring fields.
The "Board Parameters" members of the structs:
struct atom_smc_dpm_info_v4_5
struct atom_smc_dp
The patch was pushed yes (was part of drm-misc-next-2021-07-29), seems like it
just hasn't trickled down to linus's branch quite yet.
On Wed, 2021-08-25 at 09:06 -0700, khs...@codeaurora.org wrote:
> On 2021-07-27 15:44, Lyude Paul wrote:
> > Nice timing, you literally got me as I was 2 minutes aw
Applied. Thanks!
Alex
On Wed, Aug 25, 2021 at 10:09 AM Harry Wentland wrote:
>
> On 2021-08-25 7:36 a.m., Colin King wrote:
> > From: Colin Ian King
> >
> > There is a spelling mistake in a DC_LOG_WARNING message. Fix it.
> >
> > Signed-off-by: Colin Ian King
>
> Reviewed-by: Harry Wentland
On 8/18/2021 11:16 PM, Matthew Brost wrote:
Rework and simplify the locking with GuC subission. Drop
sched_state_no_lock and move all fields under the guc_state.sched_state
and protect all these fields with guc_state.lock . This requires
changing the locking hierarchy from guc_state.lock -> sc
https://bugzilla.kernel.org/show_bug.cgi?id=211277
--- Comment #38 from Jerome C (m...@jeromec.com) ---
Hi James,
With "pci=noats" set the suspension and resume works fine
I did see some errors ( something about device not added ) in the kernel
log from "kfd" but I guess that's related to PCIe A
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