[PATCH 03/33] drm/i915: Hold reference to intel_context over life of i915_request

2021-07-26 Thread Matthew Brost
Hold a reference to the intel_context over life of an i915_request. Without this an i915_request can exist after the context has been destroyed (e.g. request retired, context closed, but user space holds a reference to the request from an out fence). In the case of GuC submission + virtual engine,

[PATCH 09/33] drm/i915: Reset GPU immediately if submission is disabled

2021-07-26 Thread Matthew Brost
If submission is disabled by the backend for any reason, reset the GPU immediately in the heartbeat code as the backend can't be reenabled until the GPU is reset. Signed-off-by: Matthew Brost Reviewed-by: John Harrison --- .../gpu/drm/i915/gt/intel_engine_heartbeat.c | 62 +++

[PATCH 11/33] drm/i915/guc: Suspend/resume implementation for new interface

2021-07-26 Thread Matthew Brost
The new GuC interface introduces an MMIO H2G command, INTEL_GUC_ACTION_RESET_CLIENT, which is used to implement suspend. This MMIO tears down any active contexts generating a context reset G2H CTB for each. Once that step completes the GuC tears down the CTB channels. It is safe to suspend once thi

[PATCH 23/33] drm/i915/guc: Add golden context to GuC ADS

2021-07-26 Thread Matthew Brost
From: John Harrison The media watchdog mechanism involves GuC doing a silent reset and continue of the hung context. This requires the i915 driver provide a golden context to GuC in the ADS. v2: (Matthew Brost): - Fix memory corruption in shmem_read (John H) - Use locals rather than define

[PATCH 18/33] drm/i915/guc: Capture error state on context reset

2021-07-26 Thread Matthew Brost
We receive notification of an engine reset from GuC at its completion. Meaning GuC has potentially cleared any HW state we may have been interested in capturing. GuC resumes scheduling on the engine post-reset, as the resets are meant to be transparent, further muddling our error state. There is o

[PATCH 27/33] drm/i915/selftest: Fix workarounds selftest for GuC submission

2021-07-26 Thread Matthew Brost
From: Rahul Kumar Singh When GuC submission is enabled, the GuC controls engine resets. Rather than explicitly triggering a reset, the driver must submit a hanging context to GuC and wait for the reset to occur. Signed-off-by: Rahul Kumar Singh Signed-off-by: John Harrison Signed-off-by: Matth

[PATCH 29/33] drm/i915/selftest: Increase some timeouts in live_requests

2021-07-26 Thread Matthew Brost
Requests may take slightly longer with GuC submission, let's increase the timeouts in live_requests. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/selftests/i915_request.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/selftests/i915_request.

[PATCH 33/33] drm/i915/guc: Unblock GuC submission on Gen11+

2021-07-26 Thread Matthew Brost
From: Daniele Ceraolo Spurio Unblock GuC submission on Gen11+ platforms. v2: (Martin Peres / John H) - Delete debug message when GuC is disabled by default on certain platforms Signed-off-by: Michal Wajdeczko Signed-off-by: Daniele Ceraolo Spurio Signed-off-by: Matthew Brost Reviewed-

[PATCH 19/33] drm/i915/guc: Fix for error capture after full GPU reset with GuC

2021-07-26 Thread Matthew Brost
From: John Harrison In the case of a full GPU reset (e.g. because GuC has died or because GuC's hang detection has been disabled), the driver can't rely on GuC reporting the guilty context. Instead, the driver needs to scan all active contexts and find one that is currently executing, as per the

[PATCH 16/33] drm/i915/guc: Don't complain about reset races

2021-07-26 Thread Matthew Brost
From: John Harrison It is impossible to seal all race conditions of resets occurring concurrent to other operations. At least, not without introducing excesive mutex locking. Instead, don't complain if it occurs. In particular, don't complain if trying to send a H2G during a reset. Whatever the H

Re: [PATCH v2] arm64: dts: qcom: sc7280: Add gpu support

2021-07-26 Thread Stephen Boyd
Quoting Akhil P Oommen (2021-07-24 10:29:00) > Add the necessary dt nodes for gpu support in sc7280. > > Signed-off-by: Akhil P Oommen > --- > This patch has dependency on the GPUCC bindings patch here: > https://patchwork.kernel.org/project/linux-arm-msm/patch/1619519590-3019-4-git-send-email-t..

[PATCH v6] drm/msm/dp: add logs across DP driver for ease of debugging

2021-07-26 Thread maitreye
From: Maitreyee Rao Add trace points across the MSM DP driver to help debug interop issues. Changes in v2: - Got rid of redundant log messages. - Added %#x instead of 0x%x wherever required. - Got rid of __func__ calls in debug messages. - Added newline wherever missing. Changes in v3: - G

Re: [PATCH v5] drm/msm/dp: add logs across DP driver for ease of debugging

2021-07-26 Thread maitreye
Thank you Stephen for reviewing. On 2021-07-26 14:31, Stephen Boyd wrote: Quoting maitreye (2021-07-26 10:36:26) @@ -509,6 +515,7 @@ static int dp_display_usbpd_attention_cb(struct device *dev) DRM_ERROR("invalid dev\n"); return -EINVAL; } + DRM_DE

Re: [RESEND PATCH v6 14/14] drm/print: Add tracefs support to the drm logging helpers

2021-07-26 Thread Rodrigo Siqueira
On 07/21, Sean Paul wrote: > From: Sean Paul > > This patch adds a new module parameter called drm.trace which accepts > the same mask as drm.debug. When a debug category is enabled, log > messages will be put in a new tracefs instance called drm for > consumption. > > Using the new tracefs inst

[PATCH v4 0/4] drm/amd/display: Introduce FPU directory inside DC

2021-07-26 Thread Rodrigo Siqueira
Hi, In the display core, we utilize floats and doubles units for calculating modesetting parameters. One side effect of our approach to use double-precision is the fact that we spread multiple FPU access across our driver, which means that we can accidentally clobber user space FPU state. # Chal

[PATCH v4 2/4] drm/amd/display: Add control mechanism for FPU

2021-07-26 Thread Rodrigo Siqueira
DC invokes DC_FPU_START/END in multiple parts of the code; this can create a situation where we invoke this FPU operation in a nested way or exit too early. For avoiding this situation, this commit adds a mechanism where dc_fpu_begin/end manages the access to kernel_fpu_begin/end. Change since V3:

[PATCH v4 4/4] drm/amd/display: Add DC_FP helper to check FPU state

2021-07-26 Thread Rodrigo Siqueira
To fully isolate FPU operations in a single place, we must avoid situations where compilers spill FP values to registers due to FP enable in a specific C file. Note that even if we isolate all FPU functions in a single file and call its interface from other files, the compiler might enable the use

[PATCH v4 1/4] drm/amd/display: Move specific DCN2x code that uses FPU to DML

2021-07-26 Thread Rodrigo Siqueira
The display core files rely on FPU, which requires to be compiled with special flags. Ideally, we don't want these FPU operations spread around the DC code; nevertheless, it happens in the current source. This commit introduces a new directory inside DML for centralizing shared DCN functions that r

[PATCH v4 3/4] drm/amd/display: Add control mechanism for FPU utilization

2021-07-26 Thread Rodrigo Siqueira
DC invokes DC_FPU_START/END in multiple parts of the code; this can create a situation where we invoke this FPU operation in a nested way or exit too early. For avoiding this situation, this commit adds a mechanism where dc_fpu_begin/end manages the access to kernel_fpu_begin/end. Change since V3:

[PATCH 0/2] Add support for querying hw info that UMDs need

2021-07-26 Thread John . C . Harrison
From: John Harrison Various UMDs require hardware configuration information about the current platform. A bunch of static information is available in a fixed table that can be retrieved from the GuC. Test-with: 20210727002812.43469-2-john.c.harri...@intel.com UMD: https://github.com/intel/comput

[PATCH 2/2] drm/i915/uapi: Add query for hwconfig table

2021-07-26 Thread John . C . Harrison
From: Rodrigo Vivi GuC contains a consolidated table with a bunch of information about the current device. Previously, this information was spread and hardcoded to all the components including GuC, i915 and various UMDs. The goal here is to consolidate the data into GuC in a way that all interes

[PATCH 1/2] drm/i915/guc: Add fetch of hwconfig table

2021-07-26 Thread John . C . Harrison
From: John Harrison Implement support for fetching the hardware description table from the GuC. The call is made twice - once without a destination buffer to query the size and then a second time to fill in the buffer. Note that the table is only available on ADL-P and later platforms. Cc: Mich

[PATCH v3] drm/dsi: Add _NO_ to MIPI_DSI_* flags disabling features

2021-07-26 Thread Nicolas Boichat
Many of the DSI flags have names opposite to their actual effects, e.g. MIPI_DSI_MODE_EOT_PACKET means that EoT packets will actually be disabled. Fix this by including _NO_ in the flag names, e.g. MIPI_DSI_MODE_NO_EOT_PACKET. Signed-off-by: Nicolas Boichat Reviewed-by: Linus Walleij Reviewed-by

Re: [Internet]Re: [PATCH] fbcon: Out-Of-Bounds write in sys_imageblit, add range check

2021-07-26 Thread 腾讯云内核开发者
yres and vyres can be controlled by user mode paramaters, and cause p->vrows to become a negative value. While this value be passed to real_y function, the ypos will be out of screen range. This is an out-of-bounds write bug. I think updatescrollmode is the right place to validate values supplied

[PATCH 1/2] drm/i915/guc: Add fetch of hwconfig table

2021-07-26 Thread John . C . Harrison
From: John Harrison Implement support for fetching the hardware description table from the GuC. The call is made twice - once without a destination buffer to query the size and then a second time to fill in the buffer. Note that the table is only available on ADL-P and later platforms. Cc: Mich

[PATCH 0/2] Add support for querying hw info that UMDs need

2021-07-26 Thread John . C . Harrison
From: John Harrison Various UMDs require hardware configuration information about the current platform. A bunch of static information is available in a fixed table that can be retrieved from the GuC. Test-with: 20210727002812.43469-2-john.c.harri...@intel.com UMD: https://github.com/intel/comput

[PATCH 2/2] drm/i915/uapi: Add query for hwconfig table

2021-07-26 Thread John . C . Harrison
From: Rodrigo Vivi GuC contains a consolidated table with a bunch of information about the current device. Previously, this information was spread and hardcoded to all the components including GuC, i915 and various UMDs. The goal here is to consolidate the data into GuC in a way that all interes

Re: [PATCH v1 1/5] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding

2021-07-26 Thread Jason-JH Lin
Hi Enric, On Mon, 2021-07-26 at 12:08 +0200, Enric Balletbo Serra wrote: > Hi Jason, > > Missatge de Jason-JH Lin del dia dl., 26 > de jul. 2021 a les 9:02: > > > > On Fri, 2021-07-23 at 13:13 +0200, Enric Balletbo Serra wrote: > > > Hi Jason, > > > > > > Thank you for your patch. > > > > > >

[PATCH 1/1] drm/i915/selftests: Increase timeout in i915_gem_contexts selftests

2021-07-26 Thread Matthew Brost
Like in the case of several other selftests, generating lots of requests in a loop takes a bit longer with GuC submission. Increase a timeout in i915_gem_contexts selftest to take this into account. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 2 +- 1

[PATCH 0/1] Increase timeout in i915_gem_contexts selftests

2021-07-26 Thread Matthew Brost
Patch says it all. Seeing a failure in CI [1] and locally on certain TGL machines with GuC submission enabled. Let's fix this so we can enable CI on TGL with GuC submission. Signed-off-by: Matthew Brost [1] https://patchwork.freedesktop.org/series/92984/#rev4 Matthew Brost (1): drm/i915/selft

Re: [PATCH] drm/msm: Fix display fault handling

2021-07-26 Thread Bjorn Andersson
On Wed 07 Jul 11:01 PDT 2021, Rob Clark wrote: > From: Rob Clark > > It turns out that when the display is enabled by the bootloader, we can > get some transient iommu faults from the display. Which doesn't go over > too well when we install a fault handler that is gpu specific. To avoid > thi

[PATCH] efi: sysfb_efi: fix build when EFI is not set

2021-07-26 Thread Randy Dunlap
/sysfb_efi.c |2 ++ 1 file changed, 2 insertions(+) --- linext-20210726.orig/drivers/firmware/efi/sysfb_efi.c +++ linext-20210726/drivers/firmware/efi/sysfb_efi.c @@ -332,6 +332,7 @@ static const struct fwnode_operations ef .add_links = efifb_add_links, }; +#ifdef CONFIG_EFI static struct

[PATCH] drm/pl111: Remove unused including

2021-07-26 Thread Cai Huoqing
Remove including that don't need it. Signed-off-by: Cai Huoqing --- drivers/gpu/drm/pl111/pl111_display.c | 1 - drivers/gpu/drm/pl111/pl111_drv.c | 1 - 2 files changed, 2 deletions(-) diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index b5a885

Re: [Internet]Re: [PATCH] fbcon: Out-Of-Bounds write in sys_imageblit, add range check

2021-07-26 Thread gre...@linuxfoundation.org
On Tue, Jul 27, 2021 at 01:53:13AM +, tcs_kernel(腾讯云内核开发者) wrote: > yres and vyres can be controlled by user mode paramaters, and cause p->vrows > to become a negative value. While this value be passed to real_y function, > the ypos will be out of screen range. > This is an out-of-bounds writ

Re: [PATCH 04/30] drm/i915/display: remove explicit CNL handling from intel_cdclk.c

2021-07-26 Thread Lucas De Marchi
On Sat, Jul 24, 2021 at 11:12:07AM -0700, Matt Roper wrote: On Fri, Jul 23, 2021 at 05:10:48PM -0700, Lucas De Marchi wrote: The only real platform with DISPLAY_VER == 10 is GLK, so we don't need any checks and supporting code for CNL. Remove code and rename functions/macros accordingly. Signed

Re: [PATCH v4 1/4] drm/amd/display: Move specific DCN2x code that uses FPU to DML

2021-07-26 Thread Christian König
Am 27.07.21 um 02:52 schrieb Rodrigo Siqueira: The display core files rely on FPU, which requires to be compiled with special flags. Ideally, we don't want these FPU operations spread around the DC code; nevertheless, it happens in the current source. This commit introduces a new directory inside

Re: [PATCH v4 2/4] drm/amd/display: Add control mechanism for FPU

2021-07-26 Thread Christian König
Am 27.07.21 um 02:52 schrieb Rodrigo Siqueira: DC invokes DC_FPU_START/END in multiple parts of the code; this can create a situation where we invoke this FPU operation in a nested way or exit too early. For avoiding this situation, this commit adds a mechanism where dc_fpu_begin/end manages the

Re: [Intel-gfx] [PATCH 30/30] drm/i915: switch num_scalers/num_sprites to consider DISPLAY_VER

2021-07-26 Thread Lucas De Marchi
On Mon, Jul 26, 2021 at 06:13:10AM -0400, Rodrigo Vivi wrote: On Fri, Jul 23, 2021 at 05:11:14PM -0700, Lucas De Marchi wrote: The numbers of scalers and sprites depend on the display version, so use it instead of GRAPHICS_VER. We were mixing both, which let me confused while removing CNL and GR

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