On Thu, 1 Jul 2021 21:28:06 +0200
Daniel Vetter wrote:
> On Thu, Jul 1, 2021 at 8:27 PM Martin Peres wrote:
> >
> > On 01/07/2021 11:14, Pekka Paalanen wrote:
> > > On Wed, 30 Jun 2021 11:58:25 -0700
> > > John Harrison wrote:
> > >
> > >> On 6/30/2021 01:22, Martin Peres wrote:
> > >>> O
The bochs driver is only ~600 lines of code. Putting it into tiny/
cleans up the DRM directory slightly. Some style problems were fixed
and unneeded include statements were removed. No functional changes.
v2:
* make bochs_mode_funcs static (Daniel, kernel test robot)
* rebase onto
All GEM-VRAM-based drivers use auto-cleanup via drmm_vram_helper_init().
Unexport the manual APIs and make them internal implementation.
Signed-off-by: Thomas Zimmermann
Acked-by: Daniel Vetter
---
drivers/gpu/drm/drm_gem_vram_helper.c | 9 +++--
include/drm/drm_gem_vram_helper.h | 4 --
Move the bochs driver to tiny/ and simplify the clean-up code. Also
update GEM VRAM helpers accordingly.
v2:
* make bochs_mode_funcs static (Daniel, kernel test robot)
Thomas Zimmermann (3):
drm/bochs: Move to tiny/
drm/bochs: Use managed initialization for GEM VRAM helpers
drm/vram
Convert to managed GEM VRAM initialization and switch bochs to
full autocleanup.
Signed-off-by: Thomas Zimmermann
Acked-by: Daniel Vetter
---
drivers/gpu/drm/tiny/bochs.c | 43 +---
1 file changed, 5 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/ti
Cleanup several nits in the driver's init code. Also move constant
data into the RO data segment. No functional changes.
Tested on mgag200 HW.
v2:
* update changelog (Sam)
Thomas Zimmermann (4):
drm/mgag200: Don't pass flags to drm_dev_register()
drm/mgag200: Inline mgag200_device_in
The type and flags values are stored in the PCI ID list. Extract them
in the probe function. Makes the device initialization more readable.
Signed-off-by: Thomas Zimmermann
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/mgag200/mgag200_drv.c | 21 +
drivers/gpu/drm/mgag200/mgag2
The flags argument is only relevant for UMS drivers. Pass 0.
Signed-off-by: Thomas Zimmermann
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/mgag200/mgag200_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c
b/drivers/gpu/drm/mgag200/mga
Declare constant LUT for bpp programming as static const. Removes mutable
data from device structure.
Signed-off-by: Thomas Zimmermann
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/mgag200/mgag200_drv.h | 2 --
drivers/gpu/drm/mgag200/mgag200_mode.c | 16 ++--
2 files changed, 6 inse
Inline mgag200_device_init() into mgag200_device_create(), which is
the only caller. Also remove a duplicate error message for
mgag200_modeset_init(). The function will print an error if/where it
failed.
v2:
* include a note about the removed error message in
changelog (Sam)
Sig
On Thu, 01 Jul 2021, Matt Roper wrote:
> From: Lucas De Marchi
>
> XeHP SDV is a Intel® dGPU without display. This is just the definition
> of some basic platform macros, by large a copy of current state of
> Tigerlake which does not reflect the end state of this platform.
>
> Bspec: 44467, 48077
On 02/07/2021 10:29, Pekka Paalanen wrote:
On Thu, 1 Jul 2021 21:28:06 +0200
Daniel Vetter wrote:
On Thu, Jul 1, 2021 at 8:27 PM Martin Peres wrote:
On 01/07/2021 11:14, Pekka Paalanen wrote:
On Wed, 30 Jun 2021 11:58:25 -0700
John Harrison wrote:
On 6/30/2021 01:22, Martin Peres wrot
On 01/07/2021 21:24, Martin Peres wrote:
[...]
+ i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
+ return;
+ }
+
+ /* Default: enable HuC authentication and GuC submission */
+ i915->params.enable_guc = ENABLE_GUC_LOAD_HUC |
ENABLE_GUC_SUBMISSION;
This seems to be in
On Thu, 01 Jul 2021, Matt Roper wrote:
> Vswing programming for SNPS PHYs is just a single step -- look up the
> value that corresponds to the voltage level from a table and program it
> into the SNPS_PHY_TX_EQ register.
I've got some patches to turn this to the same ddi buf trans mechanism
that
On Thu, 01 Jul 2021, Matt Roper wrote:
> DG2 has some changes to the expected modesetting sequences when compared
> to gen12. Adjust our driver logic accordingly. Although the DP
> sequence is pretty similar to TGL's, there are some steps that change,
> so let's split the handling for that out i
On Thu, 01 Jul 2021, Matt Roper wrote:
> From: Anusha Srivatsa
>
> DSC can be supported per DP connector. This patch creates
> a per connector debugfs node to expose the Input and
> Compressed BPP.
>
> The same node can be used from userspace to force
> DSC to a certain BPP.
>
> force_dsc_bpp is
tree: git://anongit.freedesktop.org/drm-intel drm-intel-gt-next
head: 5cd57f676bb946a00275408f0dd0d75dbc466d25
commit: cf586021642d8017cde111b7dd1ba86224e9da51 [8/14] drm/i915/gt: Pipelined
page migration
config: x86_64-randconfig-m001-20210630 (attached as .config)
compiler: gcc-9 (Debian 9.3
On 01/07/2021 23:24, Matt Roper wrote:
Xe_HPG adds some additional INSTDONE_GEOM debug registers; the Mesa team
has indicated that having these reported in the error state would be
useful for debugging GPU hangs. These registers are replicated per-DSS
with gslice steering.
Cc: Lionel Landwerlin
On 02/07/2021 00:12, abhin...@codeaurora.org wrote:
On 2021-06-09 14:17, Dmitry Baryshkov wrote:
Move setting up encoders from set_encoder_mode to
_dpu_kms_initialize_dsi() / _dpu_kms_initialize_displayport(). This
allows us to support not only "single DSI" and "dual DSI" but also "two
independe
On Thu, Jul 1, 2021 at 10:26 PM Matt Roper wrote:
>
> From: Paulo Zanoni
>
> The current interrupt handler is getting increasingly complicated and
> Xe_HP changes will bring even more complexity. Let's split off a new
> interrupt handler starting with DG1 (i.e., when the master tile
> interrupt
Hello Marek,
Sorry for the late answer.
On 6/30/21 2:35 AM, Marek Vasut wrote:
On 6/29/21 1:58 PM, Raphael GALLAIS-POU - foss wrote:
[...]
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -425,10 +425,17 @@ static void ltdc_crtc_atomic_enable(struct
drm_crtc *crtc,
{
struct ltdc_device *ldev
tree: git://anongit.freedesktop.org/drm-intel drm-intel-gt-next
head: 13c2ceb6addb6b14468e09b75832c98909eed8e7
commit: d53ec322dc7de32a59bf1c2a56b93e90fc2f1c28 [7/8] drm/i915/ttm: switch
over to ttm_buddy_man
config: x86_64-randconfig-m001-20210630 (attached as .config)
compiler: gcc-9 (Debian
On 01/07/2021 10:12, Boris Brezillon wrote:
> So we don't have to change the prototype if we extend the function.
>
> Signed-off-by: Boris Brezillon
Subject NIT:
> drm/panfrost: Pass a job to panfrost_{acquire,attach_object_fences}()
Should be panfrost_{acquire,attach}_object_fences()
Otherwis
On 01/07/2021 10:12, Boris Brezillon wrote:
> So we can re-use it from elsewhere.
>
> Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
> ---
> drivers/gpu/drm/panfrost/panfrost_drv.c | 52 ++---
> 1 file changed, 29 insertions(+), 23 deletions(-)
>
> diff --git a/
On 01/07/2021 10:12, Boris Brezillon wrote:
> Jobs reading from the same BO should not be serialized. Add access
> flags so we can relax the implicit dependencies in that case. We force
> exclusive access for now to keep the behavior unchanged, but a new
> SUBMIT ioctl taking explicit access flags
On 01/07/2021 10:12, Boris Brezillon wrote:
> Needed to keep VkQueues isolated from each other.
>
> Signed-off-by: Boris Brezillon
My Vulkan knowledge is limited so I'm not sure whether this is the right
approach or not. In particular is it correct that an application can
create a high priority
On Fri, Jul 2, 2021 at 7:45 AM Sam Ravnborg wrote:
> > - ret = mipi_dbi_command(dbi, MIPI_DCS_SOFT_RESET);
> > + ret = mipi_dbi_command_buf(dbi, MIPI_DCS_SOFT_RESET, NULL, 0);
> > if (ret) {
> > DRM_DEV_ERROR(dev, "Failed to send reset command (%d)\n",
> > ret);
> >
The macro mipi_dbi_command() does not report errors unless you wrap it
in another macro to do the error reporting.
Report a rate-limited error so we know what is going on.
Drop the only user in DRM using mipi_dbi_command() and actually checking
the error explicitly, let it use mipi_dbi_command_bu
On 01/07/2021 10:12, Boris Brezillon wrote:
> We now have a new ioctl that allows submitting multiple jobs at once
> (among other things) and we support timelined syncobjs. Bump the
> minor version number to reflect those changes.
>
> Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
>
On 01/07/2021 10:12, Boris Brezillon wrote:
> This should help limit the number of ioctls when submitting multiple
> jobs. The new ioctl also supports syncobj timelines and BO access flags.
>
> Signed-off-by: Boris Brezillon
The new ioctl looks reasonable, but I think there's a lot of scope for
On 01/07/2021 10:12, Boris Brezillon wrote:
> Now that we have a new SUBMIT ioctl dealing with timelined syncojbs we
Typo: s/syncojbs/syncobjs/
> can advertise the feature.
>
> Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
> ---
> drivers/gpu/drm/panfrost/panfrost_drv.c | 3 ++-
>
On 01/07/2021 10:12, Boris Brezillon wrote:
> Needed to keep VkQueues isolated from each other.
One more comment I noticed when I tried this out:
[...]
> +struct panfrost_submitqueue *
> +panfrost_submitqueue_create(struct panfrost_file_priv *ctx,
> + enum panfrost_submitq
Hi Linus,
On Fri, Jul 02, 2021 at 11:58:52AM +0200, Linus Walleij wrote:
> On Fri, Jul 2, 2021 at 7:45 AM Sam Ravnborg wrote:
>
> > > - ret = mipi_dbi_command(dbi, MIPI_DCS_SOFT_RESET);
> > > + ret = mipi_dbi_command_buf(dbi, MIPI_DCS_SOFT_RESET, NULL, 0);
> > > if (ret) {
> > >
On Fri, Jul 02, 2021 at 12:04:55PM +0200, Linus Walleij wrote:
> The macro mipi_dbi_command() does not report errors unless you wrap it
> in another macro to do the error reporting.
>
> Report a rate-limited error so we know what is going on.
>
> Drop the only user in DRM using mipi_dbi_command()
On Fri, Jul 02, 2021 at 12:27:42PM +0200, Sam Ravnborg wrote:
> On Fri, Jul 02, 2021 at 12:04:55PM +0200, Linus Walleij wrote:
> > The macro mipi_dbi_command() does not report errors unless you wrap it
> > in another macro to do the error reporting.
> >
> > Report a rate-limited error so we know w
Daniel pointed me towards this function and there are multiple obvious problems
in the implementation.
First of all the retry loop is not working as intended. In general the retry
makes only sense if you grab the reference first and then check the sequence
values.
Then we should always also wait
On Fri, 2 Jul 2021 at 09:45, Dan Carpenter wrote:
>
> tree: git://anongit.freedesktop.org/drm-intel drm-intel-gt-next
> head: 5cd57f676bb946a00275408f0dd0d75dbc466d25
> commit: cf586021642d8017cde111b7dd1ba86224e9da51 [8/14] drm/i915/gt:
> Pipelined page migration
> config: x86_64-randconfig-
On Fri, 2 Jul 2021 10:56:29 +0100
Steven Price wrote:
> On 01/07/2021 10:12, Boris Brezillon wrote:
> > Needed to keep VkQueues isolated from each other.
> >
> > Signed-off-by: Boris Brezillon
>
> My Vulkan knowledge is limited so I'm not sure whether this is the right
> approach or not. In
If mock_region_create fails then mem will be an error pointer. Instead
we just need to use the correct ordering for the onion unwind.
igt_mock_reserve() error: 'mem' dereferencing possible ERR_PTR()
Reported-by: kernel test robot
Reported-by: Dan Carpenter
Signed-off-by: Matthew Auld
---
driv
The block here can't be NULL, especially since we already dereferenced
it earlier, so remove the redundant check.
igt_check_blocks() warn: variable dereferenced before check 'block' (see line
126)
Reported-by: Dan Carpenter
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/selftests/i915_b
On Fri, 2 Jul 2021 11:08:58 +0100
Steven Price wrote:
> On 01/07/2021 10:12, Boris Brezillon wrote:
> > Needed to keep VkQueues isolated from each other.
>
> One more comment I noticed when I tried this out:
>
> [...]
> > +struct panfrost_submitqueue *
> > +panfrost_submitqueue_create(struct
On 02/07/2021 11:43, Boris Brezillon wrote:
> On Fri, 2 Jul 2021 10:56:29 +0100
> Steven Price wrote:
>
>> On 01/07/2021 10:12, Boris Brezillon wrote:
>>> Needed to keep VkQueues isolated from each other.
>>>
>>> Signed-off-by: Boris Brezillon
>>
>> My Vulkan knowledge is limited so I'm not su
On 02/07/2021 11:52, Boris Brezillon wrote:
> On Fri, 2 Jul 2021 11:08:58 +0100
> Steven Price wrote:
>
>> On 01/07/2021 10:12, Boris Brezillon wrote:
>>> Needed to keep VkQueues isolated from each other.
>>
>> One more comment I noticed when I tried this out:
>>
>> [...]
>>> +struct panfrost_s
On Fri, 2 Jul 2021 11:58:34 +0100
Steven Price wrote:
> On 02/07/2021 11:52, Boris Brezillon wrote:
> > On Fri, 2 Jul 2021 11:08:58 +0100
> > Steven Price wrote:
> >
> >> On 01/07/2021 10:12, Boris Brezillon wrote:
> >>> Needed to keep VkQueues isolated from each other.
> >>
> >> One mo
Hi,
On Fri, 2 Jul 2021 at 11:55, Steven Price wrote:
> On 02/07/2021 11:43, Boris Brezillon wrote:
> > On Fri, 2 Jul 2021 10:56:29 +0100
> > Steven Price wrote:
> >> My Vulkan knowledge is limited so I'm not sure whether this is the right
> >> approach or not. In particular is it correct that an
Den 02.07.2021 12.04, skrev Linus Walleij:
> The macro mipi_dbi_command() does not report errors unless you wrap it
> in another macro to do the error reporting.
>
> Report a rate-limited error so we know what is going on.
>
> Drop the only user in DRM using mipi_dbi_command() and actually che
Hi All
I'm trying to get DSI devices working reliably on the Raspberry Pi,
but I'm hitting a number of places where it isn't clear as to the
expected behaviour within DRM.
Power on state. Many devices want the DSI clock and/or data lanes in
LP-11 state when they are powered up. With the normal ca
On Fri, Jul 02, 2021 at 11:32:45AM +0100, Matthew Auld wrote:
> On Fri, 2 Jul 2021 at 09:45, Dan Carpenter wrote:
> >
> > tree: git://anongit.freedesktop.org/drm-intel drm-intel-gt-next
> > head: 5cd57f676bb946a00275408f0dd0d75dbc466d25
> > commit: cf586021642d8017cde111b7dd1ba86224e9da51 [8/1
On Fri, Jul 02, 2021 at 02:07:27PM +0300, Dan Carpenter wrote:
> On Fri, Jul 02, 2021 at 11:32:45AM +0100, Matthew Auld wrote:
> > On Fri, 2 Jul 2021 at 09:45, Dan Carpenter wrote:
> > > cf586021642d80 Chris Wilson 2021-06-17 84
> > > cf586021642d80 Chris Wilson 2021-06-17 85 err =
Hey Daniel,
even when you are not 100% done with the driver audit I think we should push
that patch set here to drm-misc-next now so that it can end up in 5.15.
Not having any dependency between the exclusive and the shared fence signaling
order is just way more defensive than the current model
Explicitly document that code can't assume that shared fences
signal after the exclusive fence.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-resv.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c
index f26c
As the name implies if testing all fences is requested we
should indeed test all fences and not skip the exclusive
one because we see shared ones.
v2: fix logic once more
Signed-off-by: Christian König
---
drivers/dma-buf/dma-resv.c | 33 -
1 file changed, 12 ins
Drivers also need to to sync to the exclusive fence when
a shared one is present.
Signed-off-by: Christian König
---
drivers/gpu/drm/nouveau/nouveau_fence.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c
b/drivers/gpu/drm/nouveau/nouv
Drivers also need to to sync to the exclusive fence when
a shared one is present.
Completely untested since the driver won't even compile on !ARM.
Signed-off-by: Christian König
---
drivers/gpu/drm/msm/msm_gem.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git
On Fri, 2 Jul 2021 at 12:07, Dan Carpenter wrote:
>
> On Fri, Jul 02, 2021 at 11:32:45AM +0100, Matthew Auld wrote:
> > On Fri, 2 Jul 2021 at 09:45, Dan Carpenter wrote:
> > >
> > > tree: git://anongit.freedesktop.org/drm-intel drm-intel-gt-next
> > > head: 5cd57f676bb946a00275408f0dd0d75dbc4
On 2021-07-02 04:08, Guenter Roeck wrote:
Hi,
On Thu, Jun 24, 2021 at 11:55:26PM +0800, Claire Chang wrote:
If a device is not behind an IOMMU, we look up the device node and set
up the restricted DMA when the restricted-dma-pool is presented.
Signed-off-by: Claire Chang
Tested-by: Stefano St
ttps://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Linus-Walleij/drm-dbi-Print-errors-for-mipi_dbi_command/20210702-180745
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
3dbdb38e286903ec220aaf1fb29a8d94297da246
config: m68k-al
On Fri, 2 Jul 2021 at 12:14, Dan Carpenter wrote:
>
> On Fri, Jul 02, 2021 at 02:07:27PM +0300, Dan Carpenter wrote:
> > On Fri, Jul 02, 2021 at 11:32:45AM +0100, Matthew Auld wrote:
> > > On Fri, 2 Jul 2021 at 09:45, Dan Carpenter
> > > wrote:
> > > > cf586021642d80 Chris Wilson 2021-06-17 84
From: Colin Ian King
The call to drm_dp_aux_init never returns an error code and there
is no error return being assigned to variable ret. The check for
an error in ret is always false since ret is still zero from the
start of the function so the init error check and error message
is redundant and
On 01/07/2021 21:23, Matt Roper wrote:
From: Venkata Sandeep Dhanalakota
In Gen12 there are various fuse combinations and in each configuration
vdbox engine may be connected to SFC depending on which engines are
available, so we need to set the SFC capability based on fuse value from
the hard
On Fri, Jul 02, 2021 at 12:34:33PM +0100, Matthew Auld wrote:
> > > > cf586021642d80 Chris Wilson 2021-06-17 85 err =
> > > > fn(migrate, &ww, src, dst, &rq);
> > > > cf586021642d80 Chris Wilson 2021-06-17 86 if (!err)
> > > > cf586021642d80 Chris Wilson 2021-06-17 87
On 01/07/2021 21:23, Matt Roper wrote:
From: John Harrison
Xe_HP can have a lot of extra media engines. This patch adds the basic
definitions for them.
Cc: Tvrtko Ursulin
Signed-off-by: John Harrison
Signed-off-by: Tomas Winkler
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/gt/gen
On 01/07/2021 21:23, Matt Roper wrote:
From: Lucas De Marchi
Besides the arch version returned by GRAPHICS_VER(), new platforms
contain a "release id" to make clear the difference from one platform to
another. Although for the first ones we may use them as if they were a
What does "first on
On 01/07/2021 21:23, Matt Roper wrote:
From: John Harrison
Xe_HP can have a lot of extra media engines. This patch adds the
interrupt handler support for them.
Cc: Tvrtko Ursulin
Cc: Daniele Ceraolo Spurio
Signed-off-by: John Harrison
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/
Alex Deucher (1):
amdgpu: update marketing names
Andrey Grodzovsky (6):
tests/amdgpu: Fix valgrind warning
test/amdgpu: Add helper functions for hot unplug
test/amdgpu/hotunplug: Add test suite for GPU unplug
tests/amdgpu/hotunplug: Add unplug with cs test.
test
On 02.07.2021 10:13, Martin Peres wrote:
> On 01/07/2021 21:24, Martin Peres wrote:
> [...]
>>>
> + i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
> + return;
> + }
> +
> + /* Default: enable HuC authentication and GuC submission */
> + i915->p
On 02/07/2021 16:06, Michal Wajdeczko wrote:
On 02.07.2021 10:13, Martin Peres wrote:
On 01/07/2021 21:24, Martin Peres wrote:
[...]
+ i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
+ return;
+ }
+
+ /* Default: enable HuC authentication and GuC submission */
+ i915
Hi Nathan,
On Thu, Jul 01, 2021 at 08:29:34PM -0700, Nathan Chancellor wrote:
> On Mon, May 24, 2021 at 03:18:52PM +0200, Maxime Ripard wrote:
> > The new gpiod interface takes care of parsing the GPIO flags and to
> > return the logical value when accessing an active-low GPIO, so switching
> > to
On Fri, Jul 02, 2021 at 12:39:41PM +0100, Robin Murphy wrote:
> On 2021-07-02 04:08, Guenter Roeck wrote:
> > On Thu, Jun 24, 2021 at 11:55:26PM +0800, Claire Chang wrote:
> > > If a device is not behind an IOMMU, we look up the device node and set
> > > up the restricted DMA when the restricted-dm
On Thu, 1 Jul 2021 at 16:10, Matthew Auld wrote:
>
> The CPU domain should be static for discrete, and on DG1 we don't need
> any flushing since everything is already coherent, so really all this
> does is an object wait, for which we have an ioctl. Longer term the
> desired caching should be an i
On 7/2/21 6:18 AM, Will Deacon wrote:
On Fri, Jul 02, 2021 at 12:39:41PM +0100, Robin Murphy wrote:
On 2021-07-02 04:08, Guenter Roeck wrote:
On Thu, Jun 24, 2021 at 11:55:26PM +0800, Claire Chang wrote:
If a device is not behind an IOMMU, we look up the device node and set
up the restricted D
The macro mipi_dbi_command() does not report errors unless you wrap it
in another macro to do the error reporting.
Report a rate-limited error so we know what is going on.
Drop the only user in DRM using mipi_dbi_command() and actually checking
the error explicitly, let it use mipi_dbi_command_bu
> > My Vulkan knowledge is limited so I'm not sure whether this is the right
> > approach or not. In particular is it correct that an application can
> > create a high priority queue which could affect other (normal priority)
> > applications?
>
> That's what msm does (with no extra CAPS check AFA
Hi Nathan,
On Thu, Jul 01, 2021 at 12:52:20AM -0700, Nathan Chancellor wrote:
> On 7/1/2021 12:40 AM, Will Deacon wrote:
> > On Wed, Jun 30, 2021 at 08:56:51AM -0700, Nathan Chancellor wrote:
> > > On Wed, Jun 30, 2021 at 12:43:48PM +0100, Will Deacon wrote:
> > > > On Wed, Jun 30, 2021 at 05:17:2
On 02.07.2021 15:12, Martin Peres wrote:
> On 02/07/2021 16:06, Michal Wajdeczko wrote:
>>
>>
>> On 02.07.2021 10:13, Martin Peres wrote:
>>> On 01/07/2021 21:24, Martin Peres wrote:
>>> [...]
>
>>
>>> + i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
>>> + return;
>
On Fri, 2 Jul 2021 09:58:06 -0400
Alyssa Rosenzweig wrote:
> > > My Vulkan knowledge is limited so I'm not sure whether this is the right
> > > approach or not. In particular is it correct that an application can
> > > create a high priority queue which could affect other (normal priority)
> > >
ttps://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Linus-Walleij/drm-dbi-Print-errors-for-mipi_dbi_command/20210702-180745
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
3dbdb38e286903ec220aaf1fb29a8d94297da246
config: arm64-
On 01/07/2021 16:10, Matthew Auld wrote:
The CPU domain should be static for discrete, and on DG1 we don't need
any flushing since everything is already coherent, so really all this
Knowledge of the write combine buffer is assumed to be had by anyone involved?
does is an object wait, for wh
Hello,
This is an attempt at providing a new submit ioctl that's more
Vulkan-friendly than the existing one. This ioctl
1/ allows passing several out syncobjs so we can easily update
several fence/semaphore in a single ioctl() call
2/ allows passing several jobs so we don't have to have one io
So we don't have to change the prototype if we extend the function.
v3:
* Fix subject
Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_job.c | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm
So we can re-use it from elsewhere.
Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 52 ++---
1 file changed, 29 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c
b/drivers/gpu/drm/pan
Jobs reading from the same BO should not be serialized. Add access
flags so we can relax the implicit dependencies in that case. We force
exclusive access for now to keep the behavior unchanged, but a new
SUBMIT ioctl taking explicit access flags will be introduced.
Signed-off-by: Boris Brezillon
This should help limit the number of ioctls when submitting multiple
jobs. The new ioctl also supports syncobj timelines and BO access flags.
v3:
* Re-use panfrost_get_job_bos() and panfrost_get_job_in_syncs() in the
old submit path
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panfrost/
We now have a new ioctl that allows submitting multiple jobs at once
(among other things) and we support timelined syncobjs. Bump the
minor version number to reflect those changes.
Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 4 +++-
1 f
Now that we have a new SUBMIT ioctl dealing with timelined syncojbs we
can advertise the feature.
Signed-off-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panfrost/p
Needed to keep VkQueues isolated from each other.
v3:
* Limit the number of submitqueue per context to 16
* Fix a deadlock
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panfrost/Makefile | 3 +-
drivers/gpu/drm/panfrost/panfrost_device.h| 2 +-
drivers/gpu/drm/panfrost/
On 02/07/2021 15:32, Boris Brezillon wrote:
> Needed to keep VkQueues isolated from each other.
>
> v3:
> * Limit the number of submitqueue per context to 16
> * Fix a deadlock
>
> Signed-off-by: Boris Brezillon
16 ought to be enough for anyone ;)
Reviewed-by: Steven Price
> ---
> drivers/g
On 02.07.2021 10:09, Martin Peres wrote:
> On 02/07/2021 10:29, Pekka Paalanen wrote:
>> On Thu, 1 Jul 2021 21:28:06 +0200
>> Daniel Vetter wrote:
>>
>>> On Thu, Jul 1, 2021 at 8:27 PM Martin Peres
>>> wrote:
On 01/07/2021 11:14, Pekka Paalanen wrote:
> On Wed, 30 Jun 2021 11:58:
```
> +/* Syncobj reference passed at job submission time to encode explicit
> + * input/output fences.
> + */
> +struct drm_panfrost_syncobj_ref {
> + __u32 handle;
> + __u32 pad;
> + __u64 point;
> +};
```
What is handle? What is point? Why is there padding instead of putting
point f
On 2021-07-02 14:58, Will Deacon wrote:
Hi Nathan,
On Thu, Jul 01, 2021 at 12:52:20AM -0700, Nathan Chancellor wrote:
On 7/1/2021 12:40 AM, Will Deacon wrote:
On Wed, Jun 30, 2021 at 08:56:51AM -0700, Nathan Chancellor wrote:
On Wed, Jun 30, 2021 at 12:43:48PM +0100, Will Deacon wrote:
On We
Den 02.07.2021 15.56, skrev Linus Walleij:
> The macro mipi_dbi_command() does not report errors unless you wrap it
> in another macro to do the error reporting.
>
> Report a rate-limited error so we know what is going on.
>
> Drop the only user in DRM using mipi_dbi_command() and actually che
On 02/07/2021 15:32, Boris Brezillon wrote:
> This should help limit the number of ioctls when submitting multiple
> jobs. The new ioctl also supports syncobj timelines and BO access flags.
>
> v3:
> * Re-use panfrost_get_job_bos() and panfrost_get_job_in_syncs() in the
> old submit path
>
> Si
> Better, but I was hoping we can mostly delete panfrost_ioctl_submit(),
> leaving something along the lines of:
>
> static int panfrost_ioctl_submit(struct drm_device *dev, void *data,
> struct drm_file *file)
> {
> struct panfrost_submitqueue *queue;
> struct drm_panfro
On Fri, 2 Jul 2021 11:13:16 -0400
Alyssa Rosenzweig wrote:
> ```
> > +/* Syncobj reference passed at job submission time to encode explicit
> > + * input/output fences.
> > + */
> > +struct drm_panfrost_syncobj_ref {
> > + __u32 handle;
> > + __u32 pad;
> > + __u64 point;
> > +};
> ```
>
On Fri, 2 Jul 2021 16:05:30 +0100
Steven Price wrote:
> On 02/07/2021 15:32, Boris Brezillon wrote:
> > Needed to keep VkQueues isolated from each other.
> >
> > v3:
> > * Limit the number of submitqueue per context to 16
> > * Fix a deadlock
> >
> > Signed-off-by: Boris Brezillon
>
> 16 ou
On 2021-07-02 02:20, Dmitry Baryshkov wrote:
On 02/07/2021 00:12, abhin...@codeaurora.org wrote:
On 2021-06-09 14:17, Dmitry Baryshkov wrote:
Move setting up encoders from set_encoder_mode to
_dpu_kms_initialize_dsi() / _dpu_kms_initialize_displayport(). This
allows us to support not only "sing
On Fri, 2 Jul 2021 17:49:10 +0200
Boris Brezillon wrote:
> On Fri, 2 Jul 2021 16:05:30 +0100
> Steven Price wrote:
>
> > On 02/07/2021 15:32, Boris Brezillon wrote:
> > > Needed to keep VkQueues isolated from each other.
> > >
> > > v3:
> > > * Limit the number of submitqueue per context to
Hi Dave,
(Expanding the CC list a bit)
On Fri, Jul 02, 2021 at 12:03:31PM +0100, Dave Stevenson wrote:
> Hi All
>
> I'm trying to get DSI devices working reliably on the Raspberry Pi,
> but I'm hitting a number of places where it isn't clear as to the
> expected behaviour within DRM.
Not a surp
Hi Dave,
On Mon, Jun 21, 2021 at 04:59:51PM +0300, Laurent Pinchart wrote:
> On Mon, Jun 21, 2021 at 04:09:05PM +0300, Laurent Pinchart wrote:
> > On Mon, Jun 21, 2021 at 03:56:16PM +0300, Laurent Pinchart wrote:
> > > On Mon, Jun 21, 2021 at 12:49:14PM +0100, Dave Stevenson wrote:
> > > > On Sun,
> > What is handle? What is point?
>
> Handle is a syncobj handle, point is the point in a syncobj timeline.
> I'll document those fields.
OK.
> > Why is there padding instead of putting point first?
>
> We can move the point field first, but we need to keep the explicit
> padding: the struct h
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