Since objects can be migrated or evicted when not pinned or locked,
update the checks for lmem residency or future residency so that
the value returned is not immediately stale.
Signed-off-by: Thomas Hellström
Reviewed-by: Matthew Auld
---
v2: Simplify i915_gem_object_migratable() (Reported by M
Most logical place to introduce TTM buffer objects is as an i915
gem object backend. We need to add some ops to account for added
functionality like delayed delete and LRU list manipulation.
Initially we support only LMEM and SYSTEM memory, but SYSTEM
(which in this case means evicted LMEM objects
From: Maarten Lankhorst
This allows drivers to distinguish between different types of vma_node's.
The readonly flag was unused and is thus removed.
This is a temporary solution, until i915 is converted completely to
use ttm for bo's.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellstr
Remaining patches rebased on latest TTM changes posted for reference and CI.
Maarten Lankhorst (2):
drm/vma: Add a driver_private member to vma_node.
drm/i915: Use ttm mmap handling for ttm bo's.
Thomas Hellström (2):
drm/i915/ttm: Introduce a TTM i915 gem object backend
drm/i915/lmem: Ve
From: Maarten Lankhorst
Use the ttm handlers for servicing page faults, and vm_access.
We do our own validation of read-only access, otherwise use the
ttm handlers as much as possible.
Because the ttm handlers expect the vma_node at vma->base, we slightly
need to massage the mmap handlers to lo
From: Tan Zhongjun
The platform_get_irq() prints error message telling that interrupt is
missing,hence there is no need to duplicated that message in the
drivers.
Signed-off-by: Tan Zhongjun
---
drivers/gpu/drm/tegra/dpaux.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
On Tue, 8 Jun 2021 19:43:15 +0200
Werner Sembach wrote:
> Add a new general drm property "active bpc" which can be used by graphic
> drivers
> to report the applied bit depth per pixel back to userspace.
>
> While "max bpc" can be used to change the color depth, there was no way to
> check
>
Am 09.06.21 um 19:45 schrieb Mikko Perttunen:
On 6/9/21 8:29 PM, Christian König wrote:
TTMs buffer objects are based on GEM objects for quite a while
and rely on initializing those fields before initializing the TTM BO.
Noveau now doesn't init the GEM object for internally allocated BOs,
On Tue, 8 Jun 2021 19:43:18 +0200
Werner Sembach wrote:
> Add a new general drm property "active color format" which can be used by
> graphic drivers to report the used color format back to userspace.
>
> There was no way to check which color format got actually used on a given
> monitor. To su
When compiling the kernel for MIPS with CONFIG_DRM_AMDGPU = y, errors are
encountered as follows:
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.o: In function `amdgpu_vram_mgr_new':
amdgpu_vram_mgr.c:(.text+0x740): undefined reference to `__udivdi3'
Making a 64 bit division by a/b (a is uint64_t) is
Am 10.06.21 um 10:20 schrieb He Ying:
When compiling the kernel for MIPS with CONFIG_DRM_AMDGPU = y, errors are
encountered as follows:
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.o: In function `amdgpu_vram_mgr_new':
amdgpu_vram_mgr.c:(.text+0x740): undefined reference to `__udivdi3'
Making
On Wed, 09 Jun 2021 21:23:27 +
Simon Ser wrote:
> This function sends a hotplug uevent with a CONNECTOR property.
>
> Signed-off-by: Simon Ser
> ---
> drivers/gpu/drm/drm_sysfs.c | 25 +
> include/drm/drm_sysfs.h | 1 +
> 2 files changed, 26 insertions(+)
>
>
On Wed, 9 Jun 2021 20:00:38 -0300
Leandro Ribeiro wrote:
> In this patch we add a section to document what userspace should do to
> find out the CRTC index. This is important as they may be many places in
> the documentation that need this, so it's better to just point to this
> section and avoi
On Wed, 9 Jun 2021 20:05:06 -0300
Leandro Ribeiro wrote:
> On 6/9/21 8:00 PM, Leandro Ribeiro wrote:
> > Add a small description and document struct fields of
> > drm_mode_get_plane.
> >
> > Signed-off-by: Leandro Ribeiro
> > ---
> > include/uapi/drm/drm_mode.h | 36 +++
Hello,
在 2021/6/10 16:20, Christian König 写道:
Am 10.06.21 um 10:20 schrieb He Ying:
When compiling the kernel for MIPS with CONFIG_DRM_AMDGPU = y, errors
are
encountered as follows:
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.o: In function
`amdgpu_vram_mgr_new':
amdgpu_vram_mgr.c:(.text+
On Wed, Jun 09, 2021 at 05:28:50PM +0100, Daniel Stone wrote:
> Hi Thierry,
>
> On Tue, 27 Apr 2021 at 19:40, Daniel Stone wrote:
> > On Fri, 26 Mar 2021 at 16:29, Thierry Reding
> > wrote:
> >> On Fri, Mar 26, 2021 at 02:54:22PM +, Simon Ser wrote:
> >> > LGTM, thanks!
> >> >
> >> > Review
Since we can't find a consensus on hot to move forward with the dma_resv object
I concentrated on changing the approach for amdgpu first.
This new approach changes how the driver stores the command submission fence in
the dma_resv object in DMA-buf exported BOs.
For exported BOs we now store th
The callback and the irq work are never used at the same
time. Putting them into an union saves us 24 bytes and
makes the structure only 120 bytes in size.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-fence-chain.c | 2 +-
include/linux/dma-fence-chain.h | 8 +---
2 files changed
Not needed any more since dma_fence_chain objects take care of this now.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_syncobj.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 1c5b9ef6da37..e6d144775a87 100644
--
Add some rather sophisticated lockless garbage collection
for dma_fence_chain objects.
For this keep all initialized dma_fence_chain nodes an a
queue and trigger garbage collection before a new one is
allocated.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-fence-chain.c | 160
Unwrap a the explicit fence if it is a dma_fence_chain and
sync to the first fence not matching the owner rules.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 118 +--
1 file changed, 68 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/
Drop the workaround and instead implement a better solution.
Basically we are now chaining all submissions using a dma_fence_chain
container and adding them as exclusive fence to the dma_resv object.
This way other drivers can still sync to the single exclusive fence
while amdgpu only sync to fen
Add a common allocation helper. Cleaning up the mix of kzalloc/kmalloc
and some unused code in the selftest.
Signed-off-by: Christian König
---
drivers/dma-buf/st-dma-fence-chain.c | 16 --
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c| 4 ++--
drivers/gpu/drm/drm_syncobj.
Exercise the newly added functions.
Signed-off-by: Christian König
---
drivers/dma-buf/st-dma-fence-chain.c | 48
1 file changed, 48 insertions(+)
diff --git a/drivers/dma-buf/st-dma-fence-chain.c
b/drivers/dma-buf/st-dma-fence-chain.c
index 8ce1ea59d31b..855c129c6
On Wed, 9 Jun 2021 at 18:29, Christian König
wrote:
>
> TTMs buffer objects are based on GEM objects for quite a while
> and rely on initializing those fields before initializing the TTM BO.
>
> Noveau now doesn't init the GEM object for internally allocated BOs,
> so make sure that we at least in
On 09/06/2021 22:29, Jason Ekstrand wrote:
Ever since 0eafec6d3244 ("drm/i915: Enable lockless lookup of request
tracking via RCU"), the i915 driver has used SLAB_TYPESAFE_BY_RCU (it
was called SLAB_DESTROY_BY_RCU at the time) in order to allow RCU on
i915_request. As nifty as SLAB_TYPESAFE_BY
Am 10.06.21 um 11:29 schrieb Tvrtko Ursulin:
On 09/06/2021 22:29, Jason Ekstrand wrote:
Ever since 0eafec6d3244 ("drm/i915: Enable lockless lookup of request
tracking via RCU"), the i915 driver has used SLAB_TYPESAFE_BY_RCU (it
was called SLAB_DESTROY_BY_RCU at the time) in order to allow RCU o
Hi Kishon, Vinod,
Any follow-up comments/suggestions based on my previous reply?
Or, perhaps, just keep the patch as-is to support the generic lvds phy
configuration structure?
Thanks,
Liu Ying
On Thu, 2021-04-01 at 16:36 +0800, Liu Ying wrote:
> Hi Kishon,
>
> First of all, thanks for your rev
Hi Dave & Daniel,
Here's the final -gt-next PR for 5.14.
Two major uAPI changes for new Gen12+ platforms: Stop supporting
old MMAP IOCTL (excl. TGL) and require use of MMAP_OFFSET instead.
Start enabling HuC loading by default (excl. TGL and RKL).
Revert for io_mapping_map_user which was already
On Thu, 10 Jun 2021 at 09:56, Thierry Reding wrote:
> On Wed, Jun 09, 2021 at 05:28:50PM +0100, Daniel Stone wrote:
> > On Tue, 27 Apr 2021 at 19:40, Daniel Stone wrote:
> > > On Fri, 26 Mar 2021 at 16:29, Thierry Reding
> > > wrote:
> > >> I do have commit access for drm-misc-next, but I was t
On 09/06/2021 22:29, Jason Ekstrand wrote:
This appears to break encapsulation by moving an intel_engine_cs
function to a i915_request file. However, this function is
intrinsically tied to the lifetime rules and allocation scheme of
i915_request and having it in intel_engine_cs.c leaks details
On 09/06/2021 22:29, Jason Ekstrand wrote:
Instead of attempting to recycle a request in to the cache when it
retires, stuff a new one in the cache every time we allocate a request
for some other reason.
I supposed the "why?" is "simpler scheme" - but in what way it is simpler?
Signed-off-b
On Wed, Jun 09, 2021 at 05:21:19PM +0800, Desmond Cheong Zhi Xi wrote:
> This patch eliminates the following smatch warning:
> drivers/gpu/drm/drm_auth.c:320 drm_master_release() warn: unlocked access
> 'master' (line 318) expected lock '&dev->master_mutex'
>
> The 'file_priv->master' field shoul
We have established previously we stop using relocations starting
from gen12 platforms with Tigerlake as an exception. We keep this
statement but we want to enable relocations conditionally for
Rocketlake and Alderlake under require_force_probe flag set.
Keeping relocations under require_force_pro
The application should be programming the application ID, not
the kernel, as there can be several options to choose from,
and setting the application ID multiple times can cause issues.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/vic.c | 2 --
drivers/gpu/drm/tegra/vic.h | 1 -
2 fi
The subject should have the prefix "drm/panfrost" and should mention
what the patch is changing (not just the filename).
On 09/06/2021 07:38, ChunyouTang wrote:
> From: tangchunyou
>
> The GPU exception fault status register(0x3C),the low 8 bit is the
> EXCEPTION_TYPE.We can see the description
Add a new property for jobs to enable or disable recovery i.e.
CPU increments of syncpoints to max value on job timeout. This
allows for a more solid model for hanged jobs, where userspace
doesn't need to guess if a syncpoint increment happened because
the job completed, or because job timeout was
Add an implementation of dma_fences based on syncpoints. Syncpoint
interrupts are used to signal fences. Additionally, after
software signaling has been enabled, a 30 second timeout is started.
If the syncpoint threshold is not reached within this period,
the fence is signalled with an -ETIMEDOUT e
With the new UAPI implementation, engines are powered on and off
when there are active jobs, and the core code handles channel
allocation. To accommodate that, boot the engine as part of
runtime PM instead of using the open_channel callback, which is
not used by the new submit path.
Signed-off-by:
Add a callback field to the job structure, to be called just before
the job is to be freed. This allows the job's submitter to clean
up any of its own state, like decrement runtime PM refcounts.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/host1x/job.c | 3 +++
include/linux/host1x.h | 4 +++
To avoid code duplication, allocate the per-engine shared channel in
the core code instead. This is the usual channel that all jobs are
submitted to when MLOCKing is not in use. Once MLOCKs are implemented
on Host1x side, we can also update this to avoid allocating a shared
channel when MLOCKs are
Add support for inserting syncpoint waits in the CDMA pushbuffer.
These waits need to be done in HOST1X class, while gather submitted
by the application execute in engine class.
Support is added by converting the gather list of job into a command
list that can include both gathers and waits. When
Implement the job submission IOCTL with a minimum feature set.
Signed-off-by: Mikko Perttunen
---
v7:
* Allocate gather BO with DMA API to get page-aligned
memory
* Add error prints to a few places where they were missing
v6:
* Remove sgt bypass path in gather_bo - this would cause
cache main
Bump driver version to 1.0.0 to allow userspace to detect
availability of new interfaces.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/drm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index bf5cb553d0a
The new UAPI will have its own firewall, and we don't want to run
the firewall in the Host1x driver for those jobs. As such, add a
parameter to host1x_job_alloc to specify if we want to skip the
firewall in the Host1x driver.
Signed-off-by: Mikko Perttunen
---
v7:
* New patch
---
drivers/gpu/drm
Implement the non-submission parts of the new UAPI, including
channel management and memory mapping. The UAPI is under the
CONFIG_DRM_TEGRA_STAGING config flag for now.
Signed-off-by: Mikko Perttunen
---
v7:
* Remove unused gem_create/mmap functions
* Use gem->size for BO size - the bare size pro
The static function host1x_bo_lookup in drm.c is also useful
elsewhere. Extract it as tegra_gem_lookup in gem.c.
Signed-off-by: Mikko Perttunen
---
v6:
- New patch
---
drivers/gpu/drm/tegra/drm.c | 20 +++-
drivers/gpu/drm/tegra/gem.c | 13 +
drivers/gpu/drm/tegra/gem
Implement new syncpoint wait UAPI. This is different from the
legacy one in taking an absolute timestamp in line with modern
DRM conventions.
Signed-off-by: Mikko Perttunen
---
v6:
- New patch
---
drivers/gpu/drm/tegra/drm.c | 2 ++
drivers/gpu/drm/tegra/uapi.c | 22 ++
dri
Hi all,
here's the seventh revision of the TegraDRM UAPI proposal.
Only some small changes to v6 here to fix things on older
Tegras with certain configuration combinations, as well as
rebasing to latest linux-next.
The following pieces of userspace have been updated to support
this revision of th
Update the tegra_drm.h UAPI header, adding the new proposed UAPI.
The old staging UAPI is left in for now, with minor modification
to avoid name collisions.
Signed-off-by: Mikko Perttunen
---
v6:
* Fix comment
* Add syncpoint allocation/freeing IOCTLs, use syncpoint ID
instead of syncpoint FD
*
Add a firewall that validates jobs before submission to ensure
they don't do anything they aren't allowed to do, like accessing
memory they should not access.
The firewall is functionality-wise a copy of the firewall already
implemented in gpu/host1x. It is copied here as it makes more
sense for i
Implement TegraDRM IOCTLs for allocating and freeing syncpoints.
Signed-off-by: Mikko Perttunen
---
v6:
- New patch
---
drivers/gpu/drm/tegra/drm.c | 5
drivers/gpu/drm/tegra/uapi.c | 56 ++--
drivers/gpu/drm/tegra/uapi.h | 5
3 files changed, 64 inse
We are going to need this for the next patch and it allows us to clean
up amdgpu as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 47 -
drivers/gpu/drm/ttm/ttm_resource.c | 1 +
include/drm/ttm/ttm_resource.h |
For now that function is just a stub.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 1 +
drivers/gpu/drm/nouveau/nouveau_ttm.c| 1 +
drivers/gpu/drm/ttm/ttm_range_manager.c | 1 +
drivers/gpu/drm
Instead of duplicating that at different places add an iterator over all
the resources in a resource manager.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 41 --
drivers/gpu/drm/ttm/ttm_device.c | 37 +--
drivers/gp
This way we finally fix the problem that new resource are
not immediately evict-able after allocation.
That has caused numerous problems including OOM on GDS handling
and not being able to use TTM as general resource manager.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_
Ah, crap forget this patch. I wanted to squash it into the next one.
Am 10.06.21 um 13:05 schrieb Christian König:
For now that function is just a stub.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 1 +
From: Thierry Reding
When working with framebuffer modifiers, it can be useful to extract the
vendor identifier or check a modifier against a given vendor identifier.
Add one macro that extracts the vendor identifier and a helper to check
a modifier against a given vendor identifier.
Reviewed-by
From: Thierry Reding
Rather than open-coding the vendor extraction operation, use the newly
introduced helper macro.
Reviewed-by: Daniel Vetter
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/arm/malidp_planes.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu
From: Thierry Reding
Rather than open-coding the vendor extraction operation, use the newly
introduced helper macro.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/tegra/fb.c| 2 +-
drivers/gpu/drm/tegra/plane.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/driv
Hi Dave and Daniel,
here's the second PR for drm-misc-next for this week, and the final one
for 5.14. I backmerged drm-next for the TTM changes. As for highlights
nouveau now has eDP backlight support and udmabuf supports huge pages.
Best regards
Thomas
drm-misc-next-2021-06-10:
drm-misc-next fo
https://bugzilla.kernel.org/show_bug.cgi?id=213391
Bug ID: 213391
Summary: AMDGPU retries page fault with some specific processes
amdgpu: [gfxhub0] retry page fault until *ERROR* ring
gfx timeout, but soft recovered
Product:
On Thu, Jun 10, 2021 at 11:39 AM Christian König
wrote:
> Am 10.06.21 um 11:29 schrieb Tvrtko Ursulin:
> > On 09/06/2021 22:29, Jason Ekstrand wrote:
> >> Ever since 0eafec6d3244 ("drm/i915: Enable lockless lookup of request
> >> tracking via RCU"), the i915 driver has used SLAB_TYPESAFE_BY_RCU (i
https://bugzilla.kernel.org/show_bug.cgi?id=213391
--- Comment #1 from Lahfa Samy (s...@lahfa.xyz) ---
Created attachment 297287
--> https://bugzilla.kernel.org/attachment.cgi?id=297287&action=edit
dmesg-chromium-amdgpu-retry-page-fault
In the dmesg, there is the end of an entry to a sleep stat
https://bugzilla.kernel.org/show_bug.cgi?id=213391
Lahfa Samy (s...@lahfa.xyz) changed:
What|Removed |Added
CC||s...@lahfa.xyz
--- Comment
On 10/06/2021 02:15, Bjorn Andersson wrote:
Handling of the interrupt callback lists is done in dpu_core_irq.c,
under the "cb_lock" spinlock. When these operations results in the need
for enableing or disabling the IRQ in the hardware the code jumps to
dpu_hw_interrupts.c, which protects its oper
+ Jesse
Quoting Colin Ian King (2021-06-09 14:50:07)
> Hi,
>
> I was reviewing some old unassigned variable warnings from static
> analysis by Coverity and found an issue introduced with the following
> commit:
>
> commit aa7ffc01d254c91a36bf854d57a14049c6134c72
> Author: Jesse Barnes
> Date:
On Thu, Jun 10, 2021 at 1:29 PM Daniel Vetter wrote:
> On Thu, Jun 10, 2021 at 11:39 AM Christian König
> wrote:
> > Am 10.06.21 um 11:29 schrieb Tvrtko Ursulin:
> > > On 09/06/2021 22:29, Jason Ekstrand wrote:
> > >> Ever since 0eafec6d3244 ("drm/i915: Enable lockless lookup of request
> > >> tr
(Address for Hans was corrupt in previous message, which confused my mail
client. Sorry for duplicate message, the other is without From: field).
+ Jesse
Quoting Colin Ian King (2021-06-09 14:50:07)
> Hi,
>
> I was reviewing some old unassigned variable warnings from static
> analysis by Coverit
Hi,
Here's a PR for the changes to hdmi-codec that need to be shared between
drm-misc-next and ASoC.
This is the second iteration, fixing a bisection issue with compilation
Thanks!
Maxime
The following changes since commit 6efb943b8616ec53a5e444193dccf1af9ad627b5:
Linux 5.13-rc1 (2021-05-09
Hi Mark
On Wed, Jun 09, 2021 at 01:43:04PM +0100, Mark Brown wrote:
> On Tue, May 25, 2021 at 03:23:46PM +0200, Maxime Ripard wrote:
> > The IEC958 status bits can be exposed and modified by the userspace
> > through dedicated ALSA controls.
> >
> > This patch implements those controls for the hd
https://bugzilla.kernel.org/show_bug.cgi?id=213391
Lahfa Samy (s...@lahfa.xyz) changed:
What|Removed |Added
Summary|AMDGPU retries page fault |AMDGPU retries page fault
https://bugzilla.kernel.org/show_bug.cgi?id=213391
Lahfa Samy (s...@lahfa.xyz) changed:
What|Removed |Added
Summary|AMDGPU retries page fault |AMDGPU retries page fault
https://bugzilla.kernel.org/show_bug.cgi?id=213391
Nirmoy (nirmoy.ai...@gmail.com) changed:
What|Removed |Added
CC||nirmoy.ai...@gmail.com
Hi
On Tue, Jun 08, 2021 at 07:43:17PM +0200, Werner Sembach wrote:
> This commits implements the "active bpc" drm property for the Intel GPU
> driver.
>
> Signed-off-by: Werner Sembach
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 14 ++
> drivers/gpu/drm/i915/display/inte
https://bugzilla.kernel.org/show_bug.cgi?id=213391
--- Comment #4 from Lahfa Samy (s...@lahfa.xyz) ---
I have about 1GB of VRAM currently set according to glxinfo:
Extended renderer info (GLX_MESA_query_renderer):
Vendor: AMD (0x1002)
Device: AMD Radeon(TM) Vega 10 Graphics (RAVEN, DRM 3.
On Wed, Jun 09, 2021 at 08:00:39PM -0300, Leandro Ribeiro wrote:
> Add a small description and document struct fields of
> drm_mode_get_plane.
>
> Signed-off-by: Leandro Ribeiro
> ---
> include/uapi/drm/drm_mode.h | 36
> 1 file changed, 36 insertions(+)
>
>
Hi Steven,
> > The GPU exception fault status register(0x3C),the low 8 bit is the
> > EXCEPTION_TYPE.We can see the description at P3-78 in spec.
You can see the spec
.
> However this change is correct - panfrost_exception_name() should be
> taking only the lower 8 bits. Even bet
On 10/06/2021 12:29, Daniel Vetter wrote:
On Thu, Jun 10, 2021 at 11:39 AM Christian König
wrote:
Am 10.06.21 um 11:29 schrieb Tvrtko Ursulin:
On 09/06/2021 22:29, Jason Ekstrand wrote:
Ever since 0eafec6d3244 ("drm/i915: Enable lockless lookup of request
tracking via RCU"), the i915 driver
https://bugzilla.kernel.org/show_bug.cgi?id=213391
--- Comment #5 from Nirmoy (nirmoy.ai...@gmail.com) ---
Please let me know what distro are you using then I can prepare a complete
guide.
--
You may reply to this email to add a comment.
You are receiving this mail because:
You are watching the
Hi Dave, Daniel,
please pull the following updates for the next merge window:
- remove redundant NULL checks by various people
- fix sparse checker warnings from Marc
- expose more GPU ID values to userspace from Christian
- add HWDB entry for GPU found on i.MX8MP from Sascha
- rework of the line
https://bugzilla.kernel.org/show_bug.cgi?id=213391
--- Comment #6 from Lahfa Samy (s...@lahfa.xyz) ---
I'm under ArchLinux running with the ZFS module (I can't boot and mount the
root/home "partition" without it), thanks for the time you'll be taking to make
this guide, I'll be trying my best to t
On 10.06.2021 06:38, Matthew Brost wrote:
> On Wed, Jun 09, 2021 at 10:07:21PM +0200, Michal Wajdeczko wrote:
>>
>>
>> On 09.06.2021 19:36, John Harrison wrote:
>>> On 6/7/2021 18:23, Daniele Ceraolo Spurio wrote:
On 6/7/2021 11:03 AM, Matthew Brost wrote:
> From: Michal Wajdeczko
This adds a new driver for the Samsung DB7430 DPI display
controller as controlled over SPI.
Right now the only panel product we know that is using this
display controller is the LMS397KF04 but there may be more.
This is the first regular panel driver making use of the
MIPI DBI helper library. Th
On Thu, Jun 10, 2021 at 1:15 PM Thomas Zimmermann wrote:
>
> Hi Dave and Daniel,
>
> here's the second PR for drm-misc-next for this week, and the final one
> for 5.14. I backmerged drm-next for the TTM changes. As for highlights
> nouveau now has eDP backlight support and udmabuf supports huge pa
On Thu, Jun 10, 2021 at 6:30 AM Daniel Vetter wrote:
>
> On Thu, Jun 10, 2021 at 11:39 AM Christian König
> wrote:
> > Am 10.06.21 um 11:29 schrieb Tvrtko Ursulin:
> > > On 09/06/2021 22:29, Jason Ekstrand wrote:
> > >> Ever since 0eafec6d3244 ("drm/i915: Enable lockless lookup of request
> > >>
On 10.06.2021 06:36, Matthew Brost wrote:
> As part of enabling GuC submission [1] we need to update to the latest
> and greatest firmware. This series does that. This is a destructive
> change. e.g. Without all the patches in this series it will break the
not really 'all'
> i915 driver. As su
On Thu, Jun 10, 2021 at 04:08:40PM +0800, Koenig, Christian wrote:
>
>
> Am 09.06.21 um 19:45 schrieb Mikko Perttunen:
> > On 6/9/21 8:29 PM, Christian König wrote:
> >> TTMs buffer objects are based on GEM objects for quite a while
> >> and rely on initializing those fields before initializing t
On 15/05/2021 16:12, Dmitry Baryshkov wrote:
This patch series brings back several patches targeting assigning dispcc
clock parents, that were removed from the massive dsi rework patchset
earlier.
Gracious ping for this series. I'd ask to skip patch 8 for now (as we
might bring that back for m
On Thu, Jun 10, 2021 at 5:08 AM Tvrtko Ursulin
wrote:
>
>
> On 09/06/2021 22:29, Jason Ekstrand wrote:
> > Instead of attempting to recycle a request in to the cache when it
> > retires, stuff a new one in the cache every time we allocate a request
> > for some other reason.
>
> I supposed the "wh
Matthew Brost wrote on śro [2021-cze-09 21:36:45
-0700]:
> From: Michal Wajdeczko
>
> GuC ABI documentation is now ready to be included in i915.rst
>
> Signed-off-by: Michal Wajdeczko
> Signed-off-by: Matthew Brost
> Cc: Piotr Piórkowski
Acked-by: Piotr Piórkowski
> ---
> Documentation/
On Thu, Jun 10, 2021 at 5:04 AM Tvrtko Ursulin
wrote:
>
> On 09/06/2021 22:29, Jason Ekstrand wrote:
> > This appears to break encapsulation by moving an intel_engine_cs
> > function to a i915_request file. However, this function is
> > intrinsically tied to the lifetime rules and allocation sche
On Thu, Jun 10, 2021 at 02:50:36PM +0200, Maxime Ripard wrote:
> Hi
>
> On Tue, Jun 08, 2021 at 07:43:17PM +0200, Werner Sembach wrote:
> > This commits implements the "active bpc" drm property for the Intel GPU
> > driver.
> >
> > Signed-off-by: Werner Sembach
> > ---
> > drivers/gpu/drm/i915
On Thu, Jun 10, 2021 at 1:51 AM Christian König
wrote:
>
> Am 09.06.21 um 23:29 schrieb Jason Ekstrand:
> > This helper existed to handle the weird corner-cases caused by using
> > SLAB_TYPESAFE_BY_RCU for backing dma_fence. Now that no one is using
> > that anymore (i915 was the only real user),
On Tue, Jun 08, 2021 at 07:19:31PM +0200, Werner Sembach wrote:
>
> Am 07.06.21 um 22:33 schrieb Werner Sembach:
> > Am 07.06.21 um 08:47 schrieb Werner Sembach:
> >>
> >> Am 04.06.21 um 19:30 schrieb Ville Syrjälä:
> >>> On Fri, Jun 04, 2021 at 07:17:23PM +0200, Werner Sembach wrote:
> This
Use an rwlock instead of spinlock for the global notifier lock
to reduce risk of contention in execbuf.
Protect object state with the object lock whenever possible rather
than with the global notifier lock
Don't take an explicit page_ref in userptr_submit_init() but rather
call get_pages() after
On Thu, Jun 10, 2021 at 12:39:55PM +0200, Zbigniew Kempczyński wrote:
> We have established previously we stop using relocations starting
> from gen12 platforms with Tigerlake as an exception. We keep this
> statement but we want to enable relocations conditionally for
> Rocketlake and Alderlake un
On Thu 10 Jun 06:46 CDT 2021, Dmitry Baryshkov wrote:
> On 10/06/2021 02:15, Bjorn Andersson wrote:
> > Handling of the interrupt callback lists is done in dpu_core_irq.c,
> > under the "cb_lock" spinlock. When these operations results in the need
> > for enableing or disabling the IRQ in the hard
On Fri, Jun 04, 2021 at 04:49:05PM +0100, Emil Velikov wrote:
> From: Emil Velikov
>
> Currently as the workaround is applied the screen flickers. As a result
> we do not achieve seamless boot experience.
>
> Avoiding the issue in the common use-case might be hard, although we can
> resolve it f
On 10/06/2021 14:57, Jason Ekstrand wrote:
On Thu, Jun 10, 2021 at 5:04 AM Tvrtko Ursulin
wrote:
On 09/06/2021 22:29, Jason Ekstrand wrote:
This appears to break encapsulation by moving an intel_engine_cs
function to a i915_request file. However, this function is
intrinsically tied to the
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