The ACPI OpRegion Mailbox #5 ASLE extension may contain an EDID to be
used for the embedded display. Add support for using it via by adding
the EDID to the list of available modes on the connector.
Based on original patch by: Jani Nikula
Changes:
- EDID is copied and validated with drm_edid_is_
From: Jani Nikula
If a panel's EDID is broken, there may be an override EDID set in the
ACPI OpRegion mailbox #5. Use it if available.
Fixes the GPD Win Max display.
Cc: Uma Shankar
Signed-off-by: Jani Nikula
Signed-off-by: Anisse Astier
[Anisse changes: function name]
---
drivers/gpu/drm/
Panel is 800x1280, but mounted on a laptop form factor, sideways.
Signed-off-by: Anisse Astier
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/drm_panel_orientation_quirks.c
b/drivers/gpu/drm/drm_panel_orientation_quir
This patch series is for making the GPD Win Max display usable with
Linux.
The GPD Win Max is a small laptop, and its eDP panel does not send an
EDID over DPCD; the EDID is instead available in the intel opregion, in
mailbox #5 [1]
The first two patches are based on Jani's patch series [2] adding
Hi Martin,
On 20/05/2021 22:25, Martin Blumenstingl wrote:
> Hi Neil,
>
> since this has not received any Reviewed-by yet I tried my best to
> review it myself
>
> On Fri, Apr 30, 2021 at 10:28 AM Neil Armstrong
> wrote:
> [...]
>> --- a/drivers/gpu/drm/meson/meson_drv.c
>> +++ b/drivers/gpu/d
On 30/04/2021 10:27, Neil Armstrong wrote:
> When main component is not probed, by example when the dw-hdmi module is
> not loaded yet or in probe defer, the following crash appears on shutdown:
>
> Unable to handle kernel NULL pointer dereference at virtual address
> 0038
> ...
> pc
Function 'intel_dbuf_init' is declared twice, remove the
repeated declaration.
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Signed-off-by: Shaokun Zhang
---
drivers/gpu/drm/i915/intel_pm.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.h b/drivers/g
This series adds the support for the eDP panel that needs the backlight
controlling over the DP AUX channel using DPCD registers of the panel
as per the VESA's standard.
This series also adds support for the Samsung eDP AMOLED panel that
needs DP AUX to control the backlight, and introduces new de
Add basic support of panel backlight control over eDP aux channel
using VESA's standard backlight control interface.
Signed-off-by: Rajeev Nandan
---
This patch depends on [1] (drm/panel: panel-simple: Stash DP AUX bus;
allow using it for DDC)
Changes in v4:
- New
[1]
https://lore.kernel.or
Add Samsung 13.3" FHD eDP AMOLED panel.
Signed-off-by: Rajeev Nandan
---
Changes in v4:
- New
Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
b/Documentati
Some panels datasheets may specify a delay between the enable GPIO and
the regulator. Support this in panel-simple.
Signed-off-by: Rajeev Nandan
---
Changes in v4:
- New
drivers/gpu/drm/panel/panel-simple.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gp
Add Samsung 13.3" FHD eDP AMOLED panel.
Signed-off-by: Rajeev Nandan
---
Changes in v4:
- New
drivers/gpu/drm/panel/panel-simple.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.
On Fri, 07 May 2021 16:03:24 +0200,
Maxime Ripard wrote:
>
> In some situations, like a codec probe, we need to provide an IEC status
> default but don't have access to the sampling rate and width yet since
> no stream has been configured yet.
>
> Each and every driver has its own default, wherea
Function 'r300_mc_wait_for_idle' and 'r600_mc_wait_for_idle'
are declared twice, remove the repeated declaration.
Cc: Alex Deucher
Cc: "Christian König"
Signed-off-by: Shaokun Zhang
---
drivers/gpu/drm/radeon/radeon_asic.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/ra
Hi,
On 18-05-2021 01:51, Doug Anderson wrote:
Hi,
On Tue, May 11, 2021 at 4:17 PM Doug Anderson
wrote:
Hi,
On Tue, May 11, 2021 at 11:12 AM wrote:
>
> On 01-05-2021 03:08, Doug Anderson wrote:
> > Hi,
> >
> > On Fri, Apr 30, 2021 at 8:10 AM wrote:
> >>
> >> On 30-04-2021 02:33, Doug Ande
Function 'vmw_context_binding_list' is declared twice, remove the
repeated declaration.
Cc: VMware Graphics
Cc: Roland Scheidegger
Cc: Zack Rusin
Signed-off-by: Shaokun Zhang
---
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwg
On Mon, May 24, 2021 at 03:20:54PM +0800, Zou Wei wrote:
> pm_runtime_get_sync will increment pm usage counter even it failed.
> Forgetting to putting operation will result in reference leak here.
> Fix it by replacing it with pm_runtime_resume_and_get to keep usage
> counter balanced.
>
> Reporte
On Mon, 24 May 2021 15:39:04 +0200,
Maxime Ripard wrote:
>
> Hi,
>
> On Fri, May 07, 2021 at 04:03:23PM +0200, Maxime Ripard wrote:
> > Hi,
> >
> > hdmi-codec allows to have a lot of HDMI-audio related infrastructure in
> > place,
> > it's missing a few controls to be able to provide HBR passth
On 06/05/2021 20:13, Matthew Brost wrote:
From: Chris Wilson
Now that we no longer switch back and forth between guc and execlists,
we no longer need to restore the backend's vfunc and can leave them set
after initialisation. The only catch is that we lose the submission on
wedging and still
On 06/05/2021 20:13, Matthew Brost wrote:
From: Chris Wilson
Since we setup the submission method for the engines once, it is easy to
assign an enum and use that instead of probing into the backends.
Signed-off-by: Matthew Brost
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Same, this
On 06/05/2021 20:13, Matthew Brost wrote:
From: Chris Wilson
The different submission backends each have their own preferred
behaviour and interrupt setup. Let each handle their own interrupts.
This becomes more useful later as we to extract the use of auxiliary
state in the interrupt handle
On 06/05/2021 20:13, Matthew Brost wrote:
From: John Harrison
With virtual engines, it is no longer possible to know which specific
physical engine a given request will be executed on at the time that
request is generated. This means that the request itself must be engine
agnostic - any direc
The drm_connector detect, drm_dp_aux transfer and mipi_dsi_host
operations typically require to access their underlying device to
perform what is expected of them.
However, there's no guarantee on the fact that the device has been
enabled through atomic_enable or similar that will usually power th
Hi,
This fixes an issue found during a rework on the RPi3 where we would
end up with the detect callback of the HDMI connector called while the
device would be disabled.
This unfortunately results in a complete CPU hang on the RaspberryPi.
The documentation doesn't really provide any expectation
In order to access the HDMI controller, we need to make sure the HSM
clock is enabled. If we were to access it with the clock disabled, the
CPU would completely hang, resulting in an hard crash.
Since we have different code path that would require it, let's move that
clock enable / disable to runt
If the HPD GPIO is not available and drm_probe_ddc fails, we end up
reading the HDMI_HOTPLUG register, but the controller might be powered
off resulting in a CPU hang. Make sure we have the power domain and the
HSM clock powered during the detect cycle to prevent the hang from
happening.
Fixes: 4f
On Fri, 21 May 2021 at 16:33, Thomas Hellström
wrote:
>
> The internal ttm_bo_util memcpy uses ioremap functionality, and while it
> probably might be possible to use it for copying in- and out of
> sglist represented io memory, using io_mem_reserve() / io_mem_free()
> callbacks, that would cause
On 06/05/2021 20:13, Matthew Brost wrote:
Add non blocking CTB send function, intel_guc_send_nb. In order to
support a non blocking CTB send function a spin lock is needed to
protect the CTB descriptors fields. Also the non blocking call must not
update the fence value as this value is owned by
On Tuesday, 25 May 2021 11:31:17 AM AEST John Hubbard wrote:
> On 5/24/21 3:11 PM, Andrew Morton wrote:
> >> ...
> >>
> >> Documentation/vm/hmm.rst | 17
> >> include/linux/mmu_notifier.h | 6 ++
> >> include/linux/rmap.h | 4 +
> >> include/linux/swap.h | 7 +-
Hi Takashi,
On Tue, May 25, 2021 at 10:35:14AM +0200, Takashi Iwai wrote:
> On Mon, 24 May 2021 15:39:04 +0200,
> Maxime Ripard wrote:
> >
> > Hi,
> >
> > On Fri, May 07, 2021 at 04:03:23PM +0200, Maxime Ripard wrote:
> > > Hi,
> > >
> > > hdmi-codec allows to have a lot of HDMI-audio related i
On 06/05/2021 20:13, Matthew Brost wrote:
With the introduction of non-blocking CTBs more than one CTB can be in
flight at a time. Increasing the size of the CTBs should reduce how
often software hits the case where no space is available in the CTB
buffer.
I'd move this before the patch which
On Tue, 25 May 2021 11:23:53 +0200,
Maxime Ripard wrote:
>
> Hi Takashi,
>
> On Tue, May 25, 2021 at 10:35:14AM +0200, Takashi Iwai wrote:
> > On Mon, 24 May 2021 15:39:04 +0200,
> > Maxime Ripard wrote:
> > >
> > > Hi,
> > >
> > > On Fri, May 07, 2021 at 04:03:23PM +0200, Maxime Ripard wrote:
Hi Thomas,
On Thu, Apr 15, 2021 at 1:15 PM Thomas Zimmermann wrote:
> It's only used by DRM_FBDEV_EMULATION, so inline it there.
>
> Signed-off-by: Thomas Zimmermann
> ---
> drivers/gpu/drm/Kconfig | 28 +++-
> 1 file changed, 11 insertions(+), 17 deletions(-)
>
> diff -
On 5/25/21 11:18 AM, Matthew Auld wrote:
On Fri, 21 May 2021 at 16:33, Thomas Hellström
wrote:
The internal ttm_bo_util memcpy uses ioremap functionality, and while it
probably might be possible to use it for copying in- and out of
sglist represented io memory, using io_mem_reserve() / io_mem
Hi,
On Tue, May 25, 2021 at 09:33:49AM +0200, Takashi Iwai wrote:
> On Fri, 07 May 2021 16:03:24 +0200,
> Maxime Ripard wrote:
> >
> > In some situations, like a codec probe, we need to provide an IEC status
> > default but don't have access to the sampling rate and width yet since
> > no stream
On 06/05/2021 20:13, Matthew Brost wrote:
Implement GuC submission tasklet for new interface. The new GuC
interface uses H2G to submit contexts to the GuC. Since H2G use a single
channel, a single tasklet submits is used for the submission path. As
such a global struct intel_engine_cs has been
On 06/05/2021 20:14, Matthew Brost wrote:
Disable semaphores when using GuC scheduling as semaphores are broken in
the current GuC firmware.
What is "current"? Given that the patch itself is like year and a half old.
Regards,
Tvrtko
Cc: John Harrison
Signed-off-by: Matthew Brost
---
d
On Tue, 25 May 2021 at 10:32, Thomas Hellström
wrote:
>
>
> On 5/25/21 11:18 AM, Matthew Auld wrote:
> > On Fri, 21 May 2021 at 16:33, Thomas Hellström
> > wrote:
> >> The internal ttm_bo_util memcpy uses ioremap functionality, and while it
> >> probably might be possible to use it for copying in
Hi
Am 23.05.21 um 21:19 schrieb Paul Cercueil:
Hi Thomas,
Le dim., mai 23 2021 at 21:05:30 +0200, Thomas Zimmermann
a écrit :
Hi
Am 23.05.21 um 19:04 schrieb Paul Cercueil:
V5 of my patchset which adds the option for having GEM buffers backed
by
non-coherent memory.
Changes from V4:
-
On 06/05/2021 20:14, Matthew Brost wrote:
When running the GuC the GPU can't be considered idle if the GuC still
has contexts pinned. As such, a call has been added in
intel_gt_wait_for_idle to idle the UC and in turn the GuC by waiting for
the number of unpinned contexts to go to zero.
Cc: Jo
On Tue, 2021-05-25 at 10:58 +0100, Matthew Auld wrote:
> On Tue, 25 May 2021 at 10:32, Thomas Hellström
> wrote:
> >
> >
> > On 5/25/21 11:18 AM, Matthew Auld wrote:
> > > On Fri, 21 May 2021 at 16:33, Thomas Hellström
> > > wrote:
> > > > The internal ttm_bo_util memcpy uses ioremap functional
On 06/05/2021 20:14, Matthew Brost wrote:
From: John Harrison
The serial number tracking of engines happens at the backend of
request submission and was expecting to only be given physical
engines. However, in GuC submission mode, the decomposition of virtual
to physical engines does not happ
On 5/18/21 1:02 AM, Laurent Pinchart wrote:
Hi Marek,
Hi,
Thank you for the patch.
On Sat, May 15, 2021 at 10:46:55PM +0200, Marek Vasut wrote:
Decoder input LVDS format is a property of the decoder chip or even
its strapping. Add DT property data-mapping the same way lvds-panel
does, to de
On 06/05/2021 20:13, Matthew Brost wrote:
Basic GuC submission support. This is the first bullet point in the
upstreaming plan covered in the following RFC [1].
At a very high level the GuC is a piece of firmware which sits between
the i915 and the GPU. It offloads some of the scheduling of co
On 5/18/21 1:03 AM, Laurent Pinchart wrote:
[...]
+if:
+ not:
+properties:
+ compatible:
+contains:
+ const: lvds-decoder
+then:
+ properties:
+data-mapping: false
Should we make the property required for lvds-decoder ? We need to
support backward compatibility
On 5/18/21 1:03 AM, Laurent Pinchart wrote:
Hi,
[...]
@@ -69,10 +70,33 @@ static void lvds_codec_disable(struct drm_bridge *bridge)
"Failed to disable regulator \"vcc\": %d\n", ret);
}
+static bool lvds_codec_mode_fixup(struct drm_bridge *bridge,
+
Hi Laurent,
On Mon, May 24, 2021 at 07:04:43AM +0300, Laurent Pinchart wrote:
> Hi Maxime,
>
> Thank you for the patch.
>
> On Thu, May 20, 2021 at 04:24:35PM +0200, Maxime Ripard wrote:
> > New KMS properties come with a bunch of requirements to avoid each
> > driver from running their own, in
In the function amdgpu_uvd_cs_msg(), every branch in the switch
statement will have a return, so the code below the switch statement
will not be executed.
Eliminate the follow smatch warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c:845 amdgpu_uvd_cs_msg() warn:
ignoring unreachable code.
Reporte
Function 'dc_power_down_on_boot' is declared twice, remove the
repeated declaration.
Cc: Harry Wentland
Cc: Leo Li
Cc: Alex Deucher
Signed-off-by: Shaokun Zhang
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/
On 5/17/21 3:23 PM, Mike Looijmans wrote:
Which system/soc are you testing this on ?
[...]
+static void sn65dsi83_pre_enable(struct drm_bridge *bridge)
+{
+ struct sn65dsi83 *ctx = bridge_to_sn65dsi83(bridge);
+
+ /*
+ * Reset the chip, pull EN line low for t_reset=10ms,
+ * then
On Fri, 21 May 2021 at 16:33, Thomas Hellström
wrote:
>
> If the bo is idle when calling ttm_bo_pipeline_gutting(), we unnecessarily
> create a ghost object and push it out to delayed destroy.
> Fix this by adding a path for idle, and document the function.
>
> Also avoid having the bo end up in a
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/nouveau/nouveau_display.c: In function
'nouveau_framebuffer_new':
drivers/gpu/drm/nouveau/nouveau_display.c:309:15: warning:
variable ‘width’ set but not used [-Wunused-but-set-variable]
It never used since introduction.
Signed-off
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/nouveau/nouveau_bo.c: In function 'nouveau_ttm_tt_populate':
drivers/gpu/drm/nouveau/nouveau_bo.c:1258:17: warning:
variable ‘dev’ set but not used [-Wunused-but-set-variable]
drivers/gpu/drm/nouveau/nouveau_bo.c: In function 'nouvea
Use pm_runtime_resume_and_get() instead of pm_runtime_get_sync()
to deal with usage counter. pm_runtime_get_sync() increases the
usage counter even when it failed, which makes callers to forget
to decrease the usage counter and resulted in reference leak.
pm_runtime_resume_and_get() function decre
The result of container_of() operations is never NULL unless the embedded
element is the first element of the structure. This is not the case here.
The NULL checks on the result of container_of() are therefore unnecessary
and misleading. Remove them.
This change was made automatically with the fol
Add bindings for the SONY Synaptics JDI panel used in
Xperia X, X Performance, X Compact, XZ and XZs smartphones.
Due to the nature of phone manufacturing and lack of any docs
whatsoever, replacement names have been used to indicate the
devices that this panel is used on.
Signed-off-by: Konrad Dy
From: AngeloGioacchino Del Regno
This commit adds support for Synaptics+JDI display panels
used in SONY Xperia X, X Compact, X Performance, XZ and XZs
smartphones.
Due to the nature of phone manufacturing, it is impossible
to retrieve the actual panel names, hence the replacement
ones, detailing
Hi Rajeev,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[also build test ERROR on next-20210525]
[cannot apply to robh/for-next drm-intel/for-linux-next
drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next linus/master
drm/drm-next v5.13-rc3
On Mon, May 24, 2021 at 03:11:57PM -0700, Andrew Morton wrote:
> On Mon, 24 May 2021 23:27:22 +1000 Alistair Popple wrote:
>
> > Some devices require exclusive write access to shared virtual
> > memory (SVM) ranges to perform atomic operations on that memory. This
> > requires CPU page tables to
Hi
Am 24.05.21 um 11:58 schrieb Jani Nikula:
On Mon, 24 May 2021, Zhenyu Wang wrote:
On 2021.05.22 21:19:38 +0200, Thomas Zimmermann wrote:
Hi,
after creating drm-tip today as part of [1], building drm-tip is now broken
with the error message shown below.
Some register constants appear to b
See below...
Met vriendelijke groet / kind regards,
Mike Looijmans
System Expert
TOPIC Embedded Products B.V.
Materiaalweg 4, 5681 RJ Best
The Netherlands
T: +31 (0) 499 33 69 69
E: mike.looijm...@topicproducts.com
W: www.topic.nl
Please consider the environment before printing this e-mail
Function 'dp_catalog_audio_enable' is declared twice, remove the
repeated declaration.
Cc: Rob Clark
Cc: Abhinav Kumar
Signed-off-by: Shaokun Zhang
---
drivers/gpu/drm/msm/dp/dp_catalog.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h
b/drivers/gpu/drm/
Function 'evergreen_print_gpu_status_regs' is declared twice, remove
the repeated declaration.
Cc: Alex Deucher
Cc: "Christian König"
Signed-off-by: Shaokun Zhang
---
drivers/gpu/drm/radeon/evergreen.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.h
b/dri
https://bugzilla.kernel.org/show_bug.cgi?id=212469
Amir (amirg...@criptext.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolutio
On Mon, May 24, 2021 at 03:04:35PM -0500, Jason Ekstrand wrote:
> On Fri, May 21, 2021 at 12:48 PM Daniel Vetter wrote:
> >
> > On Thu, May 20, 2021 at 02:00:05PM -0500, Jason Ekstrand wrote:
> > > Add a helper function to get a single fence representing
> > > all fences in a dma_resv object.
> >
The amdgpu_bo_unreserve() has to be done on the error path as well.
Fixes: b4f0f97b8f5f ("drm/amdgpu: Move kfd_mem_attach outside reservation")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/
If amdgpu_gem_prime_export() fails, then this code accidentally
returns zero/success instead of a negative error code.
Fixes: 190f2d7696c8 ("drm/amdgpu: Add DMA mapping of GTT BOs")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 4 +++-
1 file changed, 3 inse
On 25.05.2021 04:47, Matthew Brost wrote:
> On Thu, May 06, 2021 at 12:13:25PM -0700, Matthew Brost wrote:
>> From: Michal Wajdeczko
>>
>> In upcoming GuC firmware, CTB size will be removed from the CTB
>> descriptor so we must keep it locally for any calculations.
>>
>> While around, improve s
On 5/25/21 2:08 PM, Mike Looijmans wrote:
See below...
You can just comment inline and skip this top-post.
Met vriendelijke groet / kind regards,
Mike Looijmans
System Expert
TOPIC Embedded Products B.V.
Materiaalweg 4, 5681 RJ Best
The Netherlands
T: +31 (0) 499 33 69 69
E: mike.looijm..
Hi Christian,
On Sat, May 22, 2021 at 10:30:19AM +0200, Christian König wrote:
> Am 21.05.21 um 20:31 schrieb Daniel Vetter:
> > [SNIP]
> > > We could provide an IOCTL for the BO to change the flag.
> > That's not the semantics we need.
> >
> > > But could we first figure out the semantics we wan
On 25.05.2021 04:53, Matthew Brost wrote:
> On Thu, May 06, 2021 at 12:13:26PM -0700, Matthew Brost wrote:
>> From: Michal Wajdeczko
>>
>> We can retrieve offsets to cmds buffers and descriptor from
>> actual pointers that we already keep locally.
>>
>> Signed-off-by: Michal Wajdeczko
>> Signe
On Fri, May 21, 2021 at 08:53:56PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 21.05.21 um 19:18 schrieb Javier Martinez Canillas:
> > On 5/21/21 6:53 PM, Thomas Zimmermann wrote:
> >
> > [snip]
> >
> > > >
> > > > So what with all the drivers which do _not_ have drm in their name? Also
> > > >
Update MDP5 display driver to support current implementation of
alpha/blend mode/zpos properties. On top of that port bandwidth
management from DPU display driver.
The following changes since commit 8dbde399044b0f5acf704ab5f8116bd8b1dfcf95:
drm/msm/dp: handle irq_hpd with sink_count = 0 correct
Hook alpha and pixel blend mode support to be exported as proper DRM
plane properties. This allows using this functionality from the
userspace.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/
Instead of implemeting zpos property on our own, use standard zpos
property support.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c | 2 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h | 3 -
drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 114 ++---
Use generic helpers code to manage drm_plane_state part of mdp5_plane
state instead of manually coding all the details.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/d
Use drm_plane_state's 'pixel_blend_mode' field rather than using
'premultiplied' field to mdp5_plane_state.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c | 6 --
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h | 1 -
drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 5
From: James Willcox
Prior downstream kernels had "fudge factors" in devicetree which would
be applied to things like interconnect bandwidth calculations. Bring
some of those values back here.
Signed-off-by: James Willcox
[DB: changed _ff to _inefficiency, fixed patch description]
Signed-off-by:
Use drm_plane_state's 'alpha' field rather than adding extra 'alpha'
field to mdp5_plane_state.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c | 4 ++--
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h | 1 -
drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 3 +--
3 files c
Instead of using static bandwidth setup, manage bandwidth dynamically,
depending on the amount of allocated planes, their format and
resolution.
Co-developed-with: James Willcox
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c | 44
drivers/gpu/drm/msm/di
Hi Dave and of course everybody else,
Am 24.05.21 um 04:03 schrieb Dave Airlie:
I'd like to try and summarise where I feel we are all at with respect
to the dma-buf discussions. I think I've gotten a fairly good idea of
how things stand but I'm not sure we are really getting to the how to
move t
We're going to add more controls to support the IEC958 output, so let's
rework the control registration a bit to support more of them.
Signed-off-by: Maxime Ripard
---
sound/soc/codecs/hdmi-codec.c | 43 ++-
1 file changed, 27 insertions(+), 16 deletions(-)
diff
The doc currently mentions that the IEC958 Playback Default should be
exposed on the PCM iface, and the Playback Mask on the mixer iface.
It's a bit confusing to advise to have two related controls on two
separate ifaces, and it looks like the drivers that currently expose
those controls use any c
In some situations, like a codec probe, we need to provide an IEC status
default but don't have access to the sampling rate and width yet since
no stream has been configured yet.
Each and every driver has its own default, whereas the core iec958 code
also has some buried in the snd_pcm_create_iec9
Hi,
hdmi-codec allows to have a lot of HDMI-audio related infrastructure in place,
it's missing a few controls to be able to provide HBR passthrough. This series
adds more infrastructure for the drivers, and leverages it in the vc4 HDMI
controller driver.
Thanks!
Maxime
Changes from v1:
- Adde
The IEC958 status bit is usually set by the userspace after hw_params
has been called, so in order to use whatever is set by the userspace, we
need to implement the prepare hook. Let's add it to the hdmi_codec_ops,
and mandate that either prepare or hw_params is implemented.
Signed-off-by: Maxime
The hdmi-codec brings a lot of advanced features, including the HDMI
channel mapping. Let's use it in our driver instead of our own codec.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/Kconfig| 1 +
drivers/gpu/drm/vc4/vc4_hdmi.c | 243 +++--
drivers/gpu/
From: Dom Cobley
Enable NO_WAIT_RESP, DMA_WIDE_SOURCE, DMA_WIDE_DEST, and bump the DMA
panic and AXI priorities to avoid any DMA transfer error with HBR audio
(8 channel, 192Hz).
Signed-off-by: Dom Cobley
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/bcm2711.dtsi | 4 ++--
1 file changed
From: Dom Cobley
Symptom is random switching of speakers when using multichannel.
Repeatedly running speakertest -c8 occasionally starts with
channels jumbled. This is fixed with HD_CTL_WHOLSMP.
The other bit looks beneficial and apears harmless in testing so
I'd suggest adding it too.
Documen
The IEC958 status bits can be exposed and modified by the userspace
through dedicated ALSA controls.
This patch implements those controls for the hdmi-codec driver. It
relies on a default value being setup at probe time that can later be
overridden by the control put.
The hw_params callback is th
From: Dom Cobley
The hardware uses this for generating the right audio
data island packets when using formats other than PCM
Signed-off-by: Dom Cobley
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 48 ++
drivers/gpu/drm/vc4/vc4_regs.h | 30 +
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 26 --
drivers/gpu/drm/vc4/vc4_hdmi.h | 2 --
2 files changed, 12 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 0ecfcf54b70a..c6dafeab437
From: Dom Cobley
Without this bit set, HDMI_MAI_FORMAT doesn't pick up
the format and samplerate from DVP_CFG_MAI0_FMT and you
can't get HDMI_HDMI_13_AUDIO_STATUS_1 to indicate HBR mode
Signed-off-by: Dom Cobley
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 1 +
1 file cha
From: Dom Cobley
This was a workaround for bugs in hardware on earlier Pi models
and wasn't totally successful.
It makes audio quality worse on a Pi4 at the higher sample rates
Signed-off-by: Dom Cobley
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 22 ++--
On Mon, May 24, 2021 at 10:48:00PM -0700, Daniele Ceraolo Spurio wrote:
> From: Bommu Krishnaiah
>
> This api allow user mode to create Protected buffers. Only contexts
> marked as protected are allowed to operate on protected buffers.
>
> We only allow setting the flags at creation time.
>
> A
https://bugzilla.kernel.org/show_bug.cgi?id=212469
--- Comment #6 from DieKleene (mail2021a...@detlef-pogrzeba.de) ---
That is no solution.
The same error occurs on Ubuntu Studio with playmouth.
Only Sparky Linux, with Kernel 4.9, runs without any problems.
This is a problem with the 5.x kern
Hi
Am 25.05.21 um 15:08 schrieb Daniel Vetter:
On Fri, May 21, 2021 at 08:53:56PM +0200, Thomas Zimmermann wrote:
Hi
Am 21.05.21 um 19:18 schrieb Javier Martinez Canillas:
On 5/21/21 6:53 PM, Thomas Zimmermann wrote:
[snip]
So what with all the drivers which do _not_ have drm in their nam
On Tue, 2021-05-25 at 12:00 +0100, Matthew Auld wrote:
> On Fri, 21 May 2021 at 16:33, Thomas Hellström
> wrote:
> >
> > If the bo is idle when calling ttm_bo_pipeline_gutting(), we
> > unnecessarily
> > create a ghost object and push it out to delayed destroy.
> > Fix this by adding a path for i
Hello,
On 5/25/21 3:34 PM, Thomas Zimmermann wrote:
[snip]
>>
>> If you guys with your distro hats on all think it doesn't matter, then
>> yeah I'm all for dropping the somewhat silly -drm or drmfb suffixes. I
>> think that was just way back so it's easier to know you've loaded the
>> right driv
On Fri, May 21, 2021 at 11:32:12AM -0700, Matthew Brost wrote:
> As discussed in [1] start merging some support patches as a precursor to
> GuC submission the i915. This is step #1 mentioned in [1].
>
> [1] https://patchwork.freedesktop.org/series/89844/
>
> Signed-off-by: Matthew Brost
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