From: Yangtao Li
Add devres wrapper for dev_pm_opp_set_clkname() to simplify drivers code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/opp/core.c | 36
include/linux/pm_opp.h | 6 ++
2 files changed, 42 insertions(+)
diff
From: Yangtao Li
Add devres wrapper for dev_pm_opp_set_regulators() to simplify drivers
code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/opp/core.c | 39 +++
include/linux/pm_opp.h | 8
2 files changed, 47 insertions(
From: Yangtao Li
Add devres wrapper for dev_pm_opp_of_add_table() to simplify driver
code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/opp/of.c | 36
include/linux/pm_opp.h | 6 ++
2 files changed, 42 insertions(+)
diff
From: Yangtao Li
Add devres wrapper for dev_pm_opp_set_supported_hw() to simplify driver
code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/opp/core.c | 38 ++
include/linux/pm_opp.h | 8
2 files changed, 46 insertions(
From: Yangtao Li
Add devres wrapper for dev_pm_opp_register_notifier() to simplify driver
code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/opp/core.c | 38 ++
include/linux/pm_opp.h | 6 ++
2 files changed, 44 insertions(+
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/tty/serial/qcom_geni_serial.c | 24 +---
1 file changed, 9 insertions(+), 15 deletions(-)
diff --git a/drivers/tty/serial/qcom_geni_serial.
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Acked-by: Mark brown
Signed-off-by: Dmitry Osipenko
---
drivers/spi/spi-geni-qcom.c | 17 +++--
include/linux/qcom-geni-se.h | 2 --
2 files changed, 7 insertions(+), 12 deletions(-)
diff
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Acked-by: Mark Brown
Signed-off-by: Dmitry Osipenko
---
drivers/spi/spi-qcom-qspi.c | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/spi-qcom-qspi.c b
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/mmc/host/sdhci-msm.c | 20 +++-
1 file changed, 7 insertions(+), 13 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/s
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +-
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +-
drivers/gpu/drm/msm/d
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/lima/lima_devfreq.c | 43 -
drivers/gpu/drm/lima/lima_devfreq.h | 2 --
2 files changed, 11 insertions(+), 34 deletions(-)
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/media/platform/qcom/venus/pm_helpers.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/drivers/media/platform/qcom/venus
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Reviewed-by: Steven Price
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 33 +
drivers/gpu/drm/panfrost/panfrost_devfreq.h | 1 -
2 files changed,
From: Yangtao Li
Use resource-managed API to simplify code.
Signed-off-by: Yangtao Li
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Dmitry Osipenko
---
drivers/memory/samsung/exynos5422-dmc.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/memory/
On Thu, Mar 11, 2021 at 10:20:58PM +0300, Dmitry Osipenko wrote:
> Acked-by: Mark brown
Typo there.
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11.03.2021 22:44, Mark Brown пишет:
> On Thu, Mar 11, 2021 at 10:20:58PM +0300, Dmitry Osipenko wrote:
>
>> Acked-by: Mark brown
>
> Typo there.
>
Good catch! Although, that should be a patchwork fault since it
auto-added acks when I downloaded v1 patches and I haven't changed them.
I'll fix i
On Thu, 11 Mar 2021 at 17:10, Alex Deucher wrote:
>
> On Thu, Mar 11, 2021 at 10:02 AM Alexandre Desnoyers wrote:
> >
> > On Thu, Mar 11, 2021 at 2:49 PM Daniel Gomez wrote:
> > >
> > > On Thu, 11 Mar 2021 at 10:09, Daniel Gomez wrote:
> > > >
> > > > On Wed, 10 Mar 2021 at 18:06, Alex Deucher
Noralf Trønnes wrote:
> > Endianness matters because parts of pix32 are used.
>
> This code:
..
> prints:
>
> xrgb=aabbccdd
> 32-bit access:
> r=bb
> g=cc
> b=dd
> Byte access on LE:
> r=cc
> g=bb
> b=aa
As expected, and:
xrgb=aabbccdd
32-bit access:
r=bb
g=cc
b=dd
Byte access on BE:
r=
> On Mar 11, 2021, at 05:46, Thomas Hellström (Intel)
> wrote:
>
> Hi,
>
> I tried latest drm-fixes today and saw a lot of these: Fallout from ttm
> rework?
Yes, I fixed this in d1a73c641afd2617bd80bce8b71a096fc5b74b7e it was in
drm-misc-next in the drm-misc tree for a while but hasn’t been
On Thu, Mar 11, 2021 at 3:02 PM Peter Stuge wrote:
> > > Hence the question: What does DRM promise about the XRGB mode?
> >
> > That it's a 32-bit value. From include/uapi/drm/drm_fourcc.h:
> >
> > /* 32 bpp RGB */
> > #define DRM_FORMAT_XRGB fourcc_code('X', 'R', '2', '4') /* [31:0]
> >
Hi, Zack
On 3/11/21 10:07 PM, Zack Rusin wrote:
On Mar 11, 2021, at 05:46, Thomas Hellström (Intel)
wrote:
Hi,
I tried latest drm-fixes today and saw a lot of these: Fallout from ttm rework?
Yes, I fixed this in d1a73c641afd2617bd80bce8b71a096fc5b74b7e it was in
drm-misc-next in the drm-mi
> I'm not familiar with panfrost's needs and I don't work on a tiler and
> I know there are different issues there. But...
The primary issue is we submit vertex+compute and fragment for each
batch as two disjoint jobs (with a dependency of course), reflecting the
internal hardware structure as pa
Ilia Mirkin wrote:
> > > #define DRM_FORMAT_XRGB fourcc_code('X', 'R', '2', '4') /* [31:0]
> > > x:R:G:B 8:8:8:8 little endian */
> >
> > Okay, "[31:0] x:R:G:B 8:8:8:8" can certainly mean
> > [31:24]=x [23:16]=R [15:8]=G [7:0]=B, which when stored "little endian"
> > becomes B G R X in memory
> On Mar 11, 2021, at 17:35, Thomas Hellström (Intel)
> wrote:
>
> Hi, Zack
>
> On 3/11/21 10:07 PM, Zack Rusin wrote:
>>> On Mar 11, 2021, at 05:46, Thomas Hellström (Intel)
>>> wrote:
>>>
>>> Hi,
>>>
>>> I tried latest drm-fixes today and saw a lot of these: Fallout from ttm
>>> rework
On Thu, Mar 11, 2021 at 5:58 PM Peter Stuge wrote:
>
> Ilia Mirkin wrote:
> > > > #define DRM_FORMAT_XRGB fourcc_code('X', 'R', '2', '4') /* [31:0]
> > > > x:R:G:B 8:8:8:8 little endian */
> > >
> > > Okay, "[31:0] x:R:G:B 8:8:8:8" can certainly mean
> > > [31:24]=x [23:16]=R [15:8]=G [7:0]=
Hi Linus,
Regular fixes for rc3. The i915 pull was based on the rc1 tag so I
just cherry-picked the single fix from there to avoid it. The misc and
amd trees seem to be on okay bases.
It's a bunch of fixes across the tree, amdgpu has most of them a few
ttm fixes around qxl, and nouveau.
Dave.
d
On Thu, 11 Mar 2021 at 21:28, Rodrigo Vivi wrote:
>
> Hi Dave and Daniel,
>
> Things are very quiet. Only 1 fix this round.
> Since I will be out next week, if this trend continues I will
> accumulate 2 weeks and send when in -rc4.
>
> Here goes drm-intel-fixes-2021-03-11:
>
> - Wedge the GPU if c
The pull request you sent on Fri, 12 Mar 2021 11:35:33 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2021-03-12-1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/f78d76e72a4671ea52d12752d92077788b4f5d50
Thank you!
--
Deet-doot-dot, I am a bot.
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On Wed, 10 Mar 2021 13:00:49 -0800, Jason Ekstrand wrote:
>
> libdrm has supported the newer execbuffer2 ioctl and using it by default
> when it exists since libdrm commit b50964027bef249a0cc3d511de05c2464e0a1e22
> which landed Mar 2, 2010. The i915 and i965 drivers in Mesa at the time
> both used
On Thu 04 Mar 17:51 CST 2021, Douglas Anderson wrote:
> The clock framework makes it simple to deal with an optional clock.
> You can call clk_get_optional() and if the clock isn't specified it'll
> just return NULL without complaint. It's valid to pass NULL to
> enable/disable/prepare/unprepare.
On Thu 04 Mar 17:52 CST 2021, Douglas Anderson wrote:
> This patch is _only_ code motion to prepare for the patch
> ("drm/bridge: ti-sn65dsi86: Properly get the EDID, but only if
> refclk") and make it easier to understand.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Dougla
On Fri, Mar 12, 2021 at 11:36:51AM +1000, Dave Airlie wrote:
> On Thu, 11 Mar 2021 at 21:28, Rodrigo Vivi wrote:
> >
> > Hi Dave and Daniel,
> >
> > Things are very quiet. Only 1 fix this round.
> > Since I will be out next week, if this trend continues I will
> > accumulate 2 weeks and send when
On Thu 04 Mar 17:52 CST 2021, Douglas Anderson wrote:
> In commit 58074b08c04a ("drm/bridge: ti-sn65dsi86: Read EDID blob over
> DDC") we attempted to make the ti-sn65dsi86 bridge properly read the
> EDID from the panel. That commit kinda worked but it had some serious
> problems.
>
> The problem
+dri-devel
Please be sure to cc dri-devel when you send out gpu scheduler patches.
On Thu, Mar 11, 2021 at 10:57 PM Jack Zhang wrote:
>
> re-insert Bailing jobs to avoid memory leak.
>
> Signed-off-by: Jack Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +++-
> drivers/gpu/drm/am
On March 11, 2021 20:26:06 "Dixit, Ashutosh" wrote:
On Wed, 10 Mar 2021 13:00:49 -0800, Jason Ekstrand wrote:
libdrm has supported the newer execbuffer2 ioctl and using it by default
when it exists since libdrm commit b50964027bef249a0cc3d511de05c2464e0a1e22
which landed Mar 2, 2010. The i9
Ilia Mirkin wrote:
> XRGB means that the memory layout should match a 32-bit integer,
> stored as LE, with the low bits being B, next bits being G, etc. This
> translates to byte 0 = B, byte 1 = G, etc. If you're on a BE system,
> and you're handed a XRGB buffer, it still expects that byte
On Tuesday, 9 March 2021 11:49:49 PM AEDT Matthew Wilcox wrote:
> On Tue, Mar 09, 2021 at 11:14:58PM +1100, Alistair Popple wrote:
> > -static inline struct page *migration_entry_to_page(swp_entry_t entry)
> > -{
> > - struct page *p = pfn_to_page(swp_offset(entry));
> > - /*
> > -* Any use
Check panfrost driver at panfrost_scheduler_stop,
and panfrost_job_timedout - they also terminate prematurely
in both places so probably worth adding this there too.
Andrey
On 2021-03-11 11:13 p.m., Alex Deucher wrote:
+dri-devel
Please be sure to cc dri-devel when you send out gpu scheduler p
On 11-03-21, 22:20, Dmitry Osipenko wrote:
> From: Yangtao Li
>
> Add devres wrapper for dev_pm_opp_register_notifier() to simplify driver
> code.
>
> Signed-off-by: Yangtao Li
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/opp/core.c | 38 ++
> inclu
On 11-03-21, 22:20, Dmitry Osipenko wrote:
> +struct opp_table *devm_pm_opp_set_clkname(struct device *dev, const char
> *name)
> +{
> + struct opp_table *opp_table;
> + int err;
> +
> + opp_table = dev_pm_opp_set_clkname(dev, name);
> + if (IS_ERR(opp_table))
> + retur
On Thu, 11 Mar 2021 20:31:33 -0800, Jason Ekstrand wrote:
> On March 11, 2021 20:26:06 "Dixit, Ashutosh" wrote:
> On Wed, 10 Mar 2021 13:00:49 -0800, Jason Ekstrand wrote:
>
> libdrm has supported the newer execbuffer2 ioctl and using it by default
> when it exists since libdrm commit b50964027
re-insert Bailing jobs to avoid memory leak.
Signed-off-by: Jack Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c| 8 ++--
drivers/gpu/drm/panfrost/panfrost_job.c| 2 +-
drivers/gpu/drm/scheduler/sched_main.c | 8 +++-
inc
[AMD Official Use Only - Internal Distribution Only]
Hi, Andrey,
ok, I have changed it and uploaded V2 patch.
Thanks,
Jack
-Original Message-
From: Grodzovsky, Andrey
Sent: Friday, March 12, 2021 1:04 PM
To: Alex Deucher ; Zhang, Jack (Jian)
; Maling list - DRI developers
Cc: amd-gfx
On Thu, 11 Mar 2021 12:11:48 -0600
Jason Ekstrand wrote:
> > > > > > 2/ Queued jobs might be executed out-of-order (unless they have
> > > > > > explicit/implicit deps between them), and Vulkan asks that the
> > > > > > out
> > > > > > fence be signaled when all jobs are done. Timeline s
On Wednesday, March 10, 2021 4:10:35 AM EST Thomas Zimmermann wrote:
> Hi
>
> Am 10.03.21 um 03:50 schrieb nerdopolis:
> > On Friday, September 2, 2016 4:22:38 AM EST David Herrmann wrote:
> >> Hey
> >>
> >> On request of Noralf, I picked up the patches and prepared v5. Works fine
> >> with
> >>
Am 11.03.21 um 14:17 schrieb Daniel Vetter:
[SNIP]
So I did the following quick experiment on vmwgfx, and it turns out that
with it,
fast gup never succeeds. Without the "| PFN_MAP", it typically succeeds
I should probably craft an RFC formalizing this.
Yeah I think that would be good. Mayb
This patch adds an initial DRM driver for the Loongson LS7A1000
bridge chip(LS7A). The LS7A bridge chip contains two display
controllers, support dual display output. The maximum support for
each channel display is to 1920x1080@60Hz.
At present, DC device detection and DRM driver registration are
c
On Thu, Mar 11, 2021 at 2:49 PM Daniel Gomez wrote:
>
> On Thu, 11 Mar 2021 at 10:09, Daniel Gomez wrote:
> >
> > On Wed, 10 Mar 2021 at 18:06, Alex Deucher wrote:
> > >
> > > On Wed, Mar 10, 2021 at 11:37 AM Daniel Gomez wrote:
> > > >
> > > > Disabling GFXOFF via the quirk list fixes a hardwa
From: Junlin Yang
r is "u32" always >= 0,mipi_dsi_create_packet may return little than zero.
so r < 0 condition is never accessible.
Fixes coccicheck warnings:
./drivers/gpu/drm/omapdrm/dss/dsi.c:2155:5-6:
WARNING: Unsigned expression compared with zero: r < 0
Signed-off-by: Junlin Yang
---
d
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