On Wed, Mar 10, 2021 at 1:50 PM Jason Ekstrand wrote:
>
> The Vulkan driver in Mesa for Intel hardware never uses relocations if
> it's running on a version of i915 that supports at least softpin which
> all versions of i915 supporting Gen12 do. On the OpenGL side, Gen12+ is
> only supported by i
Am 10.03.21 um 23:13 schrieb Felix Kuehling:
On 2021-03-09 11:50 a.m., Felix Kuehling wrote:
Using 'imply AMD_IOMMU_V2' does not guarantee that the driver can link
against the exported functions. If the GPU driver is built-in but the
IOMMU driver is a loadable module, the kfd_iommu.c file is ind
Am 11.03.21 um 04:29 schrieb Oak Zeng:
ioremap_cache is not supported on some architecture
such as s390. Put the codes into a #ifdef to fix
some compile error reported by test robot.
Signed-off-by: Oak Zeng
Reported-by: Kernel test robot
Reviewed-by: Christian König for the series.
---
On Wed, 10 Mar 2021 at 18:06, Alex Deucher wrote:
>
> On Wed, Mar 10, 2021 at 11:37 AM Daniel Gomez wrote:
> >
> > Disabling GFXOFF via the quirk list fixes a hardware lockup in
> > Ryzen V1605B, RAVEN 0x1002:0x15DD rev 0x83.
> >
> > Signed-off-by: Daniel Gomez
> > ---
> >
> > This patch is a co
Hello,
I've been playing with Vulkan lately and struggled quite a bit to
implement VkQueueSubmit with the submit ioctl we have. There are
several limiting factors that can be worked around if we really have to,
but I think it'd be much easier and future-proof if we introduce a new
ioctl that addre
So we can re-use it from elsewhere.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 52 ++---
1 file changed, 29 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c
b/drivers/gpu/drm/panfrost/panfrost_drv.c
index
This way we can re-use the standard drm_gem_fence_array_add_implicit()
helper and simplify the panfrost_job_dependency() logic.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 42 +++---
drivers/gpu/drm/panfrost/panfrost_job.c | 57 +++
Jobs reading from the same BO should not be serialized. Add access flags
so we can relax the implicit dependencies in that case. We force RW
access for now to keep the behavior unchanged, but a new SUBMIT ioctl
taking explicit access flags will be introduced.
Signed-off-by: Boris Brezillon
---
d
We now have a new ioctl that allows submitting multiple jobs at once
(among other things) and we support timelined syncobjs. Bump the
minor version number to reflect those changes.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 3 ++-
1 file changed, 2 insertions(+)
Now that we have a new SUBMIT ioctl dealing with timelined syncojbs we
can advertise the feature.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c
b/drivers/gp
So we don't have to change the prototype if we extend the function.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panfrost/panfrost_job.c | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c
b/drivers/gpu/drm/pa
This should help limit the number of ioctls when submitting multiple
jobs. The new ioctl also supports syncobj timelines and BO access flags.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 303
include/uapi/drm/panfrost_drm.h | 79 +
From: Colin Ian King
There is a spelling mistake in a drm debug message. Fix it.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/am
On 10/03/2021 21:50, Jason Ekstrand wrote:
The Vulkan driver in Mesa for Intel hardware never uses relocations if
it's running on a version of i915 that supports at least softpin which
all versions of i915 supporting Gen12 do. On the OpenGL side, Gen12+ is
only supported by iris which never us
On Tue, Mar 9, 2021 at 7:34 PM Christian König wrote:
> Am 09.03.21 um 18:59 schrieb Alex Deucher:
>
> There has been quite some effort for this already for generic PASID
> interface etc.. But it looks like that effort is stalled by now.
>
> Anyway at least I'm perfectly fine to have the IOMMUv2 |
On 11/03/2021 08:14, Lucas De Marchi wrote:
On Wed, Mar 10, 2021 at 1:50 PM Jason Ekstrand wrote:
The Vulkan driver in Mesa for Intel hardware never uses relocations if
it's running on a version of i915 that supports at least softpin which
all versions of i915 supporting Gen12 do. On the Open
On 3/1/21 3:09 PM, Daniel Vetter wrote:
On Mon, Mar 1, 2021 at 11:17 AM Christian König
wrote:
Am 01.03.21 um 10:21 schrieb Thomas Hellström (Intel):
On 3/1/21 10:05 AM, Daniel Vetter wrote:
On Mon, Mar 01, 2021 at 09:39:53AM +0100, Thomas Hellström (Intel)
wrote:
Hi,
On 3/1/21 9:28 AM,
https://bugzilla.kernel.org/show_bug.cgi?id=212229
Bug ID: 212229
Summary: STM32F469: vblank wait timed out on output to
/sys/class/graphics/fb0/pan
Product: Drivers
Version: 2.5
Kernel Version: Linux version 5.9.16 (ygenks@xps)
Hi Sebastian,
Am 10.03.21 um 18:47 schrieb Sebastian Andrzej Siewior:
On 2021-02-09 18:43:54 [+0100], Christian König wrote:
to be honest I'm thinking about that for quite some time now and I don't
think that this is possible without a severe rewrite of the driver.
The problem is simply that w
https://bugzilla.kernel.org/show_bug.cgi?id=212229
--- Comment #1 from Yauheni Saldatsenka (eugen...@gmail.com) ---
Created attachment 295799
--> https://bugzilla.kernel.org/attachment.cgi?id=295799&action=edit
Decompiled device tree
--
You may reply to this email to add a comment.
You are re
https://bugzilla.kernel.org/show_bug.cgi?id=212229
--- Comment #2 from Yauheni Saldatsenka (eugen...@gmail.com) ---
Created attachment 295801
--> https://bugzilla.kernel.org/attachment.cgi?id=295801&action=edit
Dmesg
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You may reply to this email to add a comment.
You are receiving this mail
Hi,
I tried latest drm-fixes today and saw a lot of these: Fallout from ttm
rework?
/Thomas
[ 298.404788] WARNING: CPU: 1 PID: 3839 at
drivers/gpu/drm/ttm/ttm_bo.c:512 ttm_bo_release+0x2b5/0x300 [ttm]
[ 298.404795] Modules linked in: nls_utf8 isofs rfcomm tun bridge stp
llc ip6table_nat i
drm-misc-fixes-2021-03-11:
drm-misc-fixes for rc3, rebased on rc2:
- Fix oops in drm_fbdev_cleanup()
- unpin qxl bos created as pinned when freeing them,
and make ttm only warn once on this behavior.
- Use LCD management for atyfb on PPC_MAC.
- Use gitlab for drm bugzilla now.
- Fix ttm page pool
https://bugzilla.kernel.org/show_bug.cgi?id=212229
Yauheni Saldatsenka (eugen...@gmail.com) changed:
What|Removed |Added
Kernel Version|Linux version 5.9.16|Linux version 5
Hi Dave and Daniel,
Things are very quiet. Only 1 fix this round.
Since I will be out next week, if this trend continues I will
accumulate 2 weeks and send when in -rc4.
Here goes drm-intel-fixes-2021-03-11:
- Wedge the GPU if command parser setup fails (Tvrtko)
Thanks,
Rodrigo.
The following
We are investigating a similar problem with radeon.
So far no idea what's going wrong since it doesn't seem to happen with amdgpu.
If you have an idea please speak up :)
Thanks,
Christian.
Von: Thomas Hellström (Intel)
Gesendet: Donnerstag, 11. März 2021 11:46
A
On Wed, Mar 10, 2021 at 03:50:07PM -0600, Jason Ekstrand wrote:
> The Vulkan driver in Mesa for Intel hardware never uses relocations if
> it's running on a version of i915 that supports at least softpin which
> all versions of i915 supporting Gen12 do. On the OpenGL side, Gen12+ is
> only support
On 3/9/21 11:36 AM, Brian Starkey wrote:
Hi Carsten, (+James for komeda)
Thanks for typing this up.
On Fri, Mar 05, 2021 at 04:38:53PM +, carsten.haitz...@foss.arm.com wrote:
From: Carsten Haitzler
When setting up a readback conenctor that writes data back to memory
s/readback conencto
From: Carsten Haitzler
When setting up a readback connector that writes data back to memory
rather than to an actual output device (HDMI etc.), rounding was set
to round. As the DPU uses a higher internal number of bits when generating
a color value, this round-down back to 8bit ended up with eve
Le jeu. 11 mars 2021 à 10:27, Hillf Danton a écrit
:
On Wed, 10 Mar 2021 19:01:01 + Paul Cercueil wrote:
Le lun. 8 mars 2021 11:47, Hillf Danton a crit :
On Sun, 7 Mar 2021 20:28:35 + Paul Cercueil wrote:
With the module parameter ingenic-drm.cached_gem_buffers, it is
poss
On 11/03/2021 09:25, Boris Brezillon wrote:
Hello,
I've been playing with Vulkan lately and struggled quite a bit to
implement VkQueueSubmit with the submit ioctl we have. There are
several limiting factors that can be worked around if we really have to,
but I think it'd be much easier and futur
On Mon, Dec 21, 2020 at 12:10 PM Peiyong Lin wrote:
>
> Historically there is no common trace event for GPU frequency, in
> downstream Android each different hardware vendor implements their own
> way to expose GPU frequency, for example as a debugfs node. This patch
> standardize it as a common
On 3/4/21 6:58 PM, Felix Kuehling wrote:
Am 2021-03-01 um 3:46 a.m. schrieb Thomas Hellström (Intel):
On 3/1/21 9:32 AM, Daniel Vetter wrote:
On Wed, Jan 06, 2021 at 10:01:09PM -0500, Felix Kuehling wrote:
From: Philip Yang
Register vram memory as MEMORY_DEVICE_PRIVATE type resource, to
all
Hi Christoph,
Le jeu. 11 mars 2021 à 12:26, Christoph Hellwig a
écrit :
+int drm_gem_cma_mmap_noncoherent(struct drm_gem_object *obj,
+ struct vm_area_struct *vma)
+{
+ struct drm_gem_cma_object *cma_obj;
+ unsigned long pfn;
+ int ret;
+
+
On 3/11/21 12:32 PM, Koenig, Christian wrote:
We are investigating a similar problem with radeon.
So far no idea what's going wrong since it doesn't seem to happen with
amdgpu.
If you have an idea please speak up :)
Sure. No idea ATM. Was just fiddling a bit with vmwgfx to experiment
with
>-Original Message-
>From: Dave Airlie
>Sent: Wednesday, March 10, 2021 11:35 PM
>To: dri-devel@lists.freedesktop.org
>Cc: Ruhl, Michael J ; skeg...@gmail.com
>Subject: [PATCH] drm/nouveau: fix dma syncing for loops (v2)
>
>From: Dave Airlie
>
>The index variable should only be increased
On Wed, Mar 03, 2021 at 04:37:18PM +0100, Michel Dänzer wrote:
> On 2021-02-22 10:15 a.m., syzbot wrote:
> > Hello,
> >
> > syzbot found the following issue on:
> >
> > HEAD commit:29ad81a1 arch/x86: add missing include to sparsemem.h
> > git tree: https://github.com/google/kmsan.git ma
platform_get_irq() has already checked and printed the return value,
the printing here is nothing special, it is not necessary at all.
Signed-off-by: Wang Qing
---
drivers/video/fbdev/s3c2410fb.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/video/fbdev/s3c2410f
platform_get_irq() has already checked and printed the return value,
the printing here is nothing special, it is not necessary at all.
Signed-off-by: Wang Qing
---
drivers/video/fbdev/pxa3xx-gcu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/video/fbdev/pxa3xx-
Greetings!
I've created a bug on bugzilla related to stm32 drm driver:
https://bugzilla.kernel.org/show_bug.cgi?id=212229
My experience tells that personal messaging is more effective, so I've
decided to contact you personally.
Please feel free to ask for additional information about the softwar
platform_get_irq() has already checked and printed the return value,
the printing here is nothing special, it is not necessary at all.
Signed-off-by: Wang Qing
---
drivers/video/fbdev/vt8500lcdfb.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/video/fbdev/vt8500lcdfb.c
b/drivers/v
Vicente wrote:
> This patch series enable a QHD HDMI monitor to work at native resolution.
> Tested on a Sapphire board with RK3399 connected to a Q27q-10 monitor at
> 2560x1440@60
Which kernel did you test this patch series on ?
I am trying to get this to work on our rk3999 hardware, with a Del
platform_get_irq() has already checked and printed the return value,
the printing here is nothing special, it is not necessary at all.
Signed-off-by: Wang Qing
---
drivers/video/fbdev/pxa168fb.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/video/fbdev/pxa168fb.
platform_get_irq() has already checked and printed the return value,
the printing here is nothing special, it is not necessary at all.
Signed-off-by: Wang Qing
---
drivers/video/fbdev/pxafb.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/video/fbdev/pxafb.c b/dr
On Thu, Mar 11, 2021 at 11:22:06AM +0100, Thomas Hellström (Intel) wrote:
>
> On 3/1/21 3:09 PM, Daniel Vetter wrote:
> > On Mon, Mar 1, 2021 at 11:17 AM Christian König
> > wrote:
> > >
> > >
> > > Am 01.03.21 um 10:21 schrieb Thomas Hellström (Intel):
> > > > On 3/1/21 10:05 AM, Daniel Vetter
Hi Steven,
On Thu, 11 Mar 2021 12:16:33 +
Steven Price wrote:
> On 11/03/2021 09:25, Boris Brezillon wrote:
> > Hello,
> >
> > I've been playing with Vulkan lately and struggled quite a bit to
> > implement VkQueueSubmit with the submit ioctl we have. There are
> > several limiting factors
On Thu, Mar 04, 2021 at 08:46:26AM +0100, Christian König wrote:
> Hi Oak,
>
> as far as I know some architectures like PowerPC/ARM/MIPS need that. And we
> at least officially support PowerPC and ARM and MIPS is best effort and
> shouldn't break if possible.
>
> Thomas just recently had a whole
On Tue, Mar 02, 2021 at 07:21:34AM +0100, Jiri Slaby wrote:
> Long time ago, I figured out what this number is good for and documented
> that locally. But never submitted, so do it now.
>
> Signed-off-by: Jiri Slaby
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-fb...@vger.kernel.org
I think
On Wed, Mar 03, 2021 at 08:42:31AM +0100, Christian König wrote:
> Am 03.03.21 um 01:27 schrieb Colin King:
> > From: Colin Ian King
> >
> > Currently the ioctl command RADEON_INFO_SI_BACKEND_ENABLED_MASK can
> > copy back uninitialised data in value_tmp that pointer *value points
> > to. This ca
On Wed, Mar 03, 2021 at 09:39:46AM +0800, Tian Tao wrote:
> updated to use drmm_vram_helper_init().
>
> Signed-off-by: Tian Tao
Hans, do you plan to pick this up?
-Daniel
> ---
> drivers/gpu/drm/vboxvideo/vbox_ttm.c | 7 ++-
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git
Hi!
On 3/11/21 2:00 PM, Daniel Vetter wrote:
On Thu, Mar 11, 2021 at 11:22:06AM +0100, Thomas Hellström (Intel) wrote:
On 3/1/21 3:09 PM, Daniel Vetter wrote:
On Mon, Mar 1, 2021 at 11:17 AM Christian König
wrote:
Am 01.03.21 um 10:21 schrieb Thomas Hellström (Intel):
On 3/1/21 10:05 AM, D
Hi,
On 3/11/21 2:11 PM, Daniel Vetter wrote:
> On Wed, Mar 03, 2021 at 09:39:46AM +0800, Tian Tao wrote:
>> updated to use drmm_vram_helper_init().
>>
>> Signed-off-by: Tian Tao
>
> Hans, do you plan to pick this up?
The drm patch-workflow falls outside my daily kernel-work workflow,
so it is a
On Thu, Mar 11, 2021 at 2:12 PM Thomas Hellström (Intel)
wrote:
>
> Hi!
>
> On 3/11/21 2:00 PM, Daniel Vetter wrote:
> > On Thu, Mar 11, 2021 at 11:22:06AM +0100, Thomas Hellström (Intel) wrote:
> >> On 3/1/21 3:09 PM, Daniel Vetter wrote:
> >>> On Mon, Mar 1, 2021 at 11:17 AM Christian König
> >>
On Thu, Mar 11, 2021 at 02:13:57PM +0100, Hans de Goede wrote:
> Hi,
>
> On 3/11/21 2:11 PM, Daniel Vetter wrote:
> > On Wed, Mar 03, 2021 at 09:39:46AM +0800, Tian Tao wrote:
> >> updated to use drmm_vram_helper_init().
> >>
> >> Signed-off-by: Tian Tao
> >
> > Hans, do you plan to pick this up
On Mon, Mar 08, 2021 at 09:19:32AM +, Lee Jones wrote:
> On Fri, 05 Mar 2021, Roland Scheidegger wrote:
>
> > The vmwgfx ones look all good to me, so for
> > 23-53: Reviewed-by: Roland Scheidegger
> > That said, they were already signed off by Zack, so not sure what
> > happened here.
>
> Ye
On Thu, 11 Mar 2021 at 10:09, Daniel Gomez wrote:
>
> On Wed, 10 Mar 2021 at 18:06, Alex Deucher wrote:
> >
> > On Wed, Mar 10, 2021 at 11:37 AM Daniel Gomez wrote:
> > >
> > > Disabling GFXOFF via the quirk list fixes a hardware lockup in
> > > Ryzen V1605B, RAVEN 0x1002:0x15DD rev 0x83.
> > >
On Thu, 11 Mar 2021, Daniel Vetter wrote:
> On Mon, Mar 08, 2021 at 09:19:32AM +, Lee Jones wrote:
> > On Fri, 05 Mar 2021, Roland Scheidegger wrote:
> >
> > > The vmwgfx ones look all good to me, so for
> > > 23-53: Reviewed-by: Roland Scheidegger
> > > That said, they were already signed o
https://bugzilla.kernel.org/show_bug.cgi?id=211277
--- Comment #15 from kolAflash (kolafl...@kolahilft.de) ---
(In reply to Alex Deucher from comment #10)
> Can you bisect?
> https://www.kernel.org/doc/html/latest/admin-guide/bug-bisect.html
I've done several s2ram-wakeup cycles (100 automatic a
On Fri, Mar 05, 2021 at 05:44:04PM +0200, Pekka Paalanen wrote:
> On Thu, 4 Mar 2021 09:43:22 +0530
> Hardik Panchal wrote:
>
> > Hello Sir/Madam,
> >
> > I am trying to render some stuff using DRM with Qt GUI application and
> > decoded stream from Intel H/w decoder.
> >
> > I have two applica
On Fri, Mar 05, 2021 at 11:54:49AM +0100, Christian König wrote:
> Am 05.03.21 um 11:51 schrieb Chris Wilson:
> > Commit c545781e1c55 ("dma-buf: doc polish for pin/unpin") disagrees with
> > the introduction of dynamism in commit: bb42df4662a4 ("dma-buf: add
> > dynamic DMA-buf handling v15") resul
Noralf Trønnes wrote:
> > I didn't receive the expected bits/bytes for RGB111 on the bulk endpoint,
> > I think because of how components were extracted in gud_xrgb_to_color().
> >
> > Changing to the following gets me the expected (X R1 G1 B1 X R2 G2 B2)
> > bytes:
> >
> >
Due to some hickups with some of the early election emails and the large
spike in membership registrations the elections committee decided to
extend the membership deadline by one week to Mar 18, 2021.
If you have not renewed your membership please do so by Thursday, Mar 18
at https://members.
On Wed, Mar 10, 2021 at 04:47:56PM -0500, Sean Paul wrote:
> From: Sean Paul
>
> This patch adds some newlines which are missing from debug messages.
> This will prevent logs from being stacked up in dmesg.
>
> Signed-off-by: Sean Paul
> ---
> drivers/gpu/drm/i915/display/intel_dp_link_trainin
On Wed, Mar 10, 2021 at 04:47:57PM -0500, Sean Paul wrote:
> From: Sean Paul
>
> One instance of DRM_DEBUG_KMS was leftover in dp_link_training, convert
> it to the new shiny.
>
> Signed-off-by: Sean Paul
> ---
> .../gpu/drm/i915/display/intel_dp_link_training.c | 15 ---
> 1 file
On 3/11/21 2:17 PM, Daniel Vetter wrote:
On Thu, Mar 11, 2021 at 2:12 PM Thomas Hellström (Intel)
wrote:
Hi!
On 3/11/21 2:00 PM, Daniel Vetter wrote:
On Thu, Mar 11, 2021 at 11:22:06AM +0100, Thomas Hellström (Intel) wrote:
On 3/1/21 3:09 PM, Daniel Vetter wrote:
On Mon, Mar 1, 2021 at 11:
Applied. Thanks!
Alex
On Thu, Mar 11, 2021 at 4:28 AM Colin King wrote:
>
> From: Colin Ian King
>
> There is a spelling mistake in a drm debug message. Fix it.
>
> Signed-off-by: Colin Ian King
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
> 1 file changed, 1 insertion(+), 1 de
Applied. Thanks!
Alex
On Tue, Feb 9, 2021 at 7:50 AM Christian König wrote:
>
> Reviewed-by: Christian König for the series.
>
> Am 09.02.21 um 13:44 schrieb Sebastian Andrzej Siewior:
> > Folks,
> >
> > in the discussion about preempt count consistency across kernel
> > configurations:
> >
>
On Thu, Mar 11, 2021 at 5:44 AM Zbigniew Kempczyński
wrote:
>
> On Wed, Mar 10, 2021 at 03:50:07PM -0600, Jason Ekstrand wrote:
> > The Vulkan driver in Mesa for Intel hardware never uses relocations if
> > it's running on a version of i915 that supports at least softpin which
> > all versions of
On Thu, Mar 11, 2021 at 4:50 PM Jason Ekstrand wrote:
>
> On Thu, Mar 11, 2021 at 5:44 AM Zbigniew Kempczyński
> wrote:
> >
> > On Wed, Mar 10, 2021 at 03:50:07PM -0600, Jason Ekstrand wrote:
> > > The Vulkan driver in Mesa for Intel hardware never uses relocations if
> > > it's running on a vers
On Fri, Mar 05, 2021 at 11:05:46AM -0600, Jason Ekstrand wrote:
> This reverts commit 9e31c1fe45d555a948ff66f1f0e3fe1f83ca63f7. Ever
> since that commit, we've been having issues where a hang in one client
> can propagate to another. In particular, a hang in an app can propagate
> to the X server
On Thu, Mar 11, 2021 at 10:02 AM Alexandre Desnoyers wrote:
>
> On Thu, Mar 11, 2021 at 2:49 PM Daniel Gomez wrote:
> >
> > On Thu, 11 Mar 2021 at 10:09, Daniel Gomez wrote:
> > >
> > > On Wed, 10 Mar 2021 at 18:06, Alex Deucher wrote:
> > > >
> > > > On Wed, Mar 10, 2021 at 11:37 AM Daniel Gom
On Fri, Jan 15, 2021 at 11:44 PM Douglas Anderson wrote:
> This series is to get the N116BCA-EA1 panel working. Most of the
> patches are simple, but on hardware I have in front of me the panel
> sometimes doesn't come up. I'm still working with the hardware
> manufacturer to get to the bottom of
Quoting Daniel Vetter (2021-03-11 16:01:46)
> On Fri, Mar 05, 2021 at 11:05:46AM -0600, Jason Ekstrand wrote:
> > This reverts commit 9e31c1fe45d555a948ff66f1f0e3fe1f83ca63f7. Ever
> > since that commit, we've been having issues where a hang in one client
> > can propagate to another. In particul
On Thu, Mar 11, 2021 at 2:01 AM Doug Anderson wrote:
> If you happen to feel in an applying mood one other patch to
> simple-panel I think is OK to land is at:
>
> https://lore.kernel.org/r/20210222081716.1.I1a45aece5d2ac6a2e73bbec50da2086e43e0862b@changeid
I applied and pushed this as well.
Yo
On Thu, Mar 11, 2021 at 9:57 AM Daniel Vetter wrote:
>
> On Thu, Mar 11, 2021 at 4:50 PM Jason Ekstrand wrote:
> >
> > On Thu, Mar 11, 2021 at 5:44 AM Zbigniew Kempczyński
> > wrote:
> > >
> > > On Wed, Mar 10, 2021 at 03:50:07PM -0600, Jason Ekstrand wrote:
> > > > The Vulkan driver in Mesa for
The Vulkan driver in Mesa for Intel hardware never uses relocations if
it's running on a version of i915 that supports at least softpin which
all versions of i915 supporting Gen12 do. On the OpenGL side, Gen12+ is
only supported by iris which never uses relocations. The older i965
driver in Mesa
Hi Wang,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v5.12-rc2 next-20210311]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--bas
Quoting Zbigniew Kempczyński (2021-03-11 11:44:32)
> On Wed, Mar 10, 2021 at 03:50:07PM -0600, Jason Ekstrand wrote:
> > The Vulkan driver in Mesa for Intel hardware never uses relocations if
> > it's running on a version of i915 that supports at least softpin which
> > all versions of i915 support
From: Colin Ian King
The variable result is being initialized with a value that is
never read and it is being updated later with a new value. The
initialization is redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/display/
On Wed, 10 Mar 2021 22:08:35 +0800, Carlis wrote:
> From: "Carlis"
>
> Document support for the Waveshare 2inch LCD module display, which is a
> 240x320 2" TFT display driven by a Sitronix ST7789V TFT Controller.
>
> Signed-off-by: Carlis
> ---
> .../bindings/display/sitronix,st7789v.yaml
On Thu, Mar 11, 2021 at 10:31 AM Chris Wilson wrote:
>
> Quoting Zbigniew Kempczyński (2021-03-11 11:44:32)
> > On Wed, Mar 10, 2021 at 03:50:07PM -0600, Jason Ekstrand wrote:
> > > The Vulkan driver in Mesa for Intel hardware never uses relocations if
> > > it's running on a version of i915 that
On Thu, Mar 11, 2021 at 10:24:38AM -0600, Jason Ekstrand wrote:
> On Thu, Mar 11, 2021 at 9:57 AM Daniel Vetter wrote:
> >
> > On Thu, Mar 11, 2021 at 4:50 PM Jason Ekstrand wrote:
> > >
> > > On Thu, Mar 11, 2021 at 5:44 AM Zbigniew Kempczyński
> > > wrote:
> > > >
> > > > On Wed, Mar 10, 2021
Hi all,
Dropping in where I may or may not be wanted to feel free to ignore. : -)
On Thu, Mar 11, 2021 at 7:00 AM Boris Brezillon
wrote:
>
> Hi Steven,
>
> On Thu, 11 Mar 2021 12:16:33 +
> Steven Price wrote:
>
> > On 11/03/2021 09:25, Boris Brezillon wrote:
> > > Hello,
> > >
> > > I've be
This series adds memory bandwidth management to the NVIDIA Tegra DRM driver,
which is done using interconnect framework. It fixes display corruption that
happens due to insufficient memory bandwidth.
Changelog:
v14: - Made improvements that were suggested by Michał Mirosław to v13:
- Chan
It's useful to know the total number of underflow events and currently
the debug stats are getting reset each time CRTC is being disabled. Let's
account the overall number of events that doesn't get a reset.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
dr
Display controller (DC) performs isochronous memory transfers, and thus,
has a requirement for a minimum memory bandwidth that shall be fulfilled,
otherwise framebuffer data can't be fetched fast enough and this results
in a DC's data-FIFO underflow that follows by a visual corruption.
The Memory
11.03.2021 20:06, Dmitry Osipenko пишет:
> This series adds memory bandwidth management to the NVIDIA Tegra DRM driver,
> which is done using interconnect framework. It fixes display corruption that
> happens due to insufficient memory bandwidth.
>
> Changelog:
>
> v14: - Made improvements that w
11.03.2021 20:06, Dmitry Osipenko пишет:
> +static const char * const tegra_plane_icc_names[TEGRA_DC_LEGACY_PLANES_NUM]
> = {
> + "wina", "winb", "winc", "", "", "", "cursor",
> +};
> +
> +int tegra_plane_interconnect_init(struct tegra_plane *plane)
> +{
> + const char *icc_name = tegra_pl
Den 11.03.2021 15.48, skrev Peter Stuge:
> Noralf Trønnes wrote:
>>> I didn't receive the expected bits/bytes for RGB111 on the bulk endpoint,
>>> I think because of how components were extracted in gud_xrgb_to_color().
>>>
>>> Changing to the following gets me the expected (X R1 G1 B1 X R2 G
On Thu, Mar 11, 2021 at 10:51 AM Zbigniew Kempczyński
wrote:
>
> On Thu, Mar 11, 2021 at 10:24:38AM -0600, Jason Ekstrand wrote:
> > On Thu, Mar 11, 2021 at 9:57 AM Daniel Vetter wrote:
> > >
> > > On Thu, Mar 11, 2021 at 4:50 PM Jason Ekstrand
> > > wrote:
> > > >
> > > > On Thu, Mar 11, 2021
This series adds memory bandwidth management to the NVIDIA Tegra DRM driver,
which is done using interconnect framework. It fixes display corruption that
happens due to insufficient memory bandwidth.
Changelog:
v15: - Corrected tegra_plane_icc_names[] NULL-check that was partially lost
by
It's useful to know the total number of underflow events and currently
the debug stats are getting reset each time CRTC is being disabled. Let's
account the overall number of events that doesn't get a reset.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
dr
Display controller (DC) performs isochronous memory transfers, and thus,
has a requirement for a minimum memory bandwidth that shall be fulfilled,
otherwise framebuffer data can't be fetched fast enough and this results
in a DC's data-FIFO underflow that follows by a visual corruption.
The Memory
Hi Jason,
On Thu, 11 Mar 2021 10:58:46 -0600
Jason Ekstrand wrote:
> Hi all,
>
> Dropping in where I may or may not be wanted to feel free to ignore. : -)
I'm glad you decided to chime in. :-)
> > > > 2/ Queued jobs might be executed out-of-order (unless they have
> > > > explicit/impli
On Thu, Mar 11, 2021 at 11:25 AM Boris Brezillon
wrote:
>
> Hi Jason,
>
> On Thu, 11 Mar 2021 10:58:46 -0600
> Jason Ekstrand wrote:
>
> > Hi all,
> >
> > Dropping in where I may or may not be wanted to feel free to ignore. : -)
>
> I'm glad you decided to chime in. :-)
>
>
> > > > > 2/ Queued jo
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Rajneesh Bhardwaj
-Original Message-
From: amd-gfx On Behalf Of Oak Zeng
Sent: Wednesday, March 10, 2021 10:29 PM
To: dri-devel@lists.freedesktop.org; amd-...@lists.freedesktop.org
Cc: Zeng, Oak
Subject: [PATCH 2/2] drm/
On Thu, Mar 11, 2021 at 11:18:11AM -0600, Jason Ekstrand wrote:
> On Thu, Mar 11, 2021 at 10:51 AM Zbigniew Kempczyński
> wrote:
> >
> > On Thu, Mar 11, 2021 at 10:24:38AM -0600, Jason Ekstrand wrote:
> > > On Thu, Mar 11, 2021 at 9:57 AM Daniel Vetter wrote:
> > > >
> > > > On Thu, Mar 11, 2021
On Thu, Mar 11, 2021 at 12:20 PM Zbigniew Kempczyński
wrote:
>
> On Thu, Mar 11, 2021 at 11:18:11AM -0600, Jason Ekstrand wrote:
> > On Thu, Mar 11, 2021 at 10:51 AM Zbigniew Kempczyński
> > wrote:
> > >
> > > On Thu, Mar 11, 2021 at 10:24:38AM -0600, Jason Ekstrand wrote:
> > > > On Thu, Mar 11,
On Thu, 11 Mar 2021 at 08:04, Keith Packard wrote:
>
> Jason Ekstrand writes:
>
> > libdrm has supported the newer execbuffer2 ioctl and using it by default
> > when it exists since libdrm commit b50964027bef249a0cc3d511de05c2464e0a1e22
> > which landed Mar 2, 2010. The i915 and i965 drivers in
This series adds resource-managed OPP API helpers and makes drivers
to use them.
Changelog:
v2: - This is a continuation of the work that was started by Yangtao Li.
Apparently Yangtao doesn't have time to finish it, so I
(Dmitry Osipenko) picked up the effort since these patches are
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