To reduce memory various Rockchip VOP versions share
common reg structures. However more recent added SoCs not
always have to same futures as the old ones.
Add PX30 missing version info, so all VOP version checks
work correct if needed in the future.
Signed-off-by: Johan Jonker
---
drivers/gpu/d
A Rockchip Inno HDMI driver was added, but the rk3036
VOP regs with HDMI support in the manufacturer tree never
made it to the mainline kernel.
This patch adds only hdmi_en and hdmi_dclk_pol.
The inno hdmi driver must set hdmi_pin_pol in
GRF_SOC_CON2.
Signed-off-by: Johan Jonker
---
Not tested wi
On Wed, Jan 27, 2021 at 05:24:40PM +0200, Iskren Chernev wrote:
> Before the offending commit in msm_atomic_commit_tail wait_flush was
> called once per frame, after the commit was submitted. After it
> wait_flush is also called at the beginning to ensure previous
> potentially async commits are do
On Sat, Jan 30, 2021 at 9:45 AM Chris Wilson wrote:
>
> Quoting Vinicius Tinti (2021-01-30 12:34:11)
> > On Fri, Jan 29, 2021 at 08:55:54PM +, Chris Wilson wrote:
> > > Quoting Vinicius Tinti (2021-01-29 18:15:19)
> > > > By enabling -Wunreachable-code-aggressive on Clang the following code
>
Hi Iskren,
On Mittwoch, 27. Jänner 2021 16:24:40 CET Iskren Chernev wrote:
> Before the offending commit in msm_atomic_commit_tail wait_flush was
> called once per frame, after the commit was submitted. After it
> wait_flush is also called at the beginning to ensure previous
> potentially async co
On 1/27/21 6:24 PM, Iskren Chernev wrote:
Before the offending commit in msm_atomic_commit_tail wait_flush was
called once per frame, after the commit was submitted. After it
wait_flush is also called at the beginning to ensure previous
potentially async commits are done.
For cmd panels the so
Hello,
Here are 2 fixes and one improvement for the page fault handling. Those
bugs were found while working on indirect draw supports which requires
the allocation of a big heap buffer for varyings, and the vertex/tiler
shaders seem to have access pattern that trigger those issues. I
remember dis
We allocate 2MB chunks at a time, so it might appear that a page fault
has already been handled by a previous page fault when we reach
panfrost_mmu_map_fault_addr(). Bail out in that case to avoid mapping the
same area twice.
Cc:
Fixes: 187d2929206e ("drm/panfrost: Add support for GPU heap alloca
When a fault is handled it will unblock the GPU which will continue
executing its shader and might fault almost immediately on a different
page. If we clear interrupts after handling the fault we might miss new
faults, so clear them before.
Cc:
Fixes: 187d2929206e ("drm/panfrost: Add support for
Doing a hw-irq -> threaded-irq round-trip is counter-productive, stay
in the threaded irq handler as long as we can.
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panfrost/panfrost_mmu.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c
b/dr
Hi Patrik
Am 29.01.21 um 15:25 schrieb Patrik Jakobsson:
On Fri, Jan 29, 2021 at 10:56 AM Thomas Zimmermann wrote:
Medfield is an outdated mobile platform with apparently no users left.
Remove it from gma500.
Signed-off-by: Thomas Zimmermann
Great, finally we get rid of that DSI code :)
Quoting Jani Nikula (2021-01-28 13:23:48)
>
> A number of our CI systems are hitting redzone overwritten errors after
> s2idle, with the errors introduced between v5.11-rc4 and v5.11-rc5. See
> snippet below, full logs for one affected machine at [1].
>
> Known issue?
Fwiw, I think this should b
On Sat, 30 Jan 2021, Joe Perches wrote:
> On Mon, 2020-08-24 at 21:56 -0700, Joe Perches wrote:
>> Use semicolons and braces.
>
> Ping?
Seems to have fallen between the cracks.
The first two hunks have been fixed, the last two are still there. Care
to respin and rebase against drm-tip (or linux-
Looks like this was not correctly adjusted.
Signed-off-by: Christian König
Fixes: a6a1f036c74e ("drm/scheduler: Job timeout handler returns status (v3)")
---
drivers/gpu/drm/v3d/v3d_sched.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_s
On Mon, Feb 1, 2021 at 9:23 AM Thomas Zimmermann wrote:
>
> Hi Patrik
>
> Am 29.01.21 um 15:25 schrieb Patrik Jakobsson:
> > On Fri, Jan 29, 2021 at 10:56 AM Thomas Zimmermann
> > wrote:
> >>
> >> Medfield is an outdated mobile platform with apparently no users left.
> >> Remove it from gma500.
On Mon, Feb 1, 2021 at 10:12 AM Christian König
wrote:
>
> Looks like this was not correctly adjusted.
shoulda compile test before pushing :-)
> Signed-off-by: Christian König
> Fixes: a6a1f036c74e ("drm/scheduler: Job timeout handler returns status (v3)")
Acked-by: Daniel Vetter
> ---
> dr
Hi Lyude,
Daniel referred me to you as the best person to review the MST parts of this
series.
I can commit this, but then I prefer to have a Reviewed-by or Acked-by from
someone for the first 3 DP MST patches. Alternatively, you can take the whole
series (I've reviewed the 4th CEC patch).
Regar
On Fri, Jan 29, 2021 at 03:12:59PM +0530, Sai Prakash Ranjan wrote:
> On 2021-01-29 14:35, Will Deacon wrote:
> > On Mon, Jan 11, 2021 at 07:45:04PM +0530, Sai Prakash Ranjan wrote:
> > > Add a new page protection flag IOMMU_LLC which can be used
> > > by non-coherent masters to set cacheable memor
Reporting a port as connected if nothing is attached to them leads to
any i2c transactions on this port trying to use an uninitialized i2c
adapter, fix this.
Let's account for this case even if branch devices have no good reason
to report a port as unplugged with their peer device type set to 'non
Caching EDIDs for physical ports prevents updating the EDID if a port
gets reconnected via a Connection Status Notification message, fix this.
Fixes: db1a07956968 ("drm/dp_mst: Handle SST-only branch device case")
Cc: Wayne Lin
Cc: Lyude Paul
Signed-off-by: Imre Deak
---
drivers/gpu/drm/drm_dp
Use the macro defined for the first logical port instead of the
corresponding magic number.
Cc: Lyude Paul
Signed-off-by: Imre Deak
---
drivers/gpu/drm/drm_dp_mst_topology.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gp
drm_get_edid() already updates the tile property since
commit 2de3a078497b ("drm/dp: Set the connector's TILE property even for DP SST
connectors")
so no need to update it after calling this function.
Cc: Lyude Paul
Signed-off-by: Imre Deak
---
drivers/gpu/drm/drm_dp_mst_topology.c | 4 +---
1
+++ Miroslav Benes [29/01/21 16:29 +0100]:
On Thu, 28 Jan 2021, Christoph Hellwig wrote:
Allow for a RCU-sched critical section around find_module, following
the lower level find_module_all helper, and switch the two callers
outside of module.c to use such a RCU-sched critical section instead
o
On 01/02/2021 08:21, Boris Brezillon wrote:
When a fault is handled it will unblock the GPU which will continue
executing its shader and might fault almost immediately on a different
page. If we clear interrupts after handling the fault we might miss new
faults, so clear them before.
Cc:
Fixes:
On 01/02/2021 08:21, Boris Brezillon wrote:
We allocate 2MB chunks at a time, so it might appear that a page fault
has already been handled by a previous page fault when we reach
panfrost_mmu_map_fault_addr(). Bail out in that case to avoid mapping the
same area twice.
Cc:
Fixes: 187d2929206e (
On 01/02/2021 08:21, Boris Brezillon wrote:
Doing a hw-irq -> threaded-irq round-trip is counter-productive, stay
in the threaded irq handler as long as we can.
Signed-off-by: Boris Brezillon
Looks fine to me, but I'm interested to know if you actually saw a
performance improvement. Back-to-
On Mon, 1 Feb 2021 12:13:49 +
Steven Price wrote:
> On 01/02/2021 08:21, Boris Brezillon wrote:
> > Doing a hw-irq -> threaded-irq round-trip is counter-productive, stay
> > in the threaded irq handler as long as we can.
> >
> > Signed-off-by: Boris Brezillon
>
> Looks fine to me, but I'
On 01/02/2021 12:59, Boris Brezillon wrote:
On Mon, 1 Feb 2021 12:13:49 +
Steven Price wrote:
On 01/02/2021 08:21, Boris Brezillon wrote:
Doing a hw-irq -> threaded-irq round-trip is counter-productive, stay
in the threaded irq handler as long as we can.
Signed-off-by: Boris Brezillon
Clearly never been used so just remove it.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/cdv_intel_crt.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/gma500/cdv_intel_crt.c
b/drivers/gpu/drm/gma500/cdv_intel_crt.c
index c48c9d3
DPST never got enabled so remove it. We keep the reg save/restore code
just for safety.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/psb_drv.h | 4 -
drivers/gpu/drm/gma500/psb_intel_reg.h | 32 ---
drivers/gpu/drm/gma500/psb_irq.c | 110 -
Afaik tv out is not available on Cedarview and the code isn't doing
anything so remove it.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/cdv_intel_display.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/gma500/cdv_intel_display.c
b/
CDV crtc helpers are identical to other chips so use gma_ prefix for the
crtc helper struct and remove the CDV copy.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/cdv_device.c| 2 +-
drivers/gpu/drm/gma500/cdv_device.h| 1 -
drivers/gpu/drm/gma500/cdv_intel_display
Blits cannot happen anymore since we removed the 2d accel code. Stop
checking for a busy blitter and remove the remaining blitter code.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/Makefile | 1 -
drivers/gpu/drm/gma500/blitter.c | 43
drivers/gpu
Since everything else in accel_2d.c got removed we can move psb_spank()
into psb_drv.c where it is used.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/Makefile | 1 -
drivers/gpu/drm/gma500/accel_2d.c | 60 ---
drivers/gpu/drm/gma500/psb_drv.c | 31 ++
Hi Oliver,
thanks for the patch :)
On 21-01-29 20:09, Oliver Graute wrote:
> Add support for the Solomon Goldentek Display Model: GKTW70SDAD1SD
> to panel-simple.
>
> The panel spec from Variscite can be found at:
> https://www.variscite.com/wp-content/uploads/2017/12/VLCD-CAP-GLD-RGB.pdf
>
> S
Hi, Hsin-Yi:
Chun-Kuang Hu 於 2021年2月1日 週一 上午12:20寫道：
>
> Hi, Hsin-Yi:
>
> Hsin-Yi Wang 於 2021年1月31日 週日 下午1:11寫道：
> >
> > From: Yongqiang Niu
> >
> > Enable dither function to improve the display quality.
>
> Reviewed-by: Chun-Kuang Hu
>
Applied to mediatek-drm-next [1], thanks.
[1]
https://
On Mon, 1 Feb 2021 13:24:00 +
Steven Price wrote:
> On 01/02/2021 12:59, Boris Brezillon wrote:
> > On Mon, 1 Feb 2021 12:13:49 +
> > Steven Price wrote:
> >
> >> On 01/02/2021 08:21, Boris Brezillon wrote:
> >>> Doing a hw-irq -> threaded-irq round-trip is counter-productive, stay
On Mon, Feb 1, 2021 at 7:16 AM Leon Romanovsky wrote:
>
> On Sun, Jan 31, 2021 at 05:31:16PM +0200, Gal Pressman wrote:
> > On 25/01/2021 21:57, Jianxin Xiong wrote:
> > > Define a new sub-class of 'MR' that uses dma-buf object for the memory
> > > region. Define a new class 'DmaBuf' as a wrapper
On Mon, 01 Feb 2021 12:37:10 +0200, Iskren Chernev wrote:
> The Samsung S6E3FA2 AMOLED cmd LCD panel is used on the Samsung Galaxy
> S5 (klte).
>
> Signed-off-by: Iskren Chernev
> ---
> OK, miraculously the panel turns on and off now, so the simple-panel can
> graduate into its own driver.
>
> v
The gma500 driver does not use TTM.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/gma500/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/gma500/Kconfig b/drivers/gpu/drm/gma500/Kconfig
index c1f6e12cd3ea..cd3138ed8006 100644
--- a/drivers/gpu/drm/gma500/Kconfig
(was: drm/gma500: Remove Moorestown/Medfield)
Support for the Medfield platform is being removed fromthe kernel. So
here's a patch to remove the related code from the gma500 driver. On
top of that I also cleaned up the configuration a bit.
Note that Poulsbo, Oak Trail and Cedar Trail is still the
With support for the MID-only Medfield chips removed, simply build
the complete driver if DRM_GMA500 has been selected. Anyone who wants
to enable one of the chips would probably also want the rest.
v2:
* also drop CONFIG_DRM_GMA600
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/g
Remove the CONFIG_X86 conditionals from the source code. The driver
already depends on X86 in the Kconfig file. Also, no one has been
trying to build it on a non-x86 platform recently, or they would have
noticed that drm_ttm_cache_flush() doesn't exist.
Signed-off-by: Thomas Zimmermann
---
drive
Am 01.02.21 um 14:26 schrieb Patrik Jakobsson:
Clearly never been used so just remove it.
Signed-off-by: Patrik Jakobsson
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/gma500/cdv_intel_crt.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/drive
Am 01.02.21 um 14:26 schrieb Patrik Jakobsson:
DPST never got enabled so remove it. We keep the reg save/restore code
just for safety.
Signed-off-by: Patrik Jakobsson
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/gma500/psb_drv.h | 4 -
drivers/gpu/drm/gma500/psb_intel_re
Am 01.02.21 um 14:26 schrieb Patrik Jakobsson:
Afaik tv out is not available on Cedarview and the code isn't doing
anything so remove it.
Signed-off-by: Patrik Jakobsson
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/gma500/cdv_intel_display.c | 11 +--
1 file changed, 1 i
Am 01.02.21 um 14:26 schrieb Patrik Jakobsson:
CDV crtc helpers are identical to other chips so use gma_ prefix for the
crtc helper struct and remove the CDV copy.
Signed-off-by: Patrik Jakobsson
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/gma500/cdv_device.c| 2 +-
dr
Am 01.02.21 um 14:26 schrieb Patrik Jakobsson:
Since everything else in accel_2d.c got removed we can move psb_spank()
into psb_drv.c where it is used.
Nit: I think one says 'it is being used'.
Signed-off-by: Patrik Jakobsson
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/gma50
Am 01.02.21 um 14:26 schrieb Patrik Jakobsson:
Blits cannot happen anymore since we removed the 2d accel code. Stop
checking for a busy blitter and remove the remaining blitter code.
Signed-off-by: Patrik Jakobsson
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/gma500/Makefile |
Adding gpu folks.
On Tue, Nov 03, 2020 at 03:28:05PM -0800, Alexei Starovoitov wrote:
> On Tue, Nov 03, 2020 at 05:57:47PM -0500, Kenny Ho wrote:
> > On Tue, Nov 3, 2020 at 4:04 PM Alexei Starovoitov
> > wrote:
> > >
> > > On Tue, Nov 03, 2020 at 02:19:22PM -0500, Kenny Ho wrote:
> > > > On Tue,
On Sat, Jan 30, 2021 at 6:27 AM Kai-Heng Feng
wrote:
>
> We are seeing root ports on some desktop boards support D3cold for
> discrete graphics card. So when efifb is in use while graphics device
> isn't bound to a driver, PCI and ACPI will put the graphics to D3cold
> when runtime suspend kicks i
On Mon, Feb 1, 2021 at 2:11 AM AngeloGioacchino Del Regno
wrote:
>
> Il 31/01/21 20:50, Rob Clark ha scritto:
> > On Sat, Jan 9, 2021 at 5:51 AM AngeloGioacchino Del Regno
> > wrote:
> >>
> >> The VCO rate was being miscalculated due to a big overlook during
> >> the process of porting this drive
On Mon, Feb 1, 2021 at 3:16 AM Will Deacon wrote:
>
> On Fri, Jan 29, 2021 at 03:12:59PM +0530, Sai Prakash Ranjan wrote:
> > On 2021-01-29 14:35, Will Deacon wrote:
> > > On Mon, Jan 11, 2021 at 07:45:04PM +0530, Sai Prakash Ranjan wrote:
> > > > Add a new page protection flag IOMMU_LLC which can
On Mon, Feb 1, 2021 at 9:49 AM Daniel Vetter wrote:
>
> - there's been a pile of cgroups proposal to manage gpus at the drm
> subsystem level, some by Kenny, and frankly this at least looks a bit
> like a quick hack to sidestep the consensus process for that.
>
No Daniel, this is quick *draft
[Resent in plain text.]
On Mon, Feb 1, 2021 at 9:49 AM Daniel Vetter wrote:
> - there's been a pile of cgroups proposal to manage gpus at the drm
> subsystem level, some by Kenny, and frankly this at least looks a bit
> like a quick hack to sidestep the consensus process for that.
No Daniel,
On Tue, 15 Sep 2020 21:40:40 +0200, Andrzej Hajda wrote:
> W dniu 14.09.2020 o 23:19, Andrzej Hajda pisze:
> > On 14.09.2020 22:01, Michael Tretter wrote:
> >> On Mon, 14 Sep 2020 14:31:19 +0200, Marek Szyprowski wrote:
> >>> On 14.09.2020 10:29, Marek Szyprowski wrote:
> On 11.09.2020 15:54,
On Mon, Feb 1, 2021 at 7:47 AM Rob Clark wrote:
>
> On Mon, Feb 1, 2021 at 2:11 AM AngeloGioacchino Del Regno
> wrote:
> >
> > Il 31/01/21 20:50, Rob Clark ha scritto:
> > > On Sat, Jan 9, 2021 at 5:51 AM AngeloGioacchino Del Regno
> > > wrote:
> > >>
> > >> The VCO rate was being miscalculated
> -Original Message-
> From: Jason Gunthorpe
> Sent: Monday, February 01, 2021 7:29 AM
> To: Daniel Vetter
> Cc: Leon Romanovsky ; Gal Pressman ;
> Xiong, Jianxin ; Yishai Hadas
> ; linux-rdma ; Edward Srouji
> ; dri-devel de...@lists.freedesktop.org>; Christian Koenig ;
> Doug Ledfor
Ah, thank you Christian. :-)
This did change a few times--sorry I missed it, not sure how it happened. :-)
Regards,
Luben
On 2021-02-01 4:11 a.m., Christian König wrote:
> Looks like this was not correctly adjusted.
>
> Signed-off-by: Christian König
> Fixes: a6a1f036c74e ("drm/scheduler: Job
> -Original Message-
> From: John Hubbard
> Sent: Sunday, January 31, 2021 12:45 AM
> To: Xiong, Jianxin ; linux-r...@vger.kernel.org;
> dri-devel@lists.freedesktop.org
> Cc: Doug Ledford ; Jason Gunthorpe ; Leon
> Romanovsky ; Sumit Semwal
> ; Christian Koenig ;
> Vetter, Daniel ; Edwa
On Mon, Feb 1, 2021 at 9:05 AM Rob Clark wrote:
>
> On Mon, Feb 1, 2021 at 7:47 AM Rob Clark wrote:
> >
> > On Mon, Feb 1, 2021 at 2:11 AM AngeloGioacchino Del Regno
> > wrote:
> > >
> > > Il 31/01/21 20:50, Rob Clark ha scritto:
> > > > On Sat, Jan 9, 2021 at 5:51 AM AngeloGioacchino Del Regno
On Mon, Feb 1, 2021 at 9:18 AM Rob Clark wrote:
>
> On Mon, Feb 1, 2021 at 9:05 AM Rob Clark wrote:
> >
> > On Mon, Feb 1, 2021 at 7:47 AM Rob Clark wrote:
> > >
> > > On Mon, Feb 1, 2021 at 2:11 AM AngeloGioacchino Del Regno
> > > wrote:
> > > >
> > > > Il 31/01/21 20:50, Rob Clark ha scritto:
On Sat, Jan 30, 2021 at 8:39 AM carlis wrote:
> On Fri, 29 Jan 2021 16:26:12 +0200
> Andy Shevchenko wrote:
> > On Fri, Jan 29, 2021 at 3:56 PM carlis wrote:
> > > On Fri, 29 Jan 2021 12:23:08 +0200
> > > Andy Shevchenko wrote:
...
> > > Hi, I apologize for what I said in the previous two ema
On Mon, Feb 01, 2021 at 08:20:44AM -0800, Rob Clark wrote:
> On Mon, Feb 1, 2021 at 3:16 AM Will Deacon wrote:
> >
> > On Fri, Jan 29, 2021 at 03:12:59PM +0530, Sai Prakash Ranjan wrote:
> > > On 2021-01-29 14:35, Will Deacon wrote:
> > > > On Mon, Jan 11, 2021 at 07:45:04PM +0530, Sai Prakash Ran
On Thu, Jan 28, 2021 at 1:03 PM Sumit Semwal wrote:
>
> On Thu, 28 Jan 2021 at 17:23, Christian König
> wrote:
> >
> > Am 28.01.21 um 12:00 schrieb Sumit Semwal:
> > > Hi Hridya,
> > >
> > > On Wed, 27 Jan 2021 at 17:36, Greg KH wrote:
> > >> On Tue, Jan 26, 2021 at 12:42:36PM -0800, Hridya Vals
On Mon, Jan 11, 2021 at 8:27 AM Maxime Ripard wrote:
>
> The CEC and hotplug interrupts were missing when that binding was
> introduced, let's add them in now that we've figured out how it works.
>
> Signed-off-by: Maxime Ripard
> ---
> .../bindings/display/brcm,bcm2711-hdmi.yaml | 20
On Fri, Dec 18, 2020 at 04:07:17PM +0530, Ankit Nautiyal wrote:
> This patch adds functions to start FRL training for an HDMI2.1 sink,
> connected via a PCON as a DP branch device.
> This patch also adds a new structure for storing frl training related
> data, when FRL training is completed.
>
> v
This is entirely unrelated to this thread, but I noticed when going through dri-
devel that this email is somehow dated two days in the future from now.
On Wed, 2021-02-03 at 14:26 +0100, Christian König wrote:
> Am 30.01.21 um 19:47 schrieb Joe Perches:
> > On Mon, 2020-08-24 at 21:56 -0700, Joe
On Wed, 2020-09-23 at 12:13 +1000, Sam McNally wrote:
> Sink event notify messages are used for MST CEC IRQs. Add parsing
> support for sink event notify messages in preparation for handling MST
> CEC IRQs.
>
> Signed-off-by: Sam McNally
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/drm_
On Wed, 2020-09-23 at 12:13 +1000, Sam McNally wrote:
> From: Hans Verkuil
>
> For adapters behind an MST hub use the correct AUX channel.
>
> Signed-off-by: Hans Verkuil
> [sa...@chromium.org: rebased, removing redundant changes]
> Signed-off-by: Sam McNally
> ---
>
> (no changes since v1)
>
On Wed, 2020-09-23 at 12:13 +1000, Sam McNally wrote:
> From: Hans Verkuil
>
> These are required for the CEC MST support.
>
> Signed-off-by: Hans Verkuil
> Signed-off-by: Sam McNally
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/drm_dp_mst_topology.c | 6 ++
> include/drm/drm_dp_
For the whole series:
Reviewed-by: Lyude Paul
On Mon, 2021-02-01 at 14:01 +0200, Imre Deak wrote:
> Reporting a port as connected if nothing is attached to them leads to
> any i2c transactions on this port trying to use an uninitialized i2c
> adapter, fix this.
>
> Let's account for this case e
On Wed, Sep 23, 2020 at 12:13:53PM +1000, Sam McNally wrote:
> From: Hans Verkuil
>
> For adapters behind an MST hub use the correct AUX channel.
>
> Signed-off-by: Hans Verkuil
> [sa...@chromium.org: rebased, removing redundant changes]
> Signed-off-by: Sam McNally
> ---
>
> (no changes sinc
Hi everyone,
There are discussions regarding whether or not we want to participate in
GSoC this year. Org applications are open now until Feb 19.
Last year at the GSoC Mentor Summit (Oct 2020) it was announced that
changes were coming to GSoC 2021:
- the amount of time a student is expected to sp
On 1/28/2021 7:00 PM, Xingyou Chen wrote:
> On 2021/1/27 上午5:46, Brian Welty wrote:
>
>> We'd like to revisit the proposal of a GPU cgroup controller for managing
>> GPU devices but with just a basic set of controls. This series is based on
>> the prior patch series from Kenny Ho [1]. We take
Hi Lukasz,
Thanks for the explanation. So the deferred timer option makes a mistake that
when GPU goes from idle to busy for only one poll periodic, in this
case 50ms, right?
But delayed timer will wakeup CPU every 50ms even when system is idle, will this
cause more power consumption for the case
OK, I see. Patch is also:
Reviewed-by: Qiang Yu
Regards,
Qiang
On Mon, Feb 1, 2021 at 5:59 PM Lukasz Luba wrote:
>
>
>
> On 1/30/21 1:57 PM, Qiang Yu wrote:
> > This patch gets minor improvement on glmark2 (160->162).
>
> It has bigger impact when the load is changing and the frequency
> is stu
[AMD Public Use]
> -Original Message-
> From: Imre Deak
> Sent: Monday, February 1, 2021 8:02 PM
> To: dri-devel@lists.freedesktop.org
> Cc: Lin, Wayne ; Lyude Paul
> Subject: [PATCH 2/4] drm/dp_mst: Don't cache EDIDs for physical ports
>
> Caching EDIDs for physical ports prevents updat
On Tue, 2 Feb 2021 at 04:39, Jeremy Kerr wrote:
>
> Hi Joel,
>
> Sounds like a good idea! One comment though:
>
> > @@ -111,10 +112,13 @@ static int aspeed_gfx_load(struct drm_device *drm)
> > if (IS_ERR(priv->base))
> > return PTR_ERR(priv->base);
> >
> > - priv->scu
On Tue, 2 Feb 2021 at 04:46, Jeremy Kerr wrote:
>
> Hi Joel,
>
> > There are minor differences in the values for the threshold value and
> > the scan line size between families of ASPEED SoC. Additionally the
> > SCU register for the output control differs between families.
> >
> > This adds devic
Hi, Hsin-Yi:
It looks like that postmask driver could be placed in mtk_drm_ddp_comp.c
and this patch would much smaller.
Regards,
CK
On Mon, 2021-02-01 at 18:37 +0800, Hsin-Yi Wang wrote:
> From: Yongqiang Niu
>
> This patch add component POSTMASK.
>
> Signed-off-by: Yongqiang Niu
> Signed-o
Hi, Hsin-Yi:
On Mon, 2021-02-01 at 18:37 +0800, Hsin-Yi Wang wrote:
> From: Yongqiang Niu
>
> ccorr ctm matrix bits will be different in mt8192
Reviewed-by: CK Hu
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> ---
> drivers/gpu/drm/mediatek/Makefile | 3 +-
>
Hi, Hsin-Yi:
On Mon, 2021-02-01 at 18:37 +0800, Hsin-Yi Wang wrote:
> From: Yongqiang Niu
>
> Fix setting to follow hardware datasheet. The original error setting
> affects mt8192 display.
Reviewed-by: CK Hu
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> ---
> drivers/gp
The out of tree vendor driver was recently updated to support the
ast2400 and ast2600. These patches begin to add that support to the
mainline driver.
With these two cleanups it should be easier to support different
families of BMC system on chip with this driver.
I will merge them through drm-mi
This scales better to multiple families of SoC. The lookup by compatible
can be removed in a future change.
The fallback path is for the ast2500 platform only. Other platforms will
be added with the new style, so they won't need fallback paths.
Signed-off-by: Joel Stanley
---
v2: Fix fallback pa
There are minor differences in the values for the threshold value and
the scan line size between families of ASPEED SoC. Additionally the SCU
registers for the output control and scratch registers differ between
families.
This adds device tree matching to parameterise these values, allowing us
to
Hi, Hsin-Yi:
On Mon, 2021-02-01 at 18:37 +0800, Hsin-Yi Wang wrote:
> From: Yongqiang Niu
>
> Add matrix_bits and coeffs_precision to ccorr private data:
> - matrix bits of mt8183 is 10
> - matrix bits of mt8192 is 11
>
> Signed-off-by: Yongqiang Niu
> Signed-off-by: Hsin-Yi Wang
> ---
> dri
Hi Ville,
Please find my responses inline.
On 2/2/2021 2:08 AM, Ville Syrjälä wrote:
On Fri, Dec 18, 2020 at 04:07:17PM +0530, Ankit Nautiyal wrote:
This patch adds functions to start FRL training for an HDMI2.1 sink,
connected via a PCON as a DP branch device.
This patch also adds a new struc
On Tue, Feb 02, 2021 at 12:09:47PM +0530, Nautiyal, Ankit K wrote:
> Hi Ville,
>
> Please find my responses inline.
>
> On 2/2/2021 2:08 AM, Ville Syrjälä wrote:
> > On Fri, Dec 18, 2020 at 04:07:17PM +0530, Ankit Nautiyal wrote:
> >> This patch adds functions to start FRL training for an HDMI2.1
CONSOLE_LOGLEVEL_DEFAULT is nothing more than a shorthand of
CONFIG_CONSOLE_LOGLEVEL_DEFAULT.
When you change CONFIG_CONSOLE_LOGLEVEL_DEFAULT from Kconfig, almost
all objects are rebuilt because CONFIG_CONSOLE_LOGLEVEL_DEFAULT is
used in , which is included from most of source files.
In fact, the
This patch provides infrastructure for deferring buffer frees.
This is a feature ION provided which when used with some form
of a page pool, provides a nice performance boost in an
allocation microbenchmark. The reason it helps is it allows the
page-zeroing to be done out of the normal allocation/
Reuse/abuse the pagepool code from the network code to speed
up allocation performance.
This is similar to the ION pagepool usage, but tries to
utilize generic code instead of a custom implementation.
Cc: Daniel Vetter
Cc: Sumit Semwal
Cc: Liam Mark
Cc: Chris Goldsworthy
Cc: Laura Abbott
Cc:
Utilize the deferred free helper library in the system heap.
This provides a nice performance bump and puts the
system heap performance on par with ION.
Cc: Daniel Vetter
Cc: Sumit Semwal
Cc: Liam Mark
Cc: Chris Goldsworthy
Cc: Laura Abbott
Cc: Brian Starkey
Cc: Hridya Valsaraju
Cc: Suren
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