A function has a different name between their prototype
and its kernel-doc markup:
../include/drm/drm_crtc.h:1257: warning: expecting prototype for
drm_crtc_alloc_with_planes(). Prototype was for drmm_crtc_alloc_with_planes()
instead
Signed-off-by: Mauro Carvalho Chehab
---
include/dr
used for the right declaration;
3) 5 additional patches, produced against next-20210114 with new
problems detected after the original series:
net: tip: fix a couple kernel-doc markups
net: cfg80211: fix a kerneldoc markup
reset: core: fix a kernel-doc markup
drm: drm_crc: fix a kernel-doc
The function drm_need_swiotbl() needs mem_encrypt_active() from
. The include got lost when refactoring the
code recently.
Signed-off-by: Thomas Zimmermann
Fixes: 3abc66706385 ("drm: Implement drm_need_swiotlb() in drm_cache.c")
Reported-by: kernel test robot
Cc: Thomas Zimmermann
Cc: Christian
On Thursday, January 14th, 2021 at 9:04 AM, Mauro Carvalho Chehab
wrote:
> A function has a different name between their prototype
> and its kernel-doc markup:
>
> ../include/drm/drm_crtc.h:1257: warning: expecting prototype for
> drm_crtc_alloc_with_planes(). Prototype was for drmm_crtc_
On Thu, 2021-01-14 at 08:44 +0200, Laurent Pinchart wrote:
> Convert the i.MX6 HDMI TX text binding to YAML.
>
> Signed-off-by: Laurent Pinchart
> Reviewed-by: Rob Herring
> ---
> Changes since v3:
>
> - Use port instead of port-base
>
> Changes since v1:
>
> - Only specify maxItems for clock
Am 14.01.21 um 09:05 schrieb Thomas Zimmermann:
The function drm_need_swiotbl() needs mem_encrypt_active() from
. The include got lost when refactoring the
code recently.
Signed-off-by: Thomas Zimmermann
Fixes: 3abc66706385 ("drm: Implement drm_need_swiotlb() in drm_cache.c")
Reported-by: kerne
Hi
Am 14.01.21 um 09:23 schrieb Christian König:
Am 14.01.21 um 09:05 schrieb Thomas Zimmermann:
The function drm_need_swiotbl() needs mem_encrypt_active() from
. The include got lost when refactoring the
code recently.
Signed-off-by: Thomas Zimmermann
Fixes: 3abc66706385 ("drm: Implement drm
The function vc4_prime_import_sg_table() is an otherwise empty wrapper
around CMA's drm_gem_cma_prime_import_sg_table(). Removing it in favor
of the latter allows to initialize vc4_drm_driver with CMA's initializer
macro.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/vc4/vc4_bo.c | 14 --
On Wed, Jan 13, 2021 at 10:08 PM Chris Wilson wrote:
> Quoting Daniel Vetter (2021-01-13 20:50:11)
> > On Wed, Jan 13, 2021 at 4:43 PM Chris Wilson
> > wrote:
> > >
> > > Quoting Daniel Vetter (2021-01-13 14:06:04)
> > > > We have too many people abusing the struct page they can get at but
> > >
On Wed, 13 Jan 2021, Lee Jones wrote:
> On Wed, 13 Jan 2021, Sam Ravnborg wrote:
>
>> Hi Lee,
>>
>> On Wed, Jan 13, 2021 at 02:49:38PM +, Lee Jones wrote:
>> > This set is part of a larger effort attempting to clean-up W=1
>> > kernel builds, which are currently overwhelmingly riddled with
>>
On Thu, Jan 14, 2021 at 10:04 AM Jani Nikula
wrote:
>
> On Wed, 13 Jan 2021, Lee Jones wrote:
> > On Wed, 13 Jan 2021, Sam Ravnborg wrote:
> >
> >> Hi Lee,
> >>
> >> On Wed, Jan 13, 2021 at 02:49:38PM +, Lee Jones wrote:
> >> > This set is part of a larger effort attempting to clean-up W=1
>
On Mon, 4 Jan 2021 16:07:58 -0500
Aurabindo Pillai wrote:
> [Why&How]
> Adds a module parameter to enable experimental freesync video mode modeset
> optimization. Enabling this mode allows the driver to skip a full modeset when
> freesync compatible modes are requested by the userspace. This para
Quoting Daniel Vetter (2021-01-14 09:02:57)
> On Wed, Jan 13, 2021 at 10:08 PM Chris Wilson
> wrote:
> > Quoting Daniel Vetter (2021-01-13 20:50:11)
> > > On Wed, Jan 13, 2021 at 4:43 PM Chris Wilson
> > > wrote:
> > > >
> > > > Quoting Daniel Vetter (2021-01-13 14:06:04)
> > > > > We have too
On Thu, Jan 14, 2021 at 4:27 AM Jerome Glisse wrote:
>
> On Wed, Jan 13, 2021 at 09:31:11PM +0100, Daniel Vetter wrote:
> > On Wed, Jan 13, 2021 at 5:56 PM Jerome Glisse wrote:
> > > On Fri, Jan 08, 2021 at 03:40:07PM +0100, Daniel Vetter wrote:
> > > > On Thu, Jan 07, 2021 at 11:25:41AM -0500, F
Fix the following coccicheck warning:
./drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c:1228:9-20:
WARNING: Comparison to bool
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 4 ++--
1 file changed, 2 insertions
Fix the following coccicheck warning:
./drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c:5121:14-38:
WARNING: Comparison to bool
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
.../amd/display/dc/dml/dcn21/display_mode_vba_21.c | 44 +++---
1 file changed, 22 i
Compound page metadata is necessary for page reference counting to work
properly on pages besides the head page. Without it, put_page
corresponding to the last outstanding get_page call on a tail page will
end up freeing that page, even if the bo still references the page.
Signed-off-by: David Ste
Fix the following errors:
divers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c:
In function ‘hibmc_hw_map’:
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c:213:25:
error: ‘dev’ undeclared (first use in this function);
Fixes: 4d4dad21cc7bee "drm/hibmc: Remove references to struct drm_device.pdev"
Signed-
Hi Stefan,
On Sat, Jan 09, 2021 at 12:41:57PM +0100, Stefan Wahren wrote:
> Hi Maxime,
>
> Am 29.12.20 um 16:36 schrieb Stefan Wahren:
> > During startup of Raspberry Pi 4 there seems to be a race between
> > VC4 probing and Pulseaudio trying to open its PCM device:
> >
> > ASoC: error at snd
Hi,
On Sat, Jan 09, 2021 at 11:50:32AM +0100, Stefan Wahren wrote:
> This converts the v3d bindings to yaml format.
>
> Signed-off-by: Stefan Wahren
> ---
>
> Changes in V3:
> - drop redundant maxItems in case we already have items defined
> - fix order of reg-names enum
> - tag required items
Hi,
If I remember well, the removed lines have to do with the VGA/accelerator
mode of the chip. The current driver always runs the chip in accelerator
mode. Suppose you would want to support high resolution hardware text
modes with the driver (fbdev bpp=0), then you would need to switch the
c
On 1/13/21 3:35 PM, Steven Price wrote:
On 05/01/2021 16:41, Lukasz Luba wrote:
Devfreq framework supports 2 modes for monitoring devices.
Use delayed timer as default instead of deferrable timer
in order to monitor the GPU status regardless of CPU idle.
Signed-off-by: Lukasz Luba
Looks r
13.01.2021 01:20, Mikko Perttunen пишет:
> On 1/13/21 12:07 AM, Dmitry Osipenko wrote:
>> 11.01.2021 16:00, Mikko Perttunen пишет:
>>> -void host1x_intr_put_ref(struct host1x *host, unsigned int id, void
>>> *ref)
>>> +void host1x_intr_put_ref(struct host1x *host, unsigned int id, void
>>> *ref,
>>
On Sun, Jan 10, 2021 at 09:19:44PM +0100, Jernej Skrabec wrote:
> This short series reworks CSC handling to remove duplicated constants
> (patch 1 and 2) and adds BT2020 encoding to DE3 (patch 3).
>
> Please take a look.
Applied, thanks
Maxime
signature.asc
Description: PGP signature
__
Fix the following coccicheck warning:
./drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c:3141:30-39:
WARNING: Comparison to bool
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c | 2 +-
1 file changed, 1 insertion(+
From: Konrad Dybcio
Port over the command from downstream to prevent undefined
behaviour.
Signed-off-by: Konrad Dybcio
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gp
The Adreno 508/509/512 GPUs are stripped versions of the Adreno
5xx found in the mid-end SoCs such as SDM630, SDM636, SDM660 and
SDA variants; these SoCs are usually provided with ZAP firmwares,
but they have no available GPMU.
Signed-off-by: AngeloGioacchino Del Regno
Tested-by: Martin Botka
R
From: Giulio Benetti
During commit 88bc4178568b ("drm: Use new
DRM_BUS_FLAG_*_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags") DRM_BUS_FLAG_*
macros have been changed to avoid ambiguity but just because of this
ambiguity previous DRM_BUS_FLAG_PIXDATA_(POS/NEG)EDGE were used meaning
_SAMPLE_ not _DRIVE_. This
Hi,
On Wed, Jan 06, 2021 at 09:46:30PM +0100, Jernej Skrabec wrote:
> From: Roman Stratiienko
>
> To set blending channel order register software needs to know state and
> position of each channel, which impossible at plane commit stage.
>
> Move this procedure to atomic_flush stage, where all
Hello,
syzbot found the following issue on:
HEAD commit:e609571b Merge tag 'nfs-for-5.11-2' of git://git.linux-nfs..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=165261e0d0
kernel config: https://syzkaller.appspot.com/x/.config?x=850b6de5f8959443
das
Lee Jones 於 2021年1月13日 週三 下午8:21寫道：
>
> On Thu, 17 Dec 2020, cy_huang wrote:
>
> > From: ChiYuan Huang
> >
> > This adds support Richtek RT4831 core. It includes four channel WLED driver
> > and Display Bias Voltage outputs.
> >
> > Signed-off-by: ChiYuan Huang
> > ---
> > since v5
> > - Rename
On Wed, Jan 13, 2021 at 5:58 PM Christian König
wrote:
>
> Am 13.01.21 um 09:47 schrieb David Stevens:
> > Compound page metadata is necessary for page reference counting to work
> > properly on pages besides the head page. Without it, put_page
> > corresponding to the last outstanding get_page ca
Some drivers have hardware capability to get the precise HW timestamp
of certain events based on which the fences are triggered. The delta
between the event HW timestamp & current HW reference timestamp can
be used to calculate the timestamp in kernel's CLOCK_MONOTONIC time
domain. This allows it t
From: Konrad Dybcio
The upstream API for some reason uses logbase2 instead of
just passing the argument as-is, whereas downstream CAF
kernel does the latter.
Hence, a mistake has been made when porting:
4 is the value that's supposed to be passed, but
log2(4) = 2. Changing the value to 16 (= 2^4
Resetting the VBIF before power collapse is done to avoid getting
bogus FIFO entries during the suspend sequence or subsequent resume,
but this is doable only on Adreno 510 and Adreno 530, as the other
units will tendentially lock up.
Especially on Adreno 508, the GPU will show lockups and very bad
There is HPD unplug interrupts missed at scenario of an irq_hpd
followed by unplug interrupts with around 10 ms in between.
Since both AUX_SW_RESET and DP_SW_RESET clear pending HPD interrupts,
irq_hpd handler should not issues either aux or sw reset to avoid
following unplug interrupt be cleared a
On Wed, Jan 13, 2021 at 01:53:38PM +0100, Stefan Wahren wrote:
> Hi Maxime,
>
> Am 13.01.21 um 10:15 schrieb Maxime Ripard:
> > Hi,
> >
> > On Sat, Jan 09, 2021 at 11:50:32AM +0100, Stefan Wahren wrote:
> >> This converts the v3d bindings to yaml format.
> >>
> >> Signed-off-by: Stefan Wahren
> >
Some dongle set both link lane and rate to 0 during dpcd receiver
capability read if there is no monitor attache to this dongle.
Therefore return fail to prevent driver from trying to populate
monitor further.
Changes in V2:
-- split this patch into two. Move postpone irq_handle into next patch
--
Hi Ryutaroh, Lucas,
On Wed, Jan 13, 2021 at 09:51:59AM +0900, Ryutaroh Matsumoto wrote:
> Hi Lucas,
>
> > week-end, so I cannot test before early next week. However I'm Ccing
> > Ryutaroh Matsumoto who could also reproduce it. Maybe he is in a better
> > position to test this (@Ryutaroh: I bounce
From: Konrad Dybcio
Port over the command from downstream to prevent undefined
behaviour.
Signed-off-by: Konrad Dybcio
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/msm/adreno/a5xx.xml.h | 2 ++
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +++
2 files changed, 5 insertions(+)
On 2021-01-11 11:54, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2021-01-07 12:30:25)
There is HPD unplug interrupts missed at scenario of an irq_hpd
followed by unplug interrupts with around 10 ms in between.
Since both AUX_SW_RESET and DP_SW_RESET clear pending HPD interrupts,
irq_hpd handler sh
13.01.2021 21:56, Mikko Perttunen пишет:
> On 1/13/21 8:14 PM, Dmitry Osipenko wrote:
>> 11.01.2021 16:00, Mikko Perttunen пишет:
>>> +struct drm_tegra_submit_buf {
>>> + /**
>>> + * @mapping_id: [in]
>>> + *
>>> + * Identifier of the mapping to use in the submission.
>>> + */
>>
Quoting khs...@codeaurora.org (2021-01-13 09:44:24)
> On 2021-01-11 11:55, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2021-01-07 12:30:24)
> >> irq_hpd event can only be executed at connected state. Therefore
> >> irq_hpd event should be postponed if it happened at connection
> >> pending state.
From: Giulio Benetti
During commit 88bc4178568b ("drm: Use new
DRM_BUS_FLAG_*_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags") DRM_BUS_FLAG_*
macros have been changed to avoid ambiguity but just because of this
ambiguity previous DRM_BUS_FLAG_PIXDATA_(POS/NEG)EDGE were used meaning
_SAMPLE_ not _DRIVE_. This
The explicit out-fences in crtc are signaled as part of vblank event,
indicating all framebuffers present on the Atomic Commit request are
scanned out on the screen. Though the fence signal and the vblank event
notification happens at the same time, triggered by the same hardware
vsync event, the t
In this patch series, we are adding support for lower end Adreno 5
series GPUs, such as A508, A509 and A512 that we have found in the
Qualcomm SDM630, SDM636 and SDM660 SoCs.
On a note, adding support for these three units, also adds 99% of
the required "things" for another two GPUs, A505 and A506
Quoting khs...@codeaurora.org (2021-01-13 09:48:25)
> On 2021-01-11 11:54, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2021-01-07 12:30:25)
> >> There is HPD unplug interrupts missed at scenario of an irq_hpd
> >> followed by unplug interrupts with around 10 ms in between.
> >> Since both AUX_SW_
On 2021-01-13 12:25, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2021-01-13 10:59:58)
Both AUX_SW_RESET and DP_SW_RESET clear pending HPD interrupts.
Therefore irq_hpd handler should not issues either aux or sw reset
to avoid following unplug interrupt be cleared accidentally.
Kuogee Hsieh (2):
The "main" if branch where we program the other registers for the
Adreno 5xx family of GPUs should not contain the PC_DBG_ECO_CNTL
register programming because this has logical similarity
differences from all the others.
A later commit will show the entire sense of this.
Signed-off-by: AngeloGioa
Quoting khs...@codeaurora.org (2021-01-13 15:44:32)
> On 2021-01-13 12:22, Stephen Boyd wrote:
> > Quoting khs...@codeaurora.org (2021-01-13 09:44:24)
> >> On 2021-01-11 11:55, Stephen Boyd wrote:
> >> > Quoting Kuogee Hsieh (2021-01-07 12:30:24)
> >> >> irq_hpd event can only be executed at connec
Use devm_platform_ioremap_resource() to simplify the code.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c| 5 ++---
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 4 +---
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/kir
Quoting khs...@codeaurora.org (2021-01-13 09:44:24)
> On 2021-01-11 11:55, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2021-01-07 12:30:24)
> >> irq_hpd event can only be executed at connected state. Therefore
> >> irq_hpd event should be postponed if it happened at connection
> >> pending state.
On 2021-01-11 11:55, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2021-01-07 12:30:24)
irq_hpd event can only be executed at connected state. Therefore
irq_hpd event should be postponed if it happened at connection
pending state. This patch also make sure both link rate and lane
Why does it happe
From: Giulio Benetti
During commit 88bc4178568b ("drm: Use new
DRM_BUS_FLAG_*_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags") DRM_BUS_FLAG_*
macros have been changed to avoid ambiguity but just because of this
ambiguity previous DRM_BUS_FLAG_PIXDATA_(POS/NEG)EDGE were used meaning
_SAMPLE_ not _DRIVE_. This
Signed-off-by: ZhiJie.Zhang
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
index 3f63822b8e28..9a86d43a6233 100644
---
Quoting Kuogee Hsieh (2021-01-13 10:59:58)
> Both AUX_SW_RESET and DP_SW_RESET clear pending HPD interrupts.
> Therefore irq_hpd handler should not issues either aux or sw reset
> to avoid following unplug interrupt be cleared accidentally.
>
> Kuogee Hsieh (2):
> drm/msm/dp: return fail when bo
Hi Marjan,
On 1/14/21 8:58 AM, Marjan Pascolo wrote:
Hi Giulio,
You did a typo
Il 13/01/2021 17:05, Giulio Benetti ha scritto:
From: Giulio Benetti
During commit 88bc4178568b ("drm: Use new
DRM_BUS_FLAG_*_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags") DRM_BUS_FLAG_*
macros have been changed to avoid
Fix the following coccicheck warning:
./drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c:580:23-31:
WARNING: Comparison to bool
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Quoting khs...@codeaurora.org (2021-01-13 15:52:37)
> On 2021-01-13 12:25, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2021-01-13 10:59:58)
> >> Both AUX_SW_RESET and DP_SW_RESET clear pending HPD interrupts.
> >> Therefore irq_hpd handler should not issues either aux or sw reset
> >> to avoid fo
The PC_DBG_ECO_CNTL register on the Adreno A5xx family gets
programmed to some different values on a per-model basis.
At least, this is what we intend to do here;
Unfortunately, though, this register is being overwritten with a
static magic number, right after applying the GPU-specific
configurati
On Tue, 2021-01-12 at 09:38 +0800, Zou Wei wrote:
> Fix the following sparse warning:
>
> drivers/phy/mediatek/phy-mtk-mipi-dsi.c:237:24: warning: symbol
> 'mtk_mipi_tx_driver' was not declared. Should it be static?
>
> Signed-off-by: Zou Wei
> ---
> drivers/phy/mediatek/phy-mtk-mipi-dsi.c | 2
11.01.2021 16:00, Mikko Perttunen пишет:
> +struct drm_tegra_submit_buf {
> + /**
> + * @mapping_id: [in]
> + *
> + * Identifier of the mapping to use in the submission.
> + */
> + __u32 mapping_id;
I'm now in process of trying out the UAPI using grate drivers and this
On 2021-01-13 12:22, Stephen Boyd wrote:
Quoting khs...@codeaurora.org (2021-01-13 09:44:24)
On 2021-01-11 11:55, Stephen Boyd wrote:
> Quoting Kuogee Hsieh (2021-01-07 12:30:24)
>> irq_hpd event can only be executed at connected state. Therefore
>> irq_hpd event should be postponed if it happen
On 2021-01-13 12:23, Stephen Boyd wrote:
Quoting khs...@codeaurora.org (2021-01-13 09:48:25)
On 2021-01-11 11:54, Stephen Boyd wrote:
> Quoting Kuogee Hsieh (2021-01-07 12:30:25)
>> There is HPD unplug interrupts missed at scenario of an irq_hpd
>> followed by unplug interrupts with around 10 ms
Hi,
On Mon, Jan 11, 2021 at 06:46:16PM +0100, Giulio Benetti wrote:
> From: Giulio Benetti
>
> During commit 88bc4178568b ("drm: Use new
> DRM_BUS_FLAG_*_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags") DRM_BUS_FLAG_*
> macros have been changed to avoid ambiguity but just because of this
> ambiguity previou
Hi Giulio,
You did a typo
Il 13/01/2021 17:05, Giulio Benetti ha scritto:
From: Giulio Benetti
During commit 88bc4178568b ("drm: Use new
DRM_BUS_FLAG_*_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags") DRM_BUS_FLAG_*
macros have been changed to avoid ambiguity but just because of this
ambiguity previous D
Both AUX_SW_RESET and DP_SW_RESET clear pending HPD interrupts.
Therefore irq_hpd handler should not issues either aux or sw reset
to avoid following unplug interrupt be cleared accidentally.
Kuogee Hsieh (2):
drm/msm/dp: return fail when both link lane and rate are 0 at dpcd
read
drm/msm/
On 1/13/21 10:42 AM, Maxime Ripard wrote:
Hi,
On Mon, Jan 11, 2021 at 06:46:16PM +0100, Giulio Benetti wrote:
From: Giulio Benetti
During commit 88bc4178568b ("drm: Use new
DRM_BUS_FLAG_*_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags") DRM_BUS_FLAG_*
macros have been changed to avoid ambiguity but just
On Thu, Jan 14, 2021 at 10:23 AM Chris Wilson wrote:
>
> Quoting Daniel Vetter (2021-01-14 09:02:57)
> > On Wed, Jan 13, 2021 at 10:08 PM Chris Wilson
> > wrote:
> > > Quoting Daniel Vetter (2021-01-13 20:50:11)
> > > > On Wed, Jan 13, 2021 at 4:43 PM Chris Wilson
> > > > wrote:
> > > > >
> >
Hi Philipp,
On Thu, Jan 14, 2021 at 09:17:47AM +0100, Philipp Zabel wrote:
> On Thu, 2021-01-14 at 08:44 +0200, Laurent Pinchart wrote:
> > Convert the i.MX6 HDMI TX text binding to YAML.
> >
> > Signed-off-by: Laurent Pinchart
> > Reviewed-by: Rob Herring
> > ---
> > Changes since v3:
> >
> >
On Wed, 13 Jan 2021, Yang Li wrote:
> Fix the following coccicheck warning:
> ./drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c:580:23-31:
> WARNING: Comparison to bool
>
> Reported-by: Abaci Robot
> Signed-off-by: Yang Li
> ---
> drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c | 2 +-
>
On Thu, Jan 14, 2021 at 09:49:49AM +0100, Thomas Zimmermann wrote:
> The function vc4_prime_import_sg_table() is an otherwise empty wrapper
> around CMA's drm_gem_cma_prime_import_sg_table(). Removing it in favor
> of the latter allows to initialize vc4_drm_driver with CMA's initializer
> macro.
>
Quoting Daniel Vetter (2021-01-14 09:30:32)
> On Thu, Jan 14, 2021 at 10:23 AM Chris Wilson
> wrote:
> > The only other problem I see with the implementation is that there's
> > nothing that says that each dmabuf->ops->map_dma_buf() returns a new
> > sg_table, so we may end up undoing the xor. Or
On Thu, 14 Jan 2021, Jani Nikula wrote:
> On Wed, 13 Jan 2021, Lyude Paul wrote:
>> Currently, every different type of backlight hook that i915 supports is
>> pretty straight forward - you have a backlight, probably through PWM
>> (but maybe DPCD), with a single set of platform-specific hooks tha
On Thu, Jan 14, 2021 at 09:45:37AM +, Chris Wilson wrote:
> Quoting Daniel Vetter (2021-01-14 09:30:32)
> > On Thu, Jan 14, 2021 at 10:23 AM Chris Wilson
> > wrote:
> > > The only other problem I see with the implementation is that there's
> > > nothing that says that each dmabuf->ops->map_dm
On Thu, Jan 14, 2021 at 10:11:01AM +0100, Daniel Vetter wrote:
> On Thu, Jan 14, 2021 at 10:04 AM Jani Nikula
> wrote:
> >
> > On Wed, 13 Jan 2021, Lee Jones wrote:
> > > On Wed, 13 Jan 2021, Sam Ravnborg wrote:
> > >
> > >> Hi Lee,
> > >>
> > >> On Wed, Jan 13, 2021 at 02:49:38PM +, Lee Jone
On Wed, Jan 13, 2021 at 6:02 PM Kieran Bingham
wrote:
> The encoder allocation was converted to a DRM managed resource at the
> same time as the addition of a new helper drmm_encoder_alloc() which
> simplifies the same process.
>
> Convert the custom drm managed resource allocation of the encoder
On Wed, 13 Jan 2021, Lee Jones wrote:
> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
>
> 0 out of 5000 left!
>
> LAST SET! You're all clean. Can you believe it!?
Ah, fair warning for y
On 1/14/21 10:36 AM, Dmitry Osipenko wrote:
13.01.2021 21:56, Mikko Perttunen пишет:
On 1/13/21 8:14 PM, Dmitry Osipenko wrote:
11.01.2021 16:00, Mikko Perttunen пишет:
+struct drm_tegra_submit_buf {
+ /**
+ * @mapping_id: [in]
+ *
+ * Identifier of the mapping to use in the sub
On Thu, Jan 14, 2021 at 10:26 AM Daniel Vetter wrote:
>
> On Thu, Jan 14, 2021 at 4:27 AM Jerome Glisse wrote:
> >
> > On Wed, Jan 13, 2021 at 09:31:11PM +0100, Daniel Vetter wrote:
> > > On Wed, Jan 13, 2021 at 5:56 PM Jerome Glisse wrote:
> > > > On Fri, Jan 08, 2021 at 03:40:07PM +0100, Danie
Am 13.01.21 um 17:56 schrieb Jerome Glisse:
On Fri, Jan 08, 2021 at 03:40:07PM +0100, Daniel Vetter wrote:
On Thu, Jan 07, 2021 at 11:25:41AM -0500, Felix Kuehling wrote:
Am 2021-01-07 um 4:23 a.m. schrieb Daniel Vetter:
On Wed, Jan 06, 2021 at 10:00:52PM -0500, Felix Kuehling wrote:
This is
Hi Dave & Daniel -
drm-intel-fixes-2021-01-14:
drm/i915 fixes for v5.11-rc4:
- Allow the sysadmin to override security mitigations
- Restore clear-residual mitigations for ivb/byt
- Limit VFE threads based on GT
- GVT: fix vfio edid and full display detection
- Fix DSI DSC power refcounting
- Fi
Hi
Am 14.01.21 um 01:31 schrieb Stephen Rothwell:
Hi all,
After merging the drm-misc tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
drivers/gpu/drm/drm_cache.c: In function 'drm_need_swiotlb':
drivers/gpu/drm/drm_cache.c:202:6: error: implicit declaration of function
On Thu, Jan 14, 2021 at 11:49 AM Christian König
wrote:
>
> Am 13.01.21 um 17:56 schrieb Jerome Glisse:
> > On Fri, Jan 08, 2021 at 03:40:07PM +0100, Daniel Vetter wrote:
> >> On Thu, Jan 07, 2021 at 11:25:41AM -0500, Felix Kuehling wrote:
> >>> Am 2021-01-07 um 4:23 a.m. schrieb Daniel Vetter:
>
Am 14.01.21 um 06:34 schrieb Felix Kuehling:
Am 2021-01-11 um 11:29 a.m. schrieb Daniel Vetter:
On Fri, Jan 08, 2021 at 12:56:24PM -0500, Felix Kuehling wrote:
Am 2021-01-08 um 11:53 a.m. schrieb Daniel Vetter:
On Fri, Jan 8, 2021 at 5:36 PM Felix Kuehling wrote:
Am 2021-01-08 um 11:06 a.m.
Hi Thomas,
On 23/11/2020 11:56, Thomas Zimmermann wrote:
> The new GEM object function drm_gem_cma_mmap() sets the VMA flags
> and offset as in the old implementation and immediately maps in the
> buffer's memory pages.
>
> Changing CMA helpers to use the GEM object function allows for the
> remo
Hi Kieran
Am 14.01.21 um 13:51 schrieb Kieran Bingham:
Hi Thomas,
On 23/11/2020 11:56, Thomas Zimmermann wrote:
The new GEM object function drm_gem_cma_mmap() sets the VMA flags
and offset as in the old implementation and immediately maps in the
buffer's memory pages.
Changing CMA helpers to
It allows to set 1080p mode without vmware/virtulabox tools installed.
Signed-off-by: Maxim Kochetkov
---
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 312ed0881a99..b47
Am 14.01.21 um 12:52 schrieb Daniel Vetter:
[SNIP]
I had a new idea, i wanted to think more about it but have not yet,
anyway here it is. Adding a new callback to dma fence which ask the
question can it dead lock ? Any time a GPU driver has pending page
fault (ie something calling into the mm) i
Am 14.01.21 um 08:53 schrieb Mauro Carvalho Chehab:
There's a missing colon, causing the markup to be ignored,
solving those warnings:
../drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h:340: warning:
Incorrect use of kernel-doc format: * @active_vblank_irq_count
../dr
Am 14.01.21 um 01:22 schrieb Mikhail Gavrilov:
On Tue, 12 Jan 2021 at 01:45, Christian König wrote:
But what you have in your logs so far are only unrelated symptoms, the
root of the problem is that somebody is leaking memory.
What you could do as well is to try to enable kmemleak
I captured
On Thu, Jan 14, 2021 at 2:37 PM Christian König
wrote:
>
> Am 14.01.21 um 12:52 schrieb Daniel Vetter:
> > [SNIP]
> >>> I had a new idea, i wanted to think more about it but have not yet,
> >>> anyway here it is. Adding a new callback to dma fence which ask the
> >>> question can it dead lock ? An
On Thu, Jan 14, 2021 at 2:56 PM Christian König
wrote:
>
> Am 14.01.21 um 01:22 schrieb Mikhail Gavrilov:
> > On Tue, 12 Jan 2021 at 01:45, Christian König
> > wrote:
> >> But what you have in your logs so far are only unrelated symptoms, the
> >> root of the problem is that somebody is leaking
Am 14.01.21 um 14:57 schrieb Daniel Vetter:
On Thu, Jan 14, 2021 at 2:37 PM Christian König
wrote:
Am 14.01.21 um 12:52 schrieb Daniel Vetter:
[SNIP]
I had a new idea, i wanted to think more about it but have not yet,
anyway here it is. Adding a new callback to dma fence which ask the
questio
On Thursday, January 14th, 2021 at 9:06 AM, Simon Ser
wrote:
> On Thursday, January 14th, 2021 at 9:04 AM, Mauro Carvalho Chehab
> wrote:
>
> > A function has a different name between their prototype
> > and its kernel-doc markup:
> >
> > ../include/drm/drm_crtc.h:1257: warning: expecting
Fix typo in intro chapter in drm_vblank.c.
Change 'sacn' to 'scan'.
Signed-off-by: Sumera Priyadarsini
---
drivers/gpu/drm/drm_vblank.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
index d30e2f2b8f3c..30912d8f82a5
On Thu, Jan 14, 2021 at 3:13 PM Christian König
wrote:
>
> Am 14.01.21 um 14:57 schrieb Daniel Vetter:
> > On Thu, Jan 14, 2021 at 2:37 PM Christian König
> > wrote:
> >> Am 14.01.21 um 12:52 schrieb Daniel Vetter:
> >>> [SNIP]
> > I had a new idea, i wanted to think more about it but have no
Hi Thomas,
On 14/01/2021 13:26, Thomas Zimmermann wrote:
> Hi Kieran
>
> Am 14.01.21 um 13:51 schrieb Kieran Bingham:
>> Hi Thomas,
>>
>> On 23/11/2020 11:56, Thomas Zimmermann wrote:
>>> The new GEM object function drm_gem_cma_mmap() sets the VMA flags
>>> and offset as in the old implementation
>-Original Message-
>From: dri-devel On Behalf Of
>Thomas Zimmermann
>Sent: Tuesday, January 12, 2021 2:45 AM
>To: Ruhl, Michael J ; sumit.sem...@linaro.org;
>christian.koe...@amd.com; airl...@redhat.com; dan...@ffwll.ch;
>maarten.lankho...@linux.intel.com; mrip...@kernel.org;
>kra...@re
On Thu, Jan 14, 2021 at 07:52:45PM +0530, Sumera Priyadarsini wrote:
> Fix typo in intro chapter in drm_vblank.c.
> Change 'sacn' to 'scan'.
>
> Signed-off-by: Sumera Priyadarsini
Nice catch, applied.
-Daniel
> ---
> drivers/gpu/drm/drm_vblank.c | 2 +-
> 1 file changed, 1 insertion(+), 1 dele
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