https://bugzilla.kernel.org/show_bug.cgi?id=210683
--- Comment #9 from Andreas Prittwitz (m4n...@gmx.de) ---
I have done some addtional testing.
I am running an up to date openSUSE Tumleweed with KDE Plasma.
My monitor is capable of running at 60, 100, 120 and 144 Hz refresh rate.
For some reason
https://bugzilla.kernel.org/show_bug.cgi?id=210683
--- Comment #10 from Andreas Prittwitz (m4n...@gmx.de) ---
I have done some addtional testing.
I am running an up to date openSUSE Tumleweed with KDE Plasma.
My monitor is capable of running at 60, 100, 120 and 144 Hz refresh rate.
For some reaso
On Thu, 24 Dec 2020 20:31:18 +0800, Nick Fan wrote:
> Convert the Arm Valhall GPU binding to DT schema format.
>
> Define a compatible string for the Mali Valhall GPU
> for Mediatek's SoC platform.
>
> Signed-off-by: Nick Fan
> ---
> .../bindings/gpu/arm,mali-valhall.yaml| 252 +
On Fri, 25 Dec 2020 19:01:09 +0800, Xin Ji wrote:
> Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add
> swing setting for adjusting DP tx PHY swing
>
> Signed-off-by: Xin Ji
> ---
> .../bindings/display/bridge/analogix,anx7625.yaml | 19
> +++
> 1 file cha
On Sun, 27 Dec 2020 at 21:39, Mikhail Gavrilov
wrote:
> I suppose the root of cause my problem here:
>
> [3.961326] amdgpu :0b:00.0: Direct firmware load for
> amdgpu/sienna_cichlid_sos.bin failed with error -2
> [3.961359] amdgpu :0b:00.0: amdgpu: failed to init sos firmware
> [
-2 means no such file or directory. Perhaps you need to rebuild your
ramdisk manually for some reason.
Regards
//Ernst
Den sön 27 dec. 2020 kl 17:58 skrev Mikhail Gavrilov <
mikhail.v.gavri...@gmail.com>:
> On Sun, 27 Dec 2020 at 21:39, Mikhail Gavrilov
> wrote:
> > I suppose the root of cause
https://bugzilla.kernel.org/show_bug.cgi?id=210921
Bug ID: 210921
Summary: amdgpu on Radeon R9 280X floods "[drm] Display Core
has been requested via kernel parameter but isn't
supported by ASIC, ignoring"
Product: Drivers
https://bugzilla.kernel.org/show_bug.cgi?id=210321
Florian Evers (florian-ev...@gmx.de) changed:
What|Removed |Added
CC||florian-ev...@gmx.d
[AMD Official Use Only - Internal Distribution Only]
If you want to pick up the firmware directly it is maintained at...
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/amdgpu
-rw-r--r-- sienna_cichlid_ce.bin 263296 logstatsplain
-rw-r--r-- sienna_cichlid_dmcu
[Bug][DP501]
If ASPEED P2A (PCI to AHB) bridge is disabled and disallowed for
CVE_2019_6260 item3, and then the monitor's EDID is unable read through
Parade DP501.
The reason is the DP501's FW is mapped to BMC addressing space rather
than Host addressing space.
The resolution is that using "pci_iom
[Bug][DP501]
If ASPEED P2A (PCI to AHB) bridge is disabled and disallowed for
CVE_2019_6260 item3, and then the monitor's EDID is unable read through
Parade DP501.
The reason is the DP501's FW is mapped to BMC addressing space rather
than Host addressing space.
The resolution is that using "pci_iom
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