Hi Kieran,
On Mon, Dec 21, 2020 at 02:09:09PM +, Kieran Bingham wrote:
> On 21/12/2020 01:57, Laurent Pinchart wrote:
> > From: Kieran Bingham
> >
> > Extend the existing color management properties to support provision
> > of a 3D cubic look up table, allowing for color specific adjustments
On Tue, Dec 22, 2020 at 1:38 AM tiantao (H) wrote:
>
>
> 在 2020/12/22 6:02, Daniel Vetter 写道:
> > On Mon, Dec 21, 2020 at 08:45:22AM +0800, Tian Tao wrote:
> >> Using the managed function simplifies the error handling. After
> >> unloading the driver, the PCI device should now get disabled as
> >>
On Mon, Dec 14, 2020 at 12:17 PM Thomas Zimmermann wrote:
>
> Hi
>
> Am 14.12.20 um 11:32 schrieb Tian Tao:
> > Fix the problem of dev being released twice.
> > [ cut here ]
> > refcount_t: underflow; use-after-free.
> > WARNING: CPU: 75 PID: 15700 at lib/refcount.c:28
> >
https://bugzilla.kernel.org/show_bug.cgi?id=210683
--- Comment #5 from David Mak (david.18.19...@gmail.com) ---
Created attachment 294289
--> https://bugzilla.kernel.org/attachment.cgi?id=294289&action=edit
git bisect for Navi 21.
Not sure if I am doing is properly, but I performed a git bisect
On Fri, Dec 11, 2020 at 05:11:13PM +0100, Daniel Vetter wrote:
> I tried to fix this for real, but it's very sprawling and lots of
> drivers get this mildly wrong one way or the other.
>
> Signed-off-by: Daniel Vetter
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Cc: Thomas Zimmermann
> Cc: Da
On Tuesday, December 22nd, 2020 at 9:55 AM, Daniel Vetter
wrote:
> On Fri, Dec 11, 2020 at 05:11:13PM +0100, Daniel Vetter wrote:
> > I tried to fix this for real, but it's very sprawling and lots of
> > drivers get this mildly wrong one way or the other.
> >
> > Signed-off-by: Daniel Vetter
>
On Mon, 2020-12-21 at 15:33 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:30PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../bindings/display/bridge/fsl,imx8qxp-ldb.yaml | 185
> > +
The simple_strtol() function is deprecated, use simple_strtoul() instead.
Signed-off-by: Zheng Yongjun
---
drivers/gpu/drm/drm_modes.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 501b4fe55a3d..048d
The Panfrost DRM driver depends on the availability of the ARM LPAE
io-pgtable format code to work properly. In preparation for having the
io-pgtable formats as modules, add a "pre" dependency with
MODULE_SOFTDEP() to ensure that the io-pgtable-arm format module is loaded
before loading the Panfros
Hi Laurent,
On Tue, 2020-12-22 at 09:49 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> On Tue, Dec 22, 2020 at 09:36:37AM +0200, Laurent Pinchart wrote:
> > On Thu, Dec 17, 2020 at 05:59:30PM +0800, Liu Ying wrote:
> > > This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
> > >
> >
On Thu, 2020-12-03 at 14:25 +0100, Maxime Ripard wrote:
> From: Dave Stevenson
>
> Updates the compatible string for DSI1 on BCM2711 to
> differentiate it from BCM2835.
>
> Signed-off-by: Dave Stevenson
> Signed-off-by: Maxime Ripard
> ---
Applied for-next,
Thanks!
signature.asc
Descripti
On Mon, 2020-12-21 at 15:31 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:25PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp display pixel link.
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../display/bridge/fsl,imx8qxp-pixel-link.yaml | 128
> > +++
The MSM DRM driver depends on the availability of the ARM LPAE io-pgtable
format code to work properly. In preparation for having the io-pgtable
formats as modules, add a "pre" dependency with MODULE_SOFTDEP() to
ensure that the io-pgtable-arm format module is loaded before loading
the MSM DRM driv
On 17-12-20, 21:06, Dmitry Osipenko wrote:
> Support set_opp() customization without requiring to use regulators. This
> is needed by drivers which want to use dev_pm_opp_set_rate() for changing
> rates of a multiple clocks and don't need to touch regulator.
>
> One example is NVIDIA Tegra30/114 S
在 2020/12/22 6:02, Daniel Vetter 写道:
On Mon, Dec 21, 2020 at 08:45:22AM +0800, Tian Tao wrote:
Using the managed function simplifies the error handling. After
unloading the driver, the PCI device should now get disabled as
well.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/hibmc/hi
On Mon, 9 Nov 2020 at 16:51, Frank Lee wrote:
> On Mon, Nov 9, 2020 at 1:53 PM Viresh Kumar wrote:
> > > devm_pm_opp_set_supported_hw()
> > > devm_pm_opp_set_regulators() [if we won't use GENPD]
> > > devm_pm_opp_set_clkname()
> > > devm_pm_opp_of_add_table()
> >
> > I tried to look earlier for
On Mon, 2020-12-21 at 15:07 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:23PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp pixel combiner.
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160
> > +++
On 17-12-20, 21:06, Dmitry Osipenko wrote:
> Add a ceil version of the dev_pm_opp_find_level(). It's handy to have if
> levels don't start from 0 in OPP table and zero usually means a minimal
> level.
>
> Signed-off-by: Dmitry Osipenko
Why doesn't the exact version work for you here ?
--
vires
Hi Laurent,
On Tue, 2020-12-22 at 09:36 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> Thank you for the patch.
>
> On Thu, Dec 17, 2020 at 05:59:30PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../bi
On Mon, 2020-12-21 at 10:02 -0700, Rob Herring wrote:
> On Fri, Dec 18, 2020 at 9:15 PM Liu Ying wrote:
> > Hi,
> >
> > On Fri, 2020-12-18 at 16:42 -0600, Rob Herring wrote:
> > > On Thu, Dec 17, 2020 at 7:48 PM Liu Ying wrote:
> > > > Hi,
> > > >
> > > > On Thu, 2020-12-17 at 12:50 -0600, Rob
On 17-12-20, 21:06, Dmitry Osipenko wrote:
> Fix adding OPP entries in a wrong (opposite) order if OPP rate is
> unavailable. The OPP comparison is erroneously skipped if OPP rate is
> missing, thus OPPs are left unsorted.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/opp/core.c | 23 ++
The io-pgtable code constructs an array of init functions for each
page table format at compile time. This is not ideal, as this
increases the footprint of the io-pgtable code, as well as prevents
io-pgtable formats from being built as kernel modules.
In preparation for modularizing the io-pgtable
On 17-12-20, 21:06, Dmitry Osipenko wrote:
> diff --git a/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
> b/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
> index b84afecea154..7e015cdfbc55 100644
> --- a/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
> +++ b/arch/arm/boot/dts/tegra20-peripherals
In preparation for modularizing io-pgtable formats, add support
for reference counting the io-pgtable format modules to ensure
that the modules are not unloaded while they are in use.
Signed-off-by: Isaac J. Manjarres
---
drivers/iommu/io-pgtable-arm-v7s.c | 1 +
drivers/iommu/io-pgtable-arm.c
在 2020/12/22 16:27, Daniel Vetter 写道:
On Tue, Dec 22, 2020 at 1:38 AM tiantao (H) wrote:
在 2020/12/22 6:02, Daniel Vetter 写道:
On Mon, Dec 21, 2020 at 08:45:22AM +0800, Tian Tao wrote:
Using the managed function simplifies the error handling. After
unloading the driver, the PCI device should
Hi Dmitry,
On Fri, Dec 18, 2020 at 12:27:04PM +0100, Dmitry Vyukov wrote:
> On Fri, Dec 18, 2020 at 2:30 AM Boqun Feng wrote:
> >
> > On Thu, Dec 17, 2020 at 07:21:18AM -0800, Paul E. McKenney wrote:
> > > On Thu, Dec 17, 2020 at 11:03:20AM +0100, Daniel Vetter wrote:
> > > > On Wed, Dec 16, 2020
On 17-12-20, 21:05, Dmitry Osipenko wrote:
> Extend OPP API with dev_pm_opp_sync_regulators() function, which syncs
> voltage state of regulators.
>
> Signed-off-by: Dmitry Osipenko
We shouldn't be doing this, details in patch 28.
--
viresh
___
dri-d
Now that everything is in place for modular io-pgtable formats,
allow the ARM LPAE and ARMV7S io-pgtable formats to be built
as modules.
Signed-off-by: Isaac J. Manjarres
---
drivers/iommu/Kconfig | 4 ++--
drivers/iommu/io-pgtable-arm-v7s.c | 2 ++
drivers/iommu/io-pgtable-arm.c
On 17-12-20, 21:06, Dmitry Osipenko wrote:
> +++ b/drivers/soc/tegra/core-power-domain.c
> @@ -0,0 +1,125 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * NVIDIA Tegra SoC Core Power Domain Driver
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +
The SMMU driver depends on the availability of the ARM LPAE and
ARM V7S io-pgtable format code to work properly. In preparation
for having the io-pgtable formats as modules, add a "pre"
dependency with MODULE_SOFTDEP() to ensure that the io-pgtable
format modules are loaded before loading the ARM S
On 17-12-20, 21:06, Dmitry Osipenko wrote:
> Add resource-managed versions of OPP API functions. This removes a need
> from drivers to store and manage OPP table pointers.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/opp/core.c | 173 +
> drivers
On 17-12-20, 21:06, Dmitry Osipenko wrote:
> A required OPP may not be available, and thus, all OPPs which are using
> this required OPP should be unavailable too.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/opp/core.c | 11 ++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
P
Fix the following coccinelle report:
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c:1357:6-8:
WARNING: possible condition with no effect (if == else)
Signed-off-by: Tian Tao
---
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/
The SMMUv3 driver depends on the availability of the ARM LPAE io-pgtable
format code to work properly. In preparation for having the io-pgtable
formats as modules, add a "pre" dependency with MODULE_SOFTDEP() to
ensure that the io-pgtable-arm format module is loaded before loading
the ARM SMMUv3 dr
The goal of the Generic Kernel Image (GKI) effort is to have a common
kernel image that works across multiple Android devices. This involves
generating a kernel image that has core features integrated into it,
while SoC specific functionality can be added to the kernel for the
device as a module.
On 17-12-20, 21:06, Dmitry Osipenko wrote:
> Add dev_pm_opp_set_voltage() which allows OPP table users to set voltage
> in accordance to a given OPP. In particular this is needed for driving
> voltage of a generic power domain which uses OPPs and doesn't have a
> clock.
>
> Signed-off-by: Dmitry O
Hi Rob,
On Mon, Dec 21, 2020 at 04:46:59PM -0700, Rob Herring wrote:
> *-supply properties are always a single phandle, so binding schemas
> don't need a type $ref nor 'maxItems'.
>
> A meta-schema check for this is pending once these existing cases are
> fixed.
>
> Cc: Jonathan Cameron
> Cc: D
On Mon, 21 Dec 2020, Rob Herring wrote:
> *-supply properties are always a single phandle, so binding schemas
> don't need a type $ref nor 'maxItems'.
>
> A meta-schema check for this is pending once these existing cases are
> fixed.
>
> Cc: Jonathan Cameron
> Cc: Dmitry Torokhov
> Cc: Laurent
https://bugzilla.kernel.org/show_bug.cgi?id=210849
Bug ID: 210849
Summary: Black screen after resume from long suspend.
Open/Close lid. AMDGPU
Product: Drivers
Version: 2.5
Kernel Version: >=5.9
Hardware: All
https://bugzilla.kernel.org/show_bug.cgi?id=210849
xrootw...@gmail.com changed:
What|Removed |Added
Hardware|All |x86-64
--
You may reply to this em
On Tue, Dec 22, 2020 at 09:00:43AM +, Simon Ser wrote:
> On Tuesday, December 22nd, 2020 at 9:55 AM, Daniel Vetter
> wrote:
>
> > On Fri, Dec 11, 2020 at 05:11:13PM +0100, Daniel Vetter wrote:
> > > I tried to fix this for real, but it's very sprawling and lots of
> > > drivers get this mild
https://bugzilla.kernel.org/show_bug.cgi?id=210849
--- Comment #1 from xrootw...@gmail.com ---
Kernel 5.7.0 works fine
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https://bugzilla.kernel.org/show_bug.cgi?id=210849
--- Comment #2 from xrootw...@gmail.com ---
More bugs like this https://bugzilla.redhat.com/show_bug.cgi?id=1881889
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https://bugzilla.kernel.org/show_bug.cgi?id=210849
--- Comment #3 from xrootw...@gmail.com ---
5.10.1 builded from sources have same result
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xrootw...@gmail.com changed:
What|Removed |Added
Kernel Version|>=5.9 |5.10.1
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On Tue, Dec 22, 2020 at 12:56 PM Tian Tao wrote:
>
> Hibmc use the devm_drm_dev_alloc function in hibmc_pci_probe, if
> hibmc_pci_probe returns non-zero, devm_drm_dev_alloc will call
> devm_drm_dev_init, which will call devm_drm_dev_init_release to
> release drm_dev_put. There is no need for hibmc
Previous series: https://patchwork.freedesktop.org/series/85040/
Simon Ser (5):
drm/doc: fix drm_plane_type docs
drm/doc: document the type plane property
drm/doc: re-format drm.h file comment
drm/doc: demote old doc-comments in drm.h
drm/doc: render drm.h uapi docs
Documentation/gpu/d
Sphinx doesn't like old doc-comments in drm.h and generates warnings
like:
./include/uapi/drm/drm.h:87: warning: cannot understand function prototype:
'struct drm_clip_rect '
./include/uapi/drm/drm.h:97: warning: cannot understand function prototype:
'struct drm_drawable_info '
./inc
The docs for enum drm_plane_type mention legacy IOCTLs, however the
plane type is not tied to legacy IOCTLs, the drm_cursor.primary and
cursor fields are. Add a small paragraph to reference these.
Instead, document expectations for primary and cursor planes for
non-legacy userspace. Note that thes
It doesn't seem like drm.h docs are included anywhere. Render them next
to drm_mode.h, under the "Userspace API Structures" section.
This also allows references to e.g. DRM_CAP_* to be properly linkified
elsewhere in our docs.
Signed-off-by: Simon Ser
Acked-by: Daniel Vetter
Cc: Pekka Paalanen
Add a new entry for "type" in the section for standard plane properties.
v3: improve paragraph about mixing legacy IOCTLs with explicit usage,
not that a driver may support cursors without cursor planes (Daniel)
Signed-off-by: Simon Ser
Cc: Daniel Vetter
Cc: Pekka Paalanen
---
drivers/gpu/drm
Our documentation build system chokes on \file comments:
./include/uapi/drm/drm.h:2: warning: Cannot understand * \file drm.h
on line 2 - I thought it was a doc line
Remove all of the slash-directives, and demote to a normal comment. Keep
the historical information because it predates G
On Fri, Dec 18, 2020 at 06:55:35PM +0100, Christian König wrote:
> As far as I can tell the buffer_count was never used by an
> userspace application.
>
> The number of BOs in the system is far better suited in
> debugfs than sysfs and we now should be able to add other
> information here as well.
Hm, a git rebase was missing some of my changes for v3. Sorry about that.
Simon Ser (5):
drm/doc: fix drm_plane_type docs
drm/doc: document the type plane property
drm/doc: re-format drm.h file comment
drm/doc: demote old doc-comments in drm.h
drm/doc: render drm.h uapi docs
Documentat
The docs for enum drm_plane_type mention legacy IOCTLs, however the
plane type is not tied to legacy IOCTLs, the drm_cursor.primary and
cursor fields are. Add a small paragraph to reference these.
Instead, document expectations for primary and cursor planes for
non-legacy userspace. Note that thes
Add a new entry for "type" in the section for standard plane properties.
v3: improve paragraph about mixing legacy IOCTLs with explicit usage,
not that a driver may support cursors without cursor planes (Daniel)
v4: fixing rebase gone wrong
Signed-off-by: Simon Ser
Cc: Daniel Vetter
Cc: Pekka
Our documentation build system chokes on \file comments:
./include/uapi/drm/drm.h:2: warning: Cannot understand * \file drm.h
on line 2 - I thought it was a doc line
Remove all of the slash-directives, and demote to a normal comment. Keep
the historical information because it predates G
Sphinx doesn't like old doc-comments in drm.h and generates warnings
like:
./include/uapi/drm/drm.h:87: warning: cannot understand function prototype:
'struct drm_clip_rect '
./include/uapi/drm/drm.h:97: warning: cannot understand function prototype:
'struct drm_drawable_info '
./inc
It doesn't seem like drm.h docs are included anywhere. Render them next
to drm_mode.h, under the "Userspace API Structures" section.
This also allows references to e.g. DRM_CAP_* to be properly linkified
elsewhere in our docs.
Signed-off-by: Simon Ser
Acked-by: Daniel Vetter
Cc: Pekka Paalanen
On Fri, Dec 18, 2020 at 06:55:36PM +0100, Christian König wrote:
> Instead of printing this on the per device pool.
>
> Signed-off-by: Christian König
Hm shouldn't we remove this from radeon/amdgpu too and drop the
EXPORT_SYMBOL for ttm_pool_debugfs? I'm kinda confused why we still have
both ...
A driver must not set drm_crtc.cursor and any of the legacy funcs at the
same time, otherwise it's not clear which one DRM core should use for
legacy cursor updates.
Signed-off-by: Simon Ser
Cc: Daniel Vetter
---
drivers/gpu/drm/drm_mode_config.c | 10 ++
1 file changed, 10 insertions(+
On Fri, Dec 18, 2020 at 06:55:37PM +0100, Christian König wrote:
> Useful for testing.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/ttm/ttm_pool.c | 50 ++
> 1 file changed, 32 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_
On Fri, Dec 18, 2020 at 06:55:38PM +0100, Christian König wrote:
> Only initialize the DMA coherent pools if they are used.
>
> Signed-off-by: Christian König
Ah, just realized the answer to my question on patch 2: The pools are
per-device, due to dma_alloc_coherent being per-device (but really
On Tue, Dec 22, 2020 at 02:35:21PM +0100, Simon Ser wrote:
> Add a new entry for "type" in the section for standard plane properties.
>
> v3: improve paragraph about mixing legacy IOCTLs with explicit usage,
> not that a driver may support cursors without cursor planes (Daniel)
s/not/note/
>
>
On Sun, Dec 20, 2020 at 6:10 AM Markus Elfring wrote:
>
> From: Markus Elfring
> Date: Sat, 19 Dec 2020 18:30:56 +0100
>
> Two update suggestions were taken into account
> from static source code analysis.
>
Applied. Thanks!
Alex
> Markus Elfring (2):
> Return directly after a failed kzall
On Tue, Dec 22, 2020 at 02:40:02PM +0100, Simon Ser wrote:
> A driver must not set drm_crtc.cursor and any of the legacy funcs at the
> same time, otherwise it's not clear which one DRM core should use for
> legacy cursor updates.
>
> Signed-off-by: Simon Ser
> Cc: Daniel Vetter
Reviewed-by: Da
On Fri, Dec 04, 2020 at 02:12:21PM +0100, Enrico Weigelt, metux IT consult
wrote:
> VIRTIO itself has no dependencies and therefore can easily be just
> select'ed, instead of depending on it. The current depends on causes
> any others trying to select VIRTIO to fail like this:
>
>drivers/gpu/
On Fri, Dec 11, 2020 at 09:32:29AM +0800, Tian Tao wrote:
> Use flexible-array member introduced in C99 instead of zero-length
> array. Most of zero-length array was already taken care in previous
> patch [1]. Now modified few more cases which were not handled earlier.
>
> [1]. https://patchwork.k
On Fri, Dec 18, 2020 at 07:19:59PM -0800, Chia-I Wu wrote:
> They trigger the BUG_ON() in drm_gem_private_object_init otherwise.
>
> Signed-off-by: Chia-I Wu
> Cc: Gurchetan Singh
> Cc: Gerd Hoffmann
Pushed to drm-misc-next.
thanks,
Gerd
___
dri-
Hi Allen,
On Tue, Dec 22, 2020 at 11:29:34AM +, allen.c...@ite.com.tw wrote:
> Hi
>
> It has been about two weeks since I posted v6 and haven't heard anything.
> Consider this a gentle ping.
>
> Just wondering if the set needs additional work and I will fix and
> upstream again.
I'm afraid
On 21-12-20, 21:06, Rob Herring wrote:
> 'maxItems' equal to the 'items' list length is redundant. 'maxItems' is
> preferred for a single entry while greater than 1 should have an 'items'
> list.
>
> A meta-schema check for this is pending once these existing cases are
> fixed.
> ---
> .../devic
On Fri, 18 Dec 2020, Ankit Nautiyal wrote:
> This patch series attempts to add support for a DP-HDMI2.1 Protocol
> Convertor. The VESA spec for the HDMI2.1 PCON are proposed in Errata
> E5 to DisplayPort_v2.0:
> https://vesa.org/join-vesamemberships/member-downloads/?action=stamp&fileid=42299
> Th
On Mon, Dec 21, 2020 at 09:06:45PM -0700, Rob Herring wrote:
> 'maxItems' equal to the 'items' list length is redundant. 'maxItems' is
> preferred for a single entry while greater than 1 should have an 'items'
> list.
Acked-by: Mark Brown
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___
On Mon, Dec 21, 2020 at 04:46:59PM -0700, Rob Herring wrote:
> *-supply properties are always a single phandle, so binding schemas
> don't need a type $ref nor 'maxItems'.
Acked-by: Mark Brown
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https://bugzilla.kernel.org/show_bug.cgi?id=210429
--- Comment #2 from jordanlepp...@gmail.com ---
Here are logs using Wayfire (a wlroots compositor), note the disconnect
immediately after modesetting. The DPMS sleep happened at 15:46:45, and the
wakeup at 15:46:54.
DD 22-12-20 15:46:45.685 - [ba
Hi Dave and Daniel,
here's this week's PR for drm-misc-next-fixes.
Best regards
Thomas
drm-misc-next-fixes-2020-12-22:
Short summary of fixes pull:
* dma-buf: Include for building on MIPS
* komeda: Fix order of operation in commit tail; Fix NULL-pointer and
out-of-bounds access; C
On 2020-12-22 00:44, Isaac J. Manjarres wrote:
The SMMU driver depends on the availability of the ARM LPAE and
ARM V7S io-pgtable format code to work properly. In preparation
Nit: we don't really depend on v7s - we *can* use it if it's available,
address constraints are suitable, and the SMMU
On 2020-12-22 00:44, Isaac J. Manjarres wrote:
The io-pgtable code constructs an array of init functions for each
page table format at compile time. This is not ideal, as this
increases the footprint of the io-pgtable code, as well as prevents
io-pgtable formats from being built as kernel modules
On 2020-12-21 10:18 p.m., Zhan Liu wrote:
[Why]
Driver cannot change amdgpu framebuffer (afb) format while doing
page flip. Force system doing so will cause ioctl error, and result in
breaking several functionalities including FreeSync.
If afb format is forced to change during page flip, followi
On Tue, Dec 22, 2020 at 9:55 PM Kazlauskas, Nicholas
wrote:
>
> On 2020-12-21 10:18 p.m., Zhan Liu wrote:
> > [Why]
> > Driver cannot change amdgpu framebuffer (afb) format while doing
> > page flip. Force system doing so will cause ioctl error, and result in
> > breaking several functionalities i
From: Paul Cercueil
[ Upstream commit 33700f6f7d9f6b4e1e6df933ef7fd39c662c ]
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
sys
From: Yifan Zhang
[ Upstream commit 0b08c54bb7a37047a3a006e36c2270ebc62fef7d ]
[Why]
Screen corruption on Navi10 card
[How]
Set system context in DCN only on Renoir
Tested-by: Matt Coffin
Acked-by: Alex Deucher
Signed-off-by: Yifan Zhang
Reviewed-by: Roman Li
Signed-off-by: Alex Deucher
S
From: Douglas Anderson
[ Upstream commit 137655d1ed353806b8591855b569efd090d84135 ]
On some panels hooked up to the ti-sn65dsi86 bridge chip we found that
link training was failing. Specifically, we'd see:
ti_sn65dsi86 2-002d: [drm:ti_sn_bridge_enable] *ERROR* Link training failed,
link is
From: Yifan Zhang
[ Upstream commit c0fb85ae02b62bded71110f44e8b0fe34f11260f ]
[why]
display S/G mode fails in Renoir
[how]
Setup system context in dm init.
Signed-off-by: Yifan Zhang
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
.../gpu/drm/a
From: Dennis Li
[ Upstream commit 22503d803dab174b7f038fc9886c225ef30ee95c ]
Instead of saving bad pages in amdgpu_ras_reset_gpu, it will reduce
the unnecessary calling of amdgpu_ras_save_bad_pages.
Signed-off-by: Dennis Li
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
Signed-off-by
From: Bas Nieuwenhuizen
[ Upstream commit b35ce7b364ec80b54f48a8fdf9fb74667774d2da ]
Silently accepting it could result in corruption.
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Alex Deucher
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
dri
From: Krishna Manikandan
[ Upstream commit b3d91800d9ac35014e0349292273a6fa7938d402 ]
When there are back to back commits with async cursor update,
there is a case where second commit can program the DPU hw
blocks while first didn't complete flushing config to HW.
Synchronize the compositions s
From: "Tao.Huang"
[ Upstream commit 585e7cedf304ce76410c922e632bef04fd316ead ]
[Why]
The C standard does not specify whether an enum is signed or unsigned.
In the function prototype, one of the argument is defined as an enum
but its declaration was unit32_t. Fix this by changing the function
arg
From: Lewis Huang
[ Upstream commit e748b59fb74e8725c8774a4b0753fabba9de7b97 ]
[Why]
Driver keeps the invalid information cause report the
incorrect monitor which save in remote sink to OS
[How]
When connector type change from MST to non-MST,
stop the topology manager.
Signed-off-by: Lewis Hua
From: Alvin Lee
[ Upstream commit 6f2239ccdfc04938dc35e67dd60191b2c05dfb63 ]
[Why]
When enabling PIP in Heaven, the PIP planes are VSYNC
flip and is also the top-most pipe. In this case GSL
will be disabled because we only check immediate flip
for the top pipe. However, the desktop planes are st
From: Isabel Zhang
[ Upstream commit 685b4d8142dcbf11b817f74c2bc5b94eca7ee7f2 ]
[Why]
On APU should be always using prefetch mode 0.
Currently, sometimes prefetch mode 1 is being
used causing system to hard hang due to
minTTUVBlank being too low.
[How]
Any ASIC running DCN21 will by default all
From: Hugo Hu
[ Upstream commit 3a372bed1e337efa450d8288bc75cfc9237b7bad ]
[Why]
The current end of T9 delay is relay on polling
sink status by DPCD. But the polling for sink
status change after NoVideoStream_flag set to 0.
[How]
Add function edp_add_delay_for_T9 to add T9 delay.
Move the sink
From: Eryk Brol
[ Upstream commit 886876ecf7f46917af8065bb574a669f19302f96 ]
[Why]
We want to trigger atomic check on connector when
DSC debugfs properties are changed. The previous
method was reverted because it accessed connector
properties unsafely and would also heavily
impact performance.
From: Jiansong Chen
[ Upstream commit ef3b2987254035f9b869f70151b4220c34f2f133 ]
Toggle on/off gfxoff during video playback to fix gpu hang.
v2: change sequence to be more compatible with original code.
Signed-off-by: Jiansong Chen
Reviewed-by: James Zhu
Reviewed-by: Hawking Zhang
Signed-of
From: Dmytro Laktyushkin
[ Upstream commit 84aef2ab0977199784671295a07043191233d7c7 ]
Recout calculation does not corrrectly handle plane
clip rect that extends beyond the left most border
of stream source rect. This change adds handling by
truncating the invisible clip rect.
Signed-off-by: Dmy
From: Marek Olšák
[ Upstream commit 4b60bb0dde1baf347540253f856c54bc908e525c ]
v2: squash in build fix
Acked-by: Alex Deucher
Signed-off-by: Marek Olšák
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 -
1 file changed, 4 insertions
From: Kevin Wang
[ Upstream commit 71037bfc78bf63a6640792ace925741767fb6bfc ]
add missing clock gating informations in amdgpu_pm_info
1. AMD_CG_SUPPORT_VCN_MGCG
2. AMD_CG_SUPPORT_HDP_DS
3. AMD_CG_SUPPORT_HDP_SD
4. AMD_CG_SUPPORT_IH_CG
5. AMD_CG_SUPPORT_JPEG_MGCG
Signed-off-by: Kevin Wang
Revie
From: Qinglang Miao
[ Upstream commit f2e66f212a9de04afc2caa5ec79057c0ac75c728 ]
Add the missing platform_driver_unregister() before return
from panel_simple_init in the error handling case when failed
to register panel_simple_dsi_driver with CONFIG_DRM_MIPI_DSI
enabled.
Signed-off-by: Qinglang
From: Biju Das
[ Upstream commit 4178bd5a3c57e107b3df5e17de6dc60cb3890647 ]
dev_err_probe function simplifies error handling. So use the same in probe
function wherever possible.
Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Sam Ravnborg
Link:
https://patchwork.free
From: KuoHsiang Chou
[ Upstream commit 2d26123dd9075df82f217364f585a3a6aab5412d ]
[Bug] Change the vertical synchroous polary of 1920x1080 @60Hz
from Negtive to Positive
Signed-off-by: KuoHsiang Chou
Signed-off-by: Thomas Zimmermann
Link:
https://patchwork.freedesktop.org/patch/msgid/
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