On Wed, 9 Dec 2020 01:36:37 +0100
Daniel Vetter wrote:
> On Mon, Dec 07, 2020 at 09:10:00AM +, Simon Ser wrote:
> > On Monday, December 7th, 2020 at 9:45 AM, Pekka Paalanen
> > wrote:
> >
> > > > > > > > - * Cursor and overlay planes are optional. All drivers should
> > > > > > > > prov
On Tue, Dec 08, 2020 at 06:13:20PM +, Xiong, Jianxin wrote:
> > > +static inline struct ib_umem *ib_umem_dmabuf_get(struct ib_device
> > > *device,
> > > + unsigned long offset,
> > > + size_t size, int fd,
> >
On Tue, Dec 08, 2020 at 02:39:11PM -0800, Jianxin Xiong wrote:
> This is the fourteenth version of the patch set. Changelog:
>
> v14:
> * Check return value of dma_fence_wait()
> * Fix a dma-buf leak in ib_umem_dmabuf_get()
> * Fix return value type cast for ib_umem_dmabuf_get()
> * Return -EOPNOT
This patch allows LVDS PHYs to be configured through
the generic functions and through a custom structure
added to the generic union.
The parameters added here are based on common LVDS PHY
implementation practices. The set of parameters
should cover all potential users.
Cc: Kishon Vijay Abraham
On 04/12/2020 18:51, Arnd Bergmann wrote:
From: Arnd Bergmann
ttm_pool_type_count() is not used when debugfs is disabled:
drivers/gpu/drm/ttm/ttm_pool.c:243:21: error: unused function
'ttm_pool_type_count' [-Werror,-Wunused-function]
static unsigned int ttm_pool_type_count(struct ttm_pool_typ
Hi Daniel,
On 12/7/20 12:41 PM, Lukasz Luba wrote:
On 12/3/20 4:09 PM, Daniel Lezcano wrote:
On 03/12/2020 16:38, Lukasz Luba wrote:
On 12/3/20 1:09 PM, Daniel Lezcano wrote:
On 18/11/2020 13:03, Lukasz Luba wrote:
Devfreq cooling needs to now the correct status of the device in order
to
This adds support for the iTE IT6505.
This device can convert DPI signal to DP output.
From: Allen Chen
Signed-off-by: Jitao Shi
Signed-off-by: Pi-Hsun Shih
Signed-off-by: Yilun Lin
Signed-off-by: Hermes Wu
Signed-off-by: Allen Chen
---
drivers/gpu/drm/bridge/Kconfig |7 +
drivers/
This patch converts the mixel,mipi-dsi-phy binding to
DT schema format using json-schema.
Comparing to the plain text version, the new binding adds
the 'assigned-clocks', 'assigned-clock-parents' and
'assigned-clock-rates' properites, otherwise 'make dtbs_check'
would complain that there are mis-m
Use devm_drm_irq_install to register interrupts so that
drm_irq_uninstall is not needed to be called.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/tidss/tidss_drv.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_drv.c
b/drivers/gpu/drm/tidss/ti
On Mon 07 Dec 23:48 CST 2020, Sam Ravnborg wrote:
> Hi Bjorn,
> On Mon, Dec 07, 2020 at 10:44:46PM -0600, Bjorn Andersson wrote:
> > Some bridge chips, such as the TI SN65DSI86 DSI/eDP bridge, provides
> > means of generating a PWM signal for backlight control of the attached
> > panel. The provid
The Northwest Logic MIPI DSI host controller embedded in i.MX8qxp
works with a Mixel MIPI DPHY + LVDS PHY combo to support either
a MIPI DSI display or a LVDS display. So, this patch calls
phy_set_mode() from nwl_dsi_enable() to set PHY mode to MIPI DPHY
explicitly.
Cc: Guido Günther
Cc: Robert
On 12/8/20 9:12 AM, Nicolas Dufresne wrote:
Le mercredi 18 novembre 2020 à 00:06 -0800, Wendy Liang a écrit :
Create AI engine device/partition hierarchical structure.
Each AI engine device can have multiple logical partitions(groups of AI
engine tiles). Each partition is column based and has
i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
either a MIPI DSI display or a LVDS display. The PHY mode is controlled
by SCU firmware and the driver would call a SCU firmware function to
configure the PHY mode. The single LVDS PHY has 4 data lanes to support
a LVDS display
On 12/8/20 9:12 AM, Nicolas Dufresne wrote:
Le mercredi 18 novembre 2020 à 00:06 -0800, Wendy Liang a écrit :
Create AI engine device/partition hierarchical structure.
Each AI engine device can have multiple logical partitions(groups of AI
engine tiles). Each partition is column based and has
Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.
Cc: Guido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v1->v2:
* Add the binding for i.MX8qxp Mixel combo PHY based on the converted bin
Hi Guido,
On Tue, 2020-12-08 at 10:02 +0100, Guido Günther wrote:
> Hi Liu,
> On Fri, Dec 04, 2020 at 03:33:40PM +0800, Liu Ying wrote:
> > Hi,
> >
> > This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
> > Freescale i.MX8qxp SoC.
>
> This looks good to me from the NWL and
On Tue, 2020-12-08 at 10:07 +0100, Guido Günther wrote:
> Hi Liu,
> Since we now gain optional properties validation would become even more
> useful. Could you look into converting to YAML before adding more
> values?
Yes, a YAML one would be good.
I'll try to do the conversion and then add the bi
On Tue, 2020-12-08 at 10:24 +0100, Guido Günther wrote:
> Hi Liu,
> some minor comments inline:
>
> On Fri, Dec 04, 2020 at 03:33:44PM +0800, Liu Ying wrote:
> > i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
> > either a MIPI DSI display or a LVDS display. The PHY mode is
On Mon, 2020-12-07 at 15:30 -0600, Rob Herring wrote:
> On Wed, Nov 18, 2020 at 04:21:25PM +0800, Chunfeng Yun wrote:
> > Convert mediatek,mtu3.txt to YAML schema mediatek,mtu3.yaml
> >
> > Signed-off-by: Chunfeng Yun
> > ---
> > v3:
> > 1. fix yamllint warning
> > 2. remove pinctrl* properti
Hi Christoph,
Le mar. 3 nov. 2020 à 19:13, Paul Cercueil a
écrit :
Hi Christoph,
Le mar. 3 nov. 2020 à 18:50, Christoph Hellwig a
écrit :
On Mon, Nov 02, 2020 at 10:06:49PM +, Paul Cercueil wrote:
This function can be used by drivers that need to mmap dumb buffers
created with non-c
Le mercredi 18 novembre 2020 à 00:06 -0800, Wendy Liang a écrit :
> Create AI engine device/partition hierarchical structure.
>
> Each AI engine device can have multiple logical partitions(groups of AI
> engine tiles). Each partition is column based and has its own node ID
> in the system. AI engi
On Mon, 2020-12-07 at 15:24 -0600, Rob Herring wrote:
> On Wed, Nov 18, 2020 at 04:21:24PM +0800, Chunfeng Yun wrote:
> > Convert mediatek,mtk-xhci.txt to YAML schema mediatek,mtk-xhci.yaml
> >
> > Signed-off-by: Chunfeng Yun
> > ---
> > v3:
> > 1. fix yamllint warning
> > 2. remove pinctrl*
Hi,
On Tue, Dec 08, 2020 at 01:27:54PM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the drm tree got a conflict in:
>
> drivers/gpu/vga/vga_switcheroo.c
>
> between commit:
>
> 99efde6c9bb7 ("PCI/PM: Rename pci_wakeup_bus() to pci_resume_bus()")
>
> from the pc
On Mon, Nov 23, 2020 at 11:47 AM Hsin-Yi Wang wrote:
>
> When suspending the driver, anx7625_power_standby() will be called to
> turn off reset-gpios and enable-gpios. However, power supplies are not
> disabled. To save power, the driver can get the power supply regulators
> and turn off them in a
This was the message from kernel test robot.
>> usr/include/linux/kfd_ioctl.h:37: found __[us]{8,16,32,64} type without
#include
On Tue, Dec 8, 2020 at 4:31 AM Simon Ser wrote:
> May I ask what exactly fails when you drop #include
> from drm.h?
>
__
Hi,
This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
Freescale i.MX8qxp SoC.
The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either
MIPI DPHY mode or LVDS PHY mode. The PHY mode is controlled by i.MX8qxp
SCU firmware. The PHY driver would call a SCU funct
Hi Maxime,
On 03.12.20 14:25, Maxime Ripard wrote:
From: Dave Stevenson
The DSI1_PHY_AFEC0_PD_DLANE1 and DSI1_PHY_AFEC0_PD_DLANE3 register
definitions were swapped, so trying to use more than a single data
lane failed as lane 1 would get powered down.
(In theory a 4 lane device would work as a
On Tue 08 Dec 06:47 CST 2020, Thierry Reding wrote:
> On Mon, Dec 07, 2020 at 10:44:46PM -0600, Bjorn Andersson wrote:
> > Some bridge chips, such as the TI SN65DSI86 DSI/eDP bridge, provides
> > means of generating a PWM signal for backlight control of the attached
> > panel. The provided PWM chi
Hi Laurent,
On Tue, 2020-12-08 at 14:38 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> Thank you for the patch.
>
> On Fri, Dec 04, 2020 at 03:33:42PM +0800, Liu Ying wrote:
> > This patch allows LVDS PHYs to be configured through
> > the generic functions and through a custom structure
> > added
On 12/9/2020 12:39 AM, Jianxin Xiong wrote:
Implement the new driver method 'reg_user_mr_dmabuf'. Utilize the core
functions to import dma-buf based memory region and update the mappings.
Add code to handle dma-buf related page fault.
Signed-off-by: Jianxin Xiong
Reviewed-by: Sean Hefty
Acke
On Wed, 9 Dec 2020 01:42:23 +0100
Daniel Vetter wrote:
> On Sun, Dec 06, 2020 at 04:34:15PM +, Simon Ser wrote:
> > The previous wording could be understood by user-space evelopers as "a
> > primary/cursor plane is only compatible with a single CRTC" [1].
> >
> > Reword the planes descriptio
Hi
Am 09.12.20 um 01:13 schrieb Daniel Vetter:
On Fri, Dec 04, 2020 at 09:47:08AM +0100, Christian König wrote:
Am 04.12.20 um 09:32 schrieb Thomas Zimmermann:
Hi
Am 03.12.20 um 21:41 schrieb Daniel Vetter:
On Thu, Dec 03, 2020 at 07:59:04PM +0100, Thomas Zimmermann wrote:
Hi
Am 03.12.20 u
On Tue, 08 Dec 2020, Jani Nikula wrote:
> For whatever reason this old series was never merged. Please let's get
> this done.
Daniel, Maarten, may I have an ack to merge patches 1 and 4 via
drm-intel?
BR,
Jani.
>
> For i915 DP this still needs a patch to start using the model size from
> DPCD.
Hi all,
After merging the drm-misc tree, today's linux-next build (htmldocs)
produced this warning:
include/drm/gpu_scheduler.h:201: warning: Function parameter or member 'list'
not described in 'drm_sched_job'
Introduced by commit
8935ff00e3b1 ("drm/scheduler: "node" --> "list"")
--
Cheer
Am 08.12.20 um 21:16 schrieb Andrey Grodzovsky:
For BOs imported from outside of amdgpu, setting of amdgpu_gem_object_funcs
was missing in amdgpu_dma_buf_create_obj. Fix by refactoring BO creation
and amdgpu_gem_object_funcs setting into single function called
from both code paths.
Fixes: d693de
On Tuesday, December 8th, 2020 at 7:32 PM, James Park
wrote:
> This was the message from kernel test robot.
>
> >> usr/include/linux/kfd_ioctl.h:37: found __[us]{8,16,32,64} type without
> >> #include
Interesting that the warning comes from linux/kfd_ioctl.h. I guess
keeping the linux/types.h
On Wed, Dec 9, 2020 at 10:32 AM Thomas Zimmermann wrote:
>
> Hi
>
> Am 09.12.20 um 01:13 schrieb Daniel Vetter:
> > On Fri, Dec 04, 2020 at 09:47:08AM +0100, Christian König wrote:
> >> Am 04.12.20 um 09:32 schrieb Thomas Zimmermann:
> >>> Hi
> >>>
> >>> Am 03.12.20 um 21:41 schrieb Daniel Vetter:
On Monday, December 7th, 2020 at 7:15 PM, James Park
wrote:
> Create drm_basic_types.h to define types previously defined by drm.h.
> Use DRM_FOURCC_STANDALONE to include drm_fourcc.h without drm.h.
> This will allow Mesa to port code to Windows more easily.
>
> Signed-off-by: James Park
This
On Wed, Dec 9, 2020 at 9:23 AM Pekka Paalanen wrote:
>
> On Wed, 9 Dec 2020 01:36:37 +0100
> Daniel Vetter wrote:
>
> > On Mon, Dec 07, 2020 at 09:10:00AM +, Simon Ser wrote:
> > > On Monday, December 7th, 2020 at 9:45 AM, Pekka Paalanen
> > > wrote:
> > >
> > > > > > > > > - * Cursor and o
Hi Sam,
On Tue, 2020-12-08 at 19:48 +0100, Sam Ravnborg wrote:
> Hi Philipp,
> On Tue, Dec 08, 2020 at 04:54:33PM +0100, Philipp Zabel wrote:
> > Simple managed encoders do not require the .destroy callback,
> > make the whole funcs structure optional.
> >
> > Signed-off-by: Philipp Zabel
> > Re
Am 09.12.20 um 11:16 schrieb Daniel Vetter:
[SNIP]
At least I would be fine with that. For now amdgpu is the only exporter who
implements the explicit pin/unpin semantics anyway.
Yup, I think that makes sense (if it works). Maybe we could use something
like:
a) dma_buf pin exists, driver is dy
On Wed, Dec 9, 2020 at 6:24 AM Daniel Vetter wrote:
>
> On Wed, Dec 09, 2020 at 02:07:35AM +0530, Sumera Priyadarsini wrote:
> > Update the vkms documentation to contain steps to:
> >
> > - setup the vkms driver
> > - run tests using igt
> >
> > Signed-off-by: Sumera Priyadarsini
> > ___
> > Ch
BO created with amdgpu_bo_create_reserved() wasn't clean
properly before, which causes:
[ 21.056218] WARNING: CPU: 0 PID: 7 at drivers/gpu/drm/ttm/ttm_bo.c:518
ttm_bo_release+0x2bf/0x310 [ttm]
[ 21.056430] Call Trace:
[ 21.056525] amdgpu_bo_unref+0x1a/0x30 [amdgpu]
[ 21.056635] amdgpu_
On Wed, Dec 9, 2020 at 12:33 PM Sumera Priyadarsini
wrote:
>
> On Wed, Dec 9, 2020 at 6:24 AM Daniel Vetter wrote:
> >
> > On Wed, Dec 09, 2020 at 02:07:35AM +0530, Sumera Priyadarsini wrote:
> > > Update the vkms documentation to contain steps to:
> > >
> > > - setup the vkms driver
> > > - ru
On Wed, Dec 9, 2020 at 12:29 PM Tomi Valkeinen wrote:
>
> On 09/12/2020 02:48, Daniel Vetter wrote:
> > On Tue, Dec 08, 2020 at 03:50:59PM +0800, Tian Tao wrote:
> >> Use devm_drm_irq_install to register interrupts so that
> >> drm_irq_uninstall is not needed to be called.
> >>
> >> Signed-off-by:
Hi Christian,
Can you please pick this up for drm-misc-next?
Thanks,
Nirmoy
On 12/9/20 12:51 PM, Nirmoy Das wrote:
BO created with amdgpu_bo_create_reserved() wasn't clean
properly before, which causes:
[ 21.056218] WARNING: CPU: 0 PID: 7 at drivers/gpu/drm/ttm/ttm_bo.c:518
ttm_bo_relea
On Wed, Dec 9, 2020 at 1:06 PM Tomi Valkeinen wrote:
>
> On 09/12/2020 13:56, Daniel Vetter wrote:
> > On Wed, Dec 9, 2020 at 12:29 PM Tomi Valkeinen
> > wrote:
> >>
> >> On 09/12/2020 02:48, Daniel Vetter wrote:
> >>> On Tue, Dec 08, 2020 at 03:50:59PM +0800, Tian Tao wrote:
> Use devm_drm
On Thu, Dec 03, 2020 at 05:47:05AM -0800, Rodrigo Vivi wrote:
> Hi Dave and Daniel,
>
> Please ignore the pull request I had sent yesterday and use only this one.
>
> I had missed one patch: 14d1eaf08845 ("drm/i915/gt: Protect context lifetime
> with RCU").
>
> Also, please notice that the comm
On Tue, Dec 8, 2020 at 6:26 AM Arnd Bergmann wrote:
>
> On Mon, Dec 7, 2020 at 11:28 PM 'Nick Desaulniers' via Clang Built
> Linux wrote:
> >
> > On Mon, Dec 7, 2020 at 2:17 PM Arnd Bergmann wrote:
> > >
> > > On Mon, Dec 7, 2020 at 11:08 PM 'Nick Desaulniers' via Clang Built
> > > Linux wrote:
On 12/09, Daniel Vetter wrote:
> On Wed, Dec 9, 2020 at 12:33 PM Sumera Priyadarsini
> wrote:
> >
> > On Wed, Dec 9, 2020 at 6:24 AM Daniel Vetter wrote:
> > >
> > > On Wed, Dec 09, 2020 at 02:07:35AM +0530, Sumera Priyadarsini wrote:
> > > > Update the vkms documentation to contain steps to:
> >
On Wed, Dec 9, 2020 at 12:17 PM Tomi Valkeinen wrote:
>
> Hi Daniel,
>
> On 09/12/2020 02:51, Daniel Vetter wrote:
>
> >>> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> >>> index ba839e5e357d..4d9e217e5040 100644
> >>> --- a/include/drm/drm_crtc.h
> >>> +++ b/include/drm/drm_crtc.
On Tue, Dec 08, 2020 at 11:54:57AM -0800, Jiaying Liang wrote:
>
> On 12/8/20 9:12 AM, Nicolas Dufresne wrote:
> > Le mercredi 18 novembre 2020 à 00:06 -0800, Wendy Liang a écrit :
> > > Create AI engine device/partition hierarchical structure.
> > >
> > > Each AI engine device can have multiple
Hi Nirmoy,
oh, ok sure. I was thinking to merge it through amd-staging-drm-next
instead, but going through drm-misc-next is even better.
Regards,
Christian.
Am 09.12.20 um 12:57 schrieb Nirmoy:
Hi Christian,
Can you please pick this up for drm-misc-next?
Thanks,
Nirmoy
On 12/9/20 12:51
On Thu, Dec 3, 2020 at 10:31 PM Alex Deucher wrote:
>
> On Tue, Sep 29, 2020 at 4:04 PM Alex Deucher wrote:
> >
> > On Tue, Sep 29, 2020 at 8:31 AM Jan Kiszka wrote:
> > >
> > > On 10.09.20 20:18, Deucher, Alexander wrote:
> > > > [AMD Public Use]
> > > >
> > > >
> > > >
> > > >> -Original M
Based on an idea from Dave, but cleaned up a bit.
We had multiple fields for essentially the same thing.
Now bo->base.size is the original size of the BO in
arbitrary units, usually bytes.
bo->mem.num_pages is the size in number of pages in the
resource domain of bo->mem.mem_type.
v2: use the G
On Wed, Dec 9, 2020 at 3:10 PM Christian König
wrote:
>
> Based on an idea from Dave, but cleaned up a bit.
>
> We had multiple fields for essentially the same thing.
>
> Now bo->base.size is the original size of the BO in
> arbitrary units, usually bytes.
>
> bo->mem.num_pages is the size in numb
(was: drm/vram-helper: Lock GEM BOs while they are mapped)
GEM VRAM helpers used to pin the BO in their implementation of vmap, so
that they could not be relocated. In recent discussions, [1][2] it became
clear that this is incorrect for in-kernel use cases, such as fbdev
emulation; which should r
Vmapping the cursor source BO contains an implicit pin operation,
so there's no need to do this manually.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_cursor.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/ast/ast_cursor.c b/drivers
This patch adds vmap_local and vunmap_local to struct drm_gem_object_funcs;
including the PRIME helpers to connect with dma-buf's related interfaces.
Besides the generic DRM core, this will become relevant for fbdev emulation
with virtio, so we update it as well.
Signed-off-by: Thomas Zimmermann
The HW cursor's BO used to be mapped permanently into the kernel's
address space. GEM's vmap operation will be protected by locks, and
we don't want to lock the BO's for an indefinate period of time.
Change the cursor code to map the HW BOs only during updates. The
vmap operation in VRAM helpers i
Implementations of the vmap/vunmap GEM callbacks may perform pinning
of the BO and may acquire the associated reservation object's lock.
Callers that only require a mapping of the contained memory can thus
interfere with other tasks that require exact pinning, such as scanout.
This is less of an is
The existing dma-buf calls dma_buf_vmap() and dma_buf_vunmap() are
allowed to pin the buffer or acquire the buffer's reservation object
lock.
This is a problem for callers that only require a short-term mapping
of the buffer without the pinning, or callers that have special locking
requirements. T
Fbdev emulation has to lock the BO into place while flushing the shadow
buffer into the BO's memory. Remove any interference with pinning by
using vmap_local functionality (instead of full vmap). This requires
BO reservation locking in fbdev's damage worker.
The new DRM client functions for lockin
Implementations of the vmap/vunmap GEM callbacks may perform pinning
of the BO and may acquire the associated reservation object's lock.
It's somewhat inconvenient to callers that simply require a mapping of
the contained memory; and also ipmplies a certain overhead.
Therefore provide drm_gem_vram
Implementations of the vmap/vunmap GEM callbacks may perform pinning
of the BO and may acquire the associated reservation object's lock.
Callers that only require a mapping of the contained memory can thus
interfere with other tasks that require exact pinning, such as scanout.
This is less of an is
Hi
Am 09.12.20 um 15:25 schrieb Thomas Zimmermann:
The existing dma-buf calls dma_buf_vmap() and dma_buf_vunmap() are
allowed to pin the buffer or acquire the buffer's reservation object
lock.
This is a problem for callers that only require a short-term mapping
of the buffer without the pinning
Am Di., 1. Dez. 2020 um 21:38 Uhr schrieb Lubomir Rintel :
>
> Just so that it's obvious what failed and why.
>
> Signed-off-by: Lubomir Rintel
Reviewed-by: Christian Gmeiner
> ---
> tests/etnaviv/etnaviv_2d_test.c | 16 ++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
> d
Am Di., 1. Dez. 2020 um 21:38 Uhr schrieb Lubomir Rintel :
>
> Run the test on a core capable of 2D rendering instead of hardcoding to
> core zero.
>
Thanks - I should have done this before landing this test :)
> Signed-off-by: Lubomir Rintel
Reviewed-by: Christian Gmeiner
> ---
> tests/etna
Am Di., 1. Dez. 2020 um 21:38 Uhr schrieb Lubomir Rintel :
>
> Instead of always dumping the rendered picture, check whether it matches
> the expectations. This makes more sense for automated testing.
>
> Retain the ability to dump the picture instead of checking it when a
> file name is given as a
Hi Daniel,
On 09/12/2020 02:51, Daniel Vetter wrote:
>>> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
>>> index ba839e5e357d..4d9e217e5040 100644
>>> --- a/include/drm/drm_crtc.h
>>> +++ b/include/drm/drm_crtc.h
>>> @@ -1084,6 +1084,9 @@ struct drm_crtc {
>>> */
>>> uint1
Hi Maxime
On Mon, 7 Dec 2020 at 15:57, Maxime Ripard wrote:
>
> drm_atomic_helper_connector_reset uses kmalloc which, from an API
> standpoint, can fail, and thus setting connector->state to NULL.
> However, our reset hook then calls drm_atomic_helper_connector_tv_reset
> that will access connect
Hi Maxime
On Mon, 7 Dec 2020 at 15:57, Maxime Ripard wrote:
>
> When run with a higher bpc than 8, the clock of the HDMI controller needs
> to be adjusted. Let's create a connector state that will be used at
> atomic_check and atomic_enable to compute and store the clock rate
> associated to the
Hi Maxime
On Mon, 7 Dec 2020 at 15:57, Maxime Ripard wrote:
>
> The PHY initialisation parameters are not based on the pixel clock but
> the TMDS clock rate which can be the pixel clock in the standard case,
> but could be adjusted based on some parameters like the bits per color.
>
> Since the T
Hi Maxime
On Mon, 7 Dec 2020 at 15:57, Maxime Ripard wrote:
>
> Unlike the previous generations, the HSM clock limitation is way above
> what we can reach without scrambling, so let's move the maximum
> frequency we support to the maximum clock frequency without scrambling.
>
> Signed-off-by: Max
Hi Maxime
On Mon, 7 Dec 2020 at 15:57, Maxime Ripard wrote:
>
> The BCM2711 supports higher bpc count than just 8, so let's support it in
> our driver.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/vc4/vc4_hdmi.c | 71 -
> drivers/gpu/drm/vc4/vc4_hdmi
Hi Maxime
On Mon, 7 Dec 2020 at 15:57, Maxime Ripard wrote:
>
> Reported-by: Thomas Zimmermann
> Fixes: 63495f6b4aed ("drm/vc4: hdmi: Make sure our clock rate is within
> limits")
> Signed-off-by: Maxime Ripard
Reviewed-by: Dave Stevenson
> ---
> drivers/gpu/drm/vc4/vc4_hdmi.c | 3 +++
> 1
On 09/12/2020 02:48, Daniel Vetter wrote:
> On Tue, Dec 08, 2020 at 03:50:59PM +0800, Tian Tao wrote:
>> Use devm_drm_irq_install to register interrupts so that
>> drm_irq_uninstall is not needed to be called.
>>
>> Signed-off-by: Tian Tao
>
> There's another drm_irq_install in the error path. Bu
Hi Maxime
On Mon, 7 Dec 2020 at 15:57, Maxime Ripard wrote:
>
> The pixel rate is for now quite simple to compute, but with more features
> (30 and 36 bits output, YUV output, etc.) will depend on a bunch of
> connectors properties.
>
> Let's store the rate we have to run the pixel clock at in ou
On Wed, Dec 09, 2020 at 11:58:44AM +0100, Philipp Zabel wrote:
> Hi Sam,
>
> On Tue, 2020-12-08 at 19:48 +0100, Sam Ravnborg wrote:
> > Hi Philipp,
> > On Tue, Dec 08, 2020 at 04:54:33PM +0100, Philipp Zabel wrote:
> > > Simple managed encoders do not require the .destroy callback,
> > > make the
Thanks for the review!
On Wednesday, December 9th, 2020 at 1:42 AM, Daniel Vetter
wrote:
> I think maybe a follow up patch should document how userspace should
> figure out how to line up the primary planes with the right crtcs (if it
> wishes to know that information, it's not super useful asi
On Wed, Dec 09, 2020 at 04:58:05PM +0100, Daniel Vetter wrote:
> On Wed, Dec 09, 2020 at 11:58:44AM +0100, Philipp Zabel wrote:
> > Hi Sam,
> >
> > On Tue, 2020-12-08 at 19:48 +0100, Sam Ravnborg wrote:
> > > Hi Philipp,
> > > On Tue, Dec 08, 2020 at 04:54:33PM +0100, Philipp Zabel wrote:
> > > >
On Wed, Dec 09, 2020 at 03:58:17PM +, Simon Ser wrote:
> Thanks for the review!
>
> On Wednesday, December 9th, 2020 at 1:42 AM, Daniel Vetter
> wrote:
>
> > I think maybe a follow up patch should document how userspace should
> > figure out how to line up the primary planes with the right
On Tue, Dec 08, 2020 at 04:54:34PM +0100, Philipp Zabel wrote:
> Add an alternative to drm_encoder_init() that allocates and initializes
> an encoder and registers drm_encoder_cleanup() with
> drmm_add_action_or_reset().
>
> Signed-off-by: Philipp Zabel
> Reviewed-by: Laurent Pinchart
> ---
> Ch
On 09/12/2020 13:56, Daniel Vetter wrote:
> On Wed, Dec 9, 2020 at 12:29 PM Tomi Valkeinen wrote:
>>
>> On 09/12/2020 02:48, Daniel Vetter wrote:
>>> On Tue, Dec 08, 2020 at 03:50:59PM +0800, Tian Tao wrote:
Use devm_drm_irq_install to register interrupts so that
drm_irq_uninstall is not
On 2020-12-09 05:02, Stephen Rothwell wrote:
> Hi all,
>
> After merging the drm-misc tree, today's linux-next build (htmldocs)
> produced this warning:
>
> include/drm/gpu_scheduler.h:201: warning: Function parameter or member 'list'
> not described in 'drm_sched_job'
>
> Introduced by commit
On Wednesday, December 9th, 2020 at 5:02 PM, Daniel Vetter
wrote:
> On Wed, Dec 09, 2020 at 03:58:17PM +, Simon Ser wrote:
> > Thanks for the review!
> >
> > On Wednesday, December 9th, 2020 at 1:42 AM, Daniel Vetter
> > wrote:
> >
> > > I think maybe a follow up patch should document how
On Wednesday, December 9th, 2020 at 5:02 PM, Daniel Vetter
wrote:
> On Wed, 9 Dec 2020 01:42:23 +0100
> Daniel Vetter wrote:
>
> > On Sun, Dec 06, 2020 at 04:34:15PM +, Simon Ser wrote:
> > > The previous wording could be understood by user-space evelopers as "a
> > > primary/cursor plane i
On 09/12/2020 14:08, Daniel Vetter wrote:
> On Wed, Dec 9, 2020 at 1:06 PM Tomi Valkeinen wrote:
>>
>> On 09/12/2020 13:56, Daniel Vetter wrote:
>>> On Wed, Dec 9, 2020 at 12:29 PM Tomi Valkeinen
>>> wrote:
On 09/12/2020 02:48, Daniel Vetter wrote:
> On Tue, Dec 08, 2020 at 03:50:5
Jason, Christian
In most implementations of the callback mentioned in the subject there's
a fence wait.
What exactly is it needed for?
Thanks,
Thomas
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On 12/9/20 5:37 PM, Jason Gunthorpe wrote:
On Wed, Dec 09, 2020 at 05:36:16PM +0100, Thomas Hellström (Intel) wrote:
Jason, Christian
In most implementations of the callback mentioned in the subject there's a
fence wait.
What exactly is it needed for?
Invalidate must stop DMA before returning
On Wed, 2020-12-09 at 14:11 +0200, Ville Syrjälä wrote:
> On Thu, Dec 03, 2020 at 05:47:05AM -0800, Rodrigo Vivi wrote:
> > Hi Dave and Daniel,
> >
> > Please ignore the pull request I had sent yesterday and use only
> > this one.
> >
> > I had missed one patch: 14d1eaf08845 ("drm/i915/gt: Protec
Hi "Christian,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on next-20201209]
[cannot apply to drm-exynos/exynos-drm-next drm-intel/for-linux-next
tegra-drm/drm/tegra/for-next linus/master drm/drm-next v5.10-rc7]
[If
Hi Ankit,
url:
https://github.com/0day-ci/linux/commits/Ankit-Nautiyal/Add-support-for-DP-HDMI2-1-PCON/20201208-160027
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-m021-20201209 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
If you fix
Hi,
On Tue, Dec 01, 2020 at 11:35:35AM +0100, Thomas Zimmermann wrote:
> Using struct drm_device.pdev is deprecated. Convert nouveau to struct
> drm_device.dev. No functional changes.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Ben Skeggs
> ---
> drivers/gpu/drm/nouveau/dispnv04/arb.c | 12
> -Original Message-
> From: Leon Romanovsky
> Sent: Tuesday, December 08, 2020 10:31 PM
> To: Xiong, Jianxin
> Cc: linux-r...@vger.kernel.org; dri-devel@lists.freedesktop.org; Doug Ledford
> ; Jason Gunthorpe ;
> Sumit Semwal ; Christian Koenig
> ; Vetter, Daniel
> Subject: Re: [PATCH
Hi "Christian,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on next-20201209]
[cannot apply to drm-exynos/exynos-drm-next drm-intel/for-linux-next
tegra-drm/drm/tegra/for-next linus/master drm/drm-next v5.10-rc7]
[If
> -Original Message-
> From: Yishai Hadas
> Sent: Tuesday, December 08, 2020 11:13 PM
> To: Xiong, Jianxin
> Cc: Doug Ledford ; Jason Gunthorpe ; Leon
> Romanovsky ; Sumit Semwal
> ; Christian Koenig ;
> Vetter, Daniel ; linux-
> r...@vger.kernel.org; dri-devel@lists.freedesktop.org; Yi
> -Original Message-
> From: Leon Romanovsky
> Sent: Tuesday, December 08, 2020 10:45 PM
> To: Xiong, Jianxin
> Cc: linux-r...@vger.kernel.org; dri-devel@lists.freedesktop.org; Doug Ledford
> ; Jason Gunthorpe ;
> Sumit Semwal ; Christian Koenig
> ; Vetter, Daniel
> Subject: Re: [PATCH
Update the vkms documentation to contain steps to:
- setup the vkms driver
- run tests using igt
Signed-off-by: Sumera Priyadarsini
___
Changes in v2:
- Change heading to title case (Daniel)
- Add examples to run tests directly (Daniel)
- Add examples to run subtests (Melissa)
Changes in v
On Wed, Dec 09, 2020 at 04:35:31PM +, Simon Ser wrote:
> On Wednesday, December 9th, 2020 at 5:02 PM, Daniel Vetter
> wrote:
>
> > On Wed, 9 Dec 2020 01:42:23 +0100
> > Daniel Vetter wrote:
> >
> > > On Sun, Dec 06, 2020 at 04:34:15PM +, Simon Ser wrote:
> > > > The previous wording cou
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