Hi
Am 01.12.20 um 11:40 schrieb Christian König:
Reviewed-by: Christian König on patch #1 and
#15.
Acked-by: Christian König on patch #2 and #16.
Could you add these patches to the AMD tree?
Best regards
Thomas
Regards,
Christian.
Am 01.12.20 um 11:35 schrieb Thomas Zimmermann:
Adher
Hi
Am 30.11.20 um 21:59 schrieb Zack Rusin:
On Nov 24, 2020, at 06:38, Thomas Zimmermann wrote:
Using struct drm_device.pdev is deprecated. Convert vmwgfx to struct
drm_device.dev. No functional changes.
Signed-off-by: Thomas Zimmermann
Cc: Roland Scheidegger
---
drivers/gpu/drm/vmwgfx/v
Am 02.12.20 um 08:55 schrieb Thomas Zimmermann:
Hi
Am 01.12.20 um 12:20 schrieb Mikulas Patocka:
On Tue, 1 Dec 2020, Thomas Zimmermann wrote:
Hi
Am 30.11.20 um 19:39 schrieb Mikulas Patocka:
On Mon, 30 Nov 2020, Daniel Vetter wrote:
On Mon, Nov 30, 2020 at 09:31:15AM -0500, Mikulas
On Tue, Dec 01, 2020 at 11:35:26AM +0100, Thomas Zimmermann wrote:
> Using struct drm_device.pdev is deprecated. Convert bochs to struct
> drm_device.dev. No functional changes.
>
> Signed-off-by: Thomas Zimmermann
> Acked-by: Sam Ravnborg
> Cc: Gerd Hoffmann
Acked-by: Gerd Hoffmann
> ---
>
On Tue, Dec 01, 2020 at 11:35:27AM +0100, Thomas Zimmermann wrote:
> Using struct drm_device.pdev is deprecated. Convert cirrus to struct
> drm_device.dev. No functional changes.
>
> Signed-off-by: Thomas Zimmermann
> Acked-by: Sam Ravnborg
> Cc: Gerd Hoffmann
Acked-by: Gerd Hoffmann
___
On Tue, Dec 01, 2020 at 11:35:36AM +0100, Thomas Zimmermann wrote:
> Using struct drm_device.pdev is deprecated. Convert qxl to struct
> drm_device.dev. No functional changes.
>
> Signed-off-by: Thomas Zimmermann
> Acked-by: Sam Ravnborg
> Cc: Gerd Hoffmann
Acked-by: Gerd Hoffmann
__
On Tue, Dec 01, 2020 at 11:35:40AM +0100, Thomas Zimmermann wrote:
> Using struct drm_device.pdev is deprecated. Convert virtgpu to struct
> drm_device.dev. No functional changes.
>
> Signed-off-by: Thomas Zimmermann
> Acked-by: Sam Ravnborg
> Cc: Gerd Hoffmann
Acked-by: Gerd Hoffmann
__
Plymovent BAS is a base system controller produced for the Plymovent filter
systems.
Co-Developed-by: David Jander
Signed-off-by: David Jander
Signed-off-by: Oleksij Rempel
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6dl-plybas.dts | 394
Assign local variable to struct drm_device *dev because they are
used multiple times within a function.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 2 +-
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 30
drivers/gpu/drm/hisilicon/
Add Plymovent Group BV M2M iMX6dl based board
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml
b/Documentation/devicetree/bindings/arm/fsl.ya
Attempting to submit patch in response to
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6162#note_712454
This will allow Mesa to port code to Windows more easily.
Hide BSD header and drm_handle_t behind _WIN32 check.
Change __volatile__ to volatile, which is standard.
James Park (1
This will allow Mesa to port code to Windows more easily.
Hide BSD header and drm_handle_t behind _WIN32 check.
Change __volatile__ to volatile, which is standard.
---
include/uapi/drm/drm.h | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/include/uapi/drm/drm.h b/
Since the CRTC setup in vc4 is split between the PixelValves/TXP and the
HVS, only the PV/TXP atomic hooks were updated in the previous commits, but
it makes sense to update the HVS ones too.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 4 +---
drivers/gpu/drm/vc4/vc4_drv.h
On 11/25/2020 12:27 AM, Bjorn Andersson wrote:
A combination of recent bug fixes by Doug Anderson and the proper
definition of iommu streams means that this hack is no longer needed.
Let's clean up the code by reverting '127068abe85b ("i2c: qcom-geni:
Disable DMA processing on the Lenovo Yoga C
Unlike the previous generations, the HSM clock limitation is way above
what we can reach without scrambling, so let's move the maximum
frequency we support to the maximum clock frequency without scrambling.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 6 --
1 file change
Use the devm_drm_dev_alloc provided by the drm framework to alloc
a struct hibmc_drm_private.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 16 ++--
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 2 +-
2 files changed, 7 insertions(+), 11 deletions
The PM reference count is not expected to be incremented on
return in cdn_dp_clk_enable.
However, pm_runtime_get_sync will increment the PM reference
count even failed. Forgetting to putting operation will result
in a reference leak here.
Replace it with pm_runtime_resume_and_get to keep usage
co
Hi,
Here's some patches to enable the HDR output in the RPi4/BCM2711 HDMI
controller.
Let me know what you think,
Maxime
Changes from v2:
- Rebased on current drm-misc-next
- Fixed a bug that was dropping the refresh rate when the bpc count
was increased
Changes from v1:
- Added the c
* Tomi Valkeinen [201201 10:39]:
> On 30/11/2020 11:53, Laurent Pinchart wrote:
> > Hi Tomi,
> >
> > Thank you for the patch.
> >
> > On Tue, Nov 24, 2020 at 02:45:15PM +0200, Tomi Valkeinen wrote:
> >> Add address-cells & size-cells to DSI nodes so that board files do not
> >> need to define th
在 2020/12/1 20:17, Thomas Zimmermann 写道:
Hi
Am 01.12.20 um 12:55 schrieb Tian Tao:
Assign local variable to struct drm_device *dev because they are
used multiple times within a function.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 2 +-
drivers/gpu/drm
This patch enables a QHD HDMI monitor to work at native resolution.
Tested on a Sapphire board with RK3399 connected to a Q27q-10 monitor at
2560x1440@60
Messages like
dwhdmi-rockchip ff94.hdmi: PHY configuration failed (clock 148501000)
and like
dwhdmi-rockchip ff94.hdmi: PHY configurati
On 12/1/20 2:05 PM, Ionela Voinescu wrote:
Hi,
On Thursday 22 Oct 2020 at 12:17:31 (+0100), Lukasz Luba wrote:
[..]
+/**
+ * devfreq_cooling_em_register_power() - Register devfreq cooling device with
+ * power information and attempt to register Energy Model (EM)
It took me a
* Tomi Valkeinen [201124 12:48]:
> From: Sebastian Reichel
>
> The DSI command mode panel is no longer specific
> to OMAP and thus the config option has been renamed
> slightly.
>
> Signed-off-by: Sebastian Reichel
> Signed-off-by: Tomi Valkeinen
> Cc: Tony Lindgren
> Reviewed-by: Laurent Pi
Plymovent M2M is a control interface produced for the Plymovent filter
systems.
Co-Developed-by: David Jander
Signed-off-by: David Jander
Signed-off-by: Oleksij Rempel
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6dl-plym2m.dts | 446
2 fil
Hi,
On Thursday 22 Oct 2020 at 12:17:31 (+0100), Lukasz Luba wrote:
[..]
> > > +/**
> > > + * devfreq_cooling_em_register_power() - Register devfreq cooling device
> > > with
> > > + * power information and attempt to register Energy Model
> > > (EM)
> >
> > It took me a while to
Add Plymovent Group BV BAS iMX6dl based board
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml
b/Documentation/devicetree/bindings/arm/fsl.ya
Add new api devm_drm_irq_install() to register interrupts,
no need to call drm_irq_uninstall() when the drm module is removed.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/drm_irq.c | 35 +++
include/drm/drm_irq.h | 2 +-
2 files changed, 36 insertions(+), 1 d
Hi Thomas,
On Fri, Nov 20, 2020 at 02:19:45PM +0100, Thomas Zimmermann wrote:
> Am 13.11.20 um 16:29 schrieb Maxime Ripard:
> > If we're having two subsequent, non-blocking, commits on two different
> > CRTCs that share no resources, there's no guarantee on the order of
> > execution of both commi
在 2020/12/1 20:36, Thomas Zimmermann 写道:
Hi
Am 01.12.20 um 13:26 schrieb tiantao (H):
在 2020/12/1 20:17, Thomas Zimmermann 写道:
Hi
Am 01.12.20 um 12:55 schrieb Tian Tao:
Assign local variable to struct drm_device *dev because they are
used multiple times within a function.
Signed-off-by:
Hi,
Sorry for the delay and for the noise on this older version. I first
want to understand the code better.
On Thursday 22 Oct 2020 at 11:55:28 (+0100), Lukasz Luba wrote:
[..]
>
> >
> > > +{
> > > + /* Make some space if needed */
> > > + if (status->busy_time > 0x) {
> > > + stat
On Tuesday 01 Dec 2020 at 14:37:58 (+), Lukasz Luba wrote:
>
>
> On 12/1/20 2:05 PM, Ionela Voinescu wrote:
> > Hi,
> >
> > On Thursday 22 Oct 2020 at 12:17:31 (+0100), Lukasz Luba wrote:
> > [..]
> >
> > > > > +/**
> > > > > + * devfreq_cooling_em_register_power() - Register devfreq coolin
pm_runtime_get_sync will increment the PM reference count
even failed. Forgetting to putting operation will result
in a reference leak here.
Replace it with pm_runtime_resume_and_get to keep usage
counter balanced.
BTW, pm_runtime_resume_and_get is introduced in v5.10-rc5 as
dd8088d5a896 ("PM:
This display is already supported by the panel-simple driver, so add it
to the bindings documentation.
This patch is needed to fix checkpatch warnings for the PLYM2M dts.
Signed-off-by: Oleksij Rempel
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2
changes v5:
- rebase against latest shawngup/for-next
- add patch to fix checkpatch warning on PLYM2M dts
changes v4:
- add PLYBAS board
- PLYM2M: add touchscreen node
- PLYM2M: add rename led nodes to led-x
changes v3:
- use old style copyright text
changes v2:
- fsl.yaml: reorder ply,plym2m
-
On 12/1/20 10:36 AM, Ionela Voinescu wrote:
Hi,
Sorry for the delay and for the noise on this older version. I first
want to understand the code better.
On Thursday 22 Oct 2020 at 11:55:28 (+0100), Lukasz Luba wrote:
[..]
+{
+ /* Make some space if needed */
+ if (status->bu
Instead of always dumping the rendered picture, check whether it matches
the expectations. This makes more sense for automated testing.
Retain the ability to dump the picture instead of checking it when a
file name is given as an argument. This also removes use of a hardcoded
file name in a world
The PHY initialisation parameters are not based on the pixel clock but
the TMDS clock rate which can be the pixel clock in the standard case,
but could be adjusted based on some parameters like the bits per color.
Since the TMDS clock rate is stored in our custom connector state
already, let's reu
在 2020/12/2 10:06, tiantao (H) 写道:
在 2020/12/1 21:44, Thomas Zimmermann 写道:
Hi
Am 01.12.20 um 14:05 schrieb tiantao (H):
在 2020/12/1 20:36, Thomas Zimmermann 写道:
Hi
Am 01.12.20 um 13:26 schrieb tiantao (H):
在 2020/12/1 20:17, Thomas Zimmermann 写道:
Hi
Am 01.12.20 um 12:55 schrieb T
The PM reference count is not expected to be incremented on
return in functions rk3288_lvds_poweron and px30_lvds_poweron.
However, pm_runtime_get_sync will increment the PM reference
count even failed. Forgetting to putting operation will result
in a reference leak here.
Replace it with pm_runti
Add "ply" entry for Plymovent Group BV: https://www.plymovent.com/
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b/Docum
Add interconnect support to mxsfb so that it is able to request enough
bandwidth to DDR for display output to work.
Signed-off-by: Martin Kepplinger
---
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 33 +++
drivers/gpu/drm/mxsfb/mxsfb_drv.h | 2 ++
drivers/gpu/drm/mxsfb/mxsfb_
Run the test on a core capable of 2D rendering instead of hardcoding to
core zero.
Signed-off-by: Lubomir Rintel
---
tests/etnaviv/etnaviv_2d_test.c | 31 ---
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/tests/etnaviv/etnaviv_2d_test.c b/tests/etnavi
Just so that it's obvious what failed and why.
Signed-off-by: Lubomir Rintel
---
tests/etnaviv/etnaviv_2d_test.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/tests/etnaviv/etnaviv_2d_test.c b/tests/etnaviv/etnaviv_2d_test.c
index 8dd77b66..eb9dfa59 100644
Use devm_drm_irq_install to register interrupts so that
drm_irq_uninstall is not called when hibmc is removed.
Signed-off-by: Tian Tao
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drive
We'll need to access the connector state in our encoder setup, so let's
just pass the whole DRM state to our private encoder hooks.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 18 ++
drivers/gpu/drm/vc4/vc4_drv.h | 10 +-
drivers/gpu/drm/vc4/vc4_hdm
01.12.2020 16:57, Mark Brown пишет:
> On Thu, 5 Nov 2020 02:43:57 +0300, Dmitry Osipenko wrote:
>> Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs, which reduces
>> power consumption and heating of the Tegra chips. Tegra SoC has multiple
>> hardware units which belong to a core power doma
在 2020/12/1 18:35, Thomas Zimmermann 写道:
Using struct drm_device.pdev is deprecated. Convert hibmc to struct
drm_device.dev. No functional changes.
Signed-off-by: Thomas Zimmermann
Acked-by: Sam Ravnborg
Cc: Xinliang Liu
Cc: Tian Tao
Cc: John Stultz
Cc: Xinwei Kong
Cc: Chen Feng
---
Hi,
Static analysis on linux-next with Coverity had detected a minor issue
in the following commit:
commit 2a74e8682a39d00e04ca278459ae7d7ecbdfb394
Author: Sam Ravnborg
Date: Sat Nov 28 23:40:55 2020 +0100
video: fbdev: sis: Fix set but not used warnings in init.c
The analysis is as fol
On Mon, Nov 30, 2020 at 05:53:39PM +, Xiong, Jianxin wrote:
> > From: Jason Gunthorpe
> > Sent: Monday, November 30, 2020 8:08 AM
> > To: Xiong, Jianxin
> > Cc: linux-r...@vger.kernel.org; dri-devel@lists.freedesktop.org; Doug
> > Ledford ; Leon Romanovsky
> > ; Sumit Semwal ; Christian Koen
Hi Rob,
Rob Herring 于2020年12月1日周二 上午4:31写道：
> On Mon, Nov 30, 2020 at 7:29 AM Kevin Tang wrote:
> >
> > From: Kevin Tang
> >
> > Adds MIPI DSI Master and MIPI DSI-PHY (D-PHY)
> > support for Unisoc's display subsystem.
> >
> > Cc: Orson Zhai
> > Cc: Chunyan Zhang
> > Signed-off-by: Kevin Tan
The BCM2711 supports higher bpc count than just 8, so let's support it in
our driver.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 71 -
drivers/gpu/drm/vc4/vc4_hdmi.h | 1 +
drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 9
3 files change
The PM reference count is not expected to be incremented on
return in these tegra functions.
However, pm_runtime_get_sync will increment the PM reference
count even failed. Forgetting to putting operation will result
in a reference leak here.
Replace it with pm_runtime_resume_and_get to keep usag
The pixel rate is for now quite simple to compute, but with more features
(30 and 36 bits output, YUV output, etc.) will depend on a bunch of
connectors properties.
Let's store the rate we have to run the pixel clock at in our custom
connector state, and compute it in atomic_check.
Signed-off-by:
Hi,
patches chained to this message contains changes I've found useful when
testing whether 2d rendering works well with the etnaviv driver on my
platform. Perhaps they're useful enough for merging upstream.
Thanks
Lubo
___
dri-devel mailing list
dri-
On Tue, Dec 01, 2020 at 12:56:12PM +0100, Sam Ravnborg wrote:
> Hi Oleksij
>
> On Tue, Dec 01, 2020 at 10:27:37AM +0100, Oleksij Rempel wrote:
> > This display is already supported by the panel-simple driver, so add it
> > to the bindings documentation.
> >
> > This patch is needed to fix checkpa
The PM reference count is not expected to be incremented on
return in functions v3d_get_param_ioctl and v3d_job_init.
However, pm_runtime_get_sync will increment the PM reference
count even failed. Forgetting to putting operation will result
in a reference leak here.
Replace it with pm_runtime_re
When run with a higher bpc than 8, the clock of the HDMI controller needs
to be adjusted. Let's create a connector state that will be used at
atomic_check and atomic_enable to compute and store the clock rate
associated to the state.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.
The PM reference count is not expected to be incremented on
return in functions vop_enable and vop_enable.
However, pm_runtime_get_sync will increment the PM reference
count even failed. Forgetting to putting operation will result
in a reference leak here.
Replace it with pm_runtime_resume_and_ge
On Tuesday 01 Dec 2020 at 12:19:18 (+), Lukasz Luba wrote:
>
>
> On 12/1/20 10:36 AM, Ionela Voinescu wrote:
> > Hi,
> >
> > Sorry for the delay and for the noise on this older version. I first
> > want to understand the code better.
> >
> > On Thursday 22 Oct 2020 at 11:55:28 (+0100), Luka
01.12.2020 17:34, Mark Brown пишет:
> On Tue, Dec 01, 2020 at 05:17:20PM +0300, Dmitry Osipenko wrote:
>> 01.12.2020 16:57, Mark Brown пишет:
>
>>> [1/1] regulator: Allow skipping disabled regulators in
>>> regulator_check_consumers()
>>> (no commit info)
>
>> Could you please hold on this
patch #1 is code refactorings to use devm_drm_irq_install.
patch #2 add the new api to install irq, patch #3 is hibmc driver uses
the newly added api to register interrupts.
Changes since v1:
Splits the original patch #1 into two patches,rewrite
to_hibmc_drm_private() function in patch #2.Fix the
在 2020/12/1 21:44, Thomas Zimmermann 写道:
Hi
Am 01.12.20 um 14:05 schrieb tiantao (H):
在 2020/12/1 20:36, Thomas Zimmermann 写道:
Hi
Am 01.12.20 um 13:26 schrieb tiantao (H):
在 2020/12/1 20:17, Thomas Zimmermann 写道:
Hi
Am 01.12.20 um 12:55 schrieb Tian Tao:
Assign local variable to str
After applying this patch over next-20201201:
https://lore.kernel.org/linux-doc/cover.1606823973.git.mchehab+hua...@kernel.org/T/#m0072adc6eb1af595a31fcc3b019cb81ab28c7b9f
There are a couple of new warnings that the kernel-doc prototype
doesn't match the documented function.
This series addr
The function name at kernel-doc markup doesn't match the name
of the function:
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:1534: warning: expecting
prototype for amdgpu_debugfs_print_bo_info(). Prototype was for
amdgpu_bo_print_info() instead
Fix it.
Signed-off-by: Mauro Carvalho Chehab
On Wed, 2 Dec 2020 08:55:52 +0100
Thomas Zimmermann wrote:
> Hi
>
> Am 01.12.20 um 12:20 schrieb Mikulas Patocka:
> >
> >
> > On Tue, 1 Dec 2020, Thomas Zimmermann wrote:
> >
...
> >> And why can links not run as DRM master mode? If it renders to the
> >> terminal,
> >> it should act lik
https://bugzilla.kernel.org/show_bug.cgi?id=201539
--- Comment #64 from fawz (f...@negentropy.io) ---
Of course, that makes sense! Should've realized that there must be
correspondig logic for non-vega12/20 hardware.
If this patch works, are you going to submit it or should I? Afterall,
you foun
Am 02.12.20 um 08:59 schrieb Thomas Zimmermann:
Hi
Am 01.12.20 um 11:40 schrieb Christian König:
Reviewed-by: Christian König on patch #1
and #15.
Acked-by: Christian König on patch #2 and
#16.
Could you add these patches to the AMD tree?
Alex is usually the one who picks such stuff up
Am 02.12.20 um 09:27 schrieb Mauro Carvalho Chehab:
The function name at kernel-doc markup doesn't match the name
of the function:
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:1534: warning: expecting
prototype for amdgpu_debugfs_print_bo_info(). Prototype was for
amdgpu_bo_print_info()
Can you add a Signed-off-by line to your commit message? This means
you agree to the Developer Certificate of Origin [1].
[1]: https://developercertificate.org/
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mail
Hi
Am 02.12.20 um 09:43 schrieb Christian König:
Am 02.12.20 um 08:59 schrieb Thomas Zimmermann:
Hi
Am 01.12.20 um 11:40 schrieb Christian König:
Reviewed-by: Christian König on patch #1
and #15.
Acked-by: Christian König on patch #2 and
#16.
Could you add these patches to the AMD tree
Hi
Am 02.12.20 um 09:47 schrieb Tian Tao:
Add new api devm_drm_irq_install() to register interrupts,
no need to call drm_irq_uninstall() when the drm module is removed.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/drm_irq.c | 35 +++
include/drm/drm_irq.h
Am 02.12.20 um 09:47 schrieb Tian Tao:
Use the devm_drm_dev_alloc provided by the drm framework to alloc
a structure hibmc_drm_private.
Signed-off-by: Tian Tao
This looks good now. Thanks for sticking to it.
Acked-by: Thomas Zimmermann
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.
https://bugzilla.kernel.org/show_bug.cgi?id=201539
--- Comment #65 from fawz (f...@negentropy.io) ---
Unfortunately, your patch leads to a stuck boot. There's some minor
"corruption" visible on the bottom of the screen while still booting up,
and then it gets stuck.
I don't think I mentioned th
Am 02.12.20 um 10:26 schrieb Tian Tao:
Add new api devm_drm_irq_install() to register interrupts,
no need to call drm_irq_uninstall() when the drm module is removed.
Signed-off-by: Tian Tao
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_irq.c | 32 ++
On Mon, Nov 30, 2020 at 06:16:21PM -0800, Gurchetan Singh wrote:
> virtio_gpu typically uses the prefix virtio_gpu, but there are
> a few places where the virtio prefix is used. Modify this for
> consistency.
>
> v3: add r-b tags
>
> Signed-off-by: Gurchetan Singh
> Reviewed-by: Anthoine Bourge
On 2020-12-01 11:01 a.m., James Park wrote:
This will allow Mesa to port code to Windows more easily.
As discussed in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6162#note_712779
, including drm.h makes no sense when building for Windows.
--
Earthling Michel Dänzer
On Wed, 02 Dec 2020 13:14:06 +0100,
Michael Ellerman wrote:
>
> Uwe Kleine-König writes:
> > Hello Michael,
> >
> > On Sat, Nov 28, 2020 at 09:48:30AM +0100, Takashi Iwai wrote:
> >> On Thu, 26 Nov 2020 17:59:50 +0100,
> >> Uwe Kleine-König wrote:
> >> >
> >> > The driver core ignores the return
Hi Peiyong,
On Mon, Nov 30, 2020 at 02:33:59PM -0800, Peiyong Lin wrote:
> On Tue, Nov 17, 2020 at 1:31 PM Peiyong Lin wrote:
> >
> > On Thu, Oct 22, 2020 at 10:34 AM Peiyong Lin wrote:
> > >
> > > Historically there is no common trace event for GPU frequency, in
> > > downstream Android each di
On Wed, Dec 2, 2020 at 12:52 PM Tomi Valkeinen wrote:
>
> On 30/11/2020 16:10, Daniel Vetter wrote:
>
> > The thing is, the legacy helpers should be able to pull off what userspace
> > needs to do when it's using atomic anyway. Hard-coding information in the
> > kernel means we have a gap here. He
On Wed, Dec 2, 2020 at 12:43 PM Michel Dänzer wrote:
>
> On 2020-12-01 11:01 a.m., James Park wrote:
> > This will allow Mesa to port code to Windows more easily.
>
> As discussed in
> https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6162#note_712779
> , including drm.h makes no sense whe
On Wed, Dec 2, 2020 at 3:53 AM Thomas Zimmermann wrote:
>
> Hi
>
> Am 02.12.20 um 09:43 schrieb Christian König:
> > Am 02.12.20 um 08:59 schrieb Thomas Zimmermann:
> >> Hi
> >>
> >> Am 01.12.20 um 11:40 schrieb Christian König:
> >>> Reviewed-by: Christian König on patch #1
> >>> and #15.
> >>>
Hi Uma,
Thanks for the comments and spotting the errors. I agree to most of the
comments and will address them in the next version.
Please find my responses inline:
On 11/26/2020 1:58 AM, Shankar, Uma wrote:
-Original Message-
From: Nautiyal, Ankit K
Sent: Sunday, November 1, 2020
Thanks Uma for the comments.
Please find my responses inline:
On 11/26/2020 2:15 AM, Shankar, Uma wrote:
-Original Message-
From: Nautiyal, Ankit K
Sent: Sunday, November 1, 2020 3:37 PM
To: intel-...@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org; Shankar, Uma ;
Kulkarni,
Hi
Am 02.12.20 um 09:01 schrieb Thomas Zimmermann:
Hi
Am 30.11.20 um 21:59 schrieb Zack Rusin:
On Nov 24, 2020, at 06:38, Thomas Zimmermann
wrote:
Using struct drm_device.pdev is deprecated. Convert vmwgfx to struct
drm_device.dev. No functional changes.
Signed-off-by: Thomas Zimmermann
Hi
Am 02.12.20 um 15:02 schrieb Alex Deucher:
On Wed, Dec 2, 2020 at 3:53 AM Thomas Zimmermann wrote:
Hi
Am 02.12.20 um 09:43 schrieb Christian König:
Am 02.12.20 um 08:59 schrieb Thomas Zimmermann:
Hi
Am 01.12.20 um 11:40 schrieb Christian König:
Reviewed-by: Christian König on patch #
This patch series attempts to add support for a DP-HDMI2.1 Protocol
Convertor. The VESA spec for the HDMI2.1 PCON are proposed in Errata
E5 to DisplayPort_v2.0:
https://vesa.org/join-vesamemberships/member-downloads/?action=stamp&fileid=42299
The details are mentioned in DP to HDMI2.1 PCON Enum/Con
From: Swati Sharma
The HDMI2.1 extends HFVSDB (HDMI Forum Vendor Specific
Data block) to have fields related to newly defined methods of FRL
(Fixed Rate Link) levels, number of lanes supported, DSC Color bit
depth, VRR min/max, FVA (Fast Vactive), ALLM etc.
This patch adds the new HFVSDB fields
This patch parses HFVSDB fields for DSC1.2 capabilities of an
HDMI2.1 sink. These fields are required by a source to understand the
DSC capability of the sink, to set appropriate PPS parameters,
before transmitting compressed data stream.
v2: Addressed following issues as suggested by Uma Shankar:
From: Swati Sharma
This patch parses MAX_FRL field to get the MAX rate in Gbps that
the HDMI 2.1 panel can support in FRL mode. Source need this
field to determine the optimal rate between the source and sink
during FRL training.
v2: Fixed minor bugs, and removed extra wrapper function (Uma Shan
This patch adds support for configuring a PCON device,
connected as a DP branched device to enable FRL Link training
with a HDMI2.1 + sink.
v2: Fixed typos and addressed other review comments from Uma Shankar.
-changed the commit message for better clarity (Uma Shankar)
-removed unnecessary argume
From: Swati Sharma
There are specific DPCDs defined for detecting link failures between
the PCON and HDMI sink and check the link status. In case of link
failure, PCON will communicate the same using an IRQ_HPD to source.
HDMI sink would have indicated the same to PCON using SCDC interrupt
mechan
This patch adds registers for getting DSC encoder capability for
a HDMI2.1 PCon. It also addes helper functions to configure
DSC between the PCON and HDMI2.1 sink.
v2: Corrected offset for DSC encoder bpc and minor changes.
Also added helper functions for getting pcon dsc encoder capabilities
as s
HDMI2.1 PCON advertises Max FRL bandwidth supported by the PCON and
by the sink.
This patch captures these in dfp cap structure in intel_dp and uses
these to prune connector modes that cannot be supported by the PCON
and sink FRL bandwidth.
v2: Addressed review comments from Uma Shankar:
-tweaked
This patch adds functions to start FRL training for an HDMI2.1 sink,
connected via a PCON as a DP branch device.
This patch also adds a new structure for storing frl training related
data, when FRL training is completed.
v2: As suggested by Uma Shankar:
-renamed couple of variables for better clar
From: Swati Sharma
In this patch enables support for detecting link failures between
PCON and HDMI sink in i915 driver. HDMI link loss indication to
upstream DP source is indicated via IRQ_HPD. This is followed by
reading of HDMI link configuration status (HDMI_TX_LINK_ACTIVE_STATUS).
If the PCON
The DP-HDMI2.1 PCON spec provides way for a source to set PPS
parameters: slice height, slice width and bits_per_pixel, based on
the HDMI2.1 sink capabilities. The DSC encoder of the PCON will
respect these parameters, while preparing the 128 byte PPS.
This patch adds helper functions to calculate
This patch calls functions to check FRL training requirements
for an HDMI2.1 sink, when connected through PCON.
The call is made before the DP link training. In case FRL is not
required or failure during FRL training, the TMDS mode is selected
for the pcon.
v2: moved check_frl_training() just afte
This patch adds support to read and store the DSC capabilities of the
HDMI2.1 PCon encoder. It also adds a new field to store these caps,
The caps are read during dfp update and can later be used to get the
PPS parameters for PCON-HDMI2.1 sink pair. Which inturn will be used
to take a call to overr
When a source supporting DSC1.1 is connected to DSC1.2 HDMI2.1 sink
via DP HDMI2.1 PCON, the PCON can be configured to decode the
DSC1.1 compressed stream and encode to DSC1.2. It then sends the
DSC1.2 compressed stream to the HDMI2.1 sink.
This patch configures the PCON for DSC1.1 to DSC1.2 encod
On 11/30/2020 10:32 PM, Jordan Crouse wrote:
On Fri, Nov 27, 2020 at 06:19:44PM +0530, Akhil P Oommen wrote:
So far a530v2 gpu has support for detecting its supported opps
based on a fuse value called speed-bin. This patch makes this
support generic across gpu families. This is in preparation to
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