> -Original Message-
> From: Nautiyal, Ankit K
> Sent: Sunday, November 1, 2020 3:37 PM
> To: intel-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Shankar, Uma ;
> Kulkarni, Vandita ; ville.syrj...@linux.intel.com;
> Sharma, Swati2
> Subject: [PATCH v2 06/13] drm/dp_h
Am 05.11.20 um 14:56 schrieb Maxime Ripard:
The code that assigns HVS channels during atomic_check is starting to grow
a bit big, let's move it into a separate function.
Reviewed-by: Hoegeun Kwon
Tested-by: Hoegeun Kwon
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_kms.c | 18 +
Am 18.11.20 um 17:20 schrieb Andrey Grodzovsky:
On 11/18/20 7:01 AM, Christian König wrote:
Am 18.11.20 um 08:39 schrieb Daniel Vetter:
On Tue, Nov 17, 2020 at 9:07 PM Andrey Grodzovsky
wrote:
On 11/17/20 2:49 PM, Daniel Vetter wrote:
On Tue, Nov 17, 2020 at 02:18:49PM -0500, Andrey Grodzo
Hi,
A few suggestions below. But I'm not a native speaker.
Am 05.11.20 um 14:56 schrieb Maxime Ripard:
We've had a number of muxing corner-cases with specific ways to reproduce
them, so let's document them to make sure they aren't lost and introduce
regressions later on.
Reviewed-by: Hoegeun K
Am 05.11.20 um 14:56 schrieb Maxime Ripard:
Even though it was pointed in the review by Daniel, and I thought to have
fixed it while applying the patches, but it turns out I forgot to commit
the fixes in the process. Properly fix it this time.
Fixes: dcda7c28bff2 ("drm/vc4: kms: Add functions
Am 05.11.20 um 14:56 schrieb Maxime Ripard:
The NUM_CHANNELS define has a pretty generic name and was right before the
function using it. Let's move to something that makes the hardware-specific
nature more obvious, and to a more appropriate place.
Reviewed-by: Hoegeun Kwon
Tested-by: Hoegeun
Convert MIPI DSI PHY binding to YAML schema mediatek,dsi-phy.yaml
Cc: Chun-Kuang Hu
Signed-off-by: Chunfeng Yun
---
v3: new patch
---
.../display/mediatek/mediatek,dsi.txt | 18 +---
.../bindings/phy/mediatek,dsi-phy.yaml| 83 +++
2 files changed, 84 insertions(+
Convert phy-mtk-tphy.txt to YAML schema mediatek,tphy.yaml
Signed-off-by: Chunfeng Yun
---
v3:
1. fix dt_binding_check error in example after add mtu3.yaml
Changes suggested by Rob:
2. fix wrong indentation
3. remove '|' due to no formatting to preserve
4. add a space after '#'
5. dro
On 18.11.20 0:02, Dmitry Osipenko wrote:
17.11.2020 23:24, Georgi Djakov пишет:
Hi Dmitry,
Thank you working on this!
On 15.11.20 23:29, Dmitry Osipenko wrote:
Now Internal and External memory controllers are memory interconnection
providers. This allows us to use interconnect API for tuning
Modify atomic_get_input_bus_format function to return input formats
supported instead of using hardcoded value.
Signed-off-by: Yuti Amonkar
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 45 ++-
1 file changed, 35 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/
Convert phy-mtk-xsphy.txt to YAML schema mediatek,xsphy.yaml
Signed-off-by: Chunfeng Yun
---
v3:
1. remove type for property with standard unit suffix suggested by Rob
2. remove '|' for descritpion
3. fix yamllint warning
v2:
1. modify description and compatible definition suggested by R
Convert mediatek,mtu3.txt to YAML schema mediatek,mtu3.yaml
Signed-off-by: Chunfeng Yun
---
v3:
1. fix yamllint warning
2. remove pinctrl* properties
3. remove unnecessary '|'
4. drop unused labels in example
v2: new patch
---
.../devicetree/bindings/usb/mediatek,mtu3.txt | 108
The Energy Model (EM) framework supports devices such as Devfreq. Create
new registration functions which automatically register EM for the thermal
devfreq_cooling devices. This patch prepares the code for coming changes
which are going to replace old power model with the new EM.
Signed-off-by: Lu
As we are using bus negotiations for selecting bus format
remove the setting of bus format using the connector info
structure.
Signed-off-by: Yuti Amonkar
---
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/caden
Hi Arnd, Olof,
Here's the PR for the MBUS rework we discussed in the last couple of
weeks, for what will become 5.11.
As Arnd suggested, this is based on a PR sent to drm-misc-fixes to merge
the initial fix for a probe error in drm/sun4i due to
dma_direct_set_offset.
Thanks!
Maxime
The followin
First fix some legacy things in clk-rk3188.c that was never updated,
because probably nobody used rk3066a I2S before in the mainline kernel.
Update the rk3066a HDMI documents with a #sound-dai-cells property.
Include the code for sound in the HDMI driver.
Add a simple-sound-card compatible node to
From: Linus Torvalds
> Sent: 18 November 2020 18:11
>
> On Wed, Nov 18, 2020 at 4:12 AM David Laight wrote:
> >
> > I've got the 'splat' below during boot.
> > This is an 8-core C2758 Atom cpu using the on-board/cpu graphics.
> > User space is Ubuntu 20.04.
> >
> > Additionally the X display has
Xilinx AI engine array can be partitioned statically for different
applications. In the device tree, there will be device node for the AI
engine device, and device nodes for the statically configured AI engine
partitions. Each of the statically configured partition has a partition
ID in the system.
Get the pixel format and bpc based on the output bus format
negotiated instead of hardcoding the values.
Signed-off-by: Yuti Amonkar
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 82 +++
1 file changed, 64 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/bridge/
On 18-11-20, 08:53, Rob Clark wrote:
> On Tue, Nov 17, 2020 at 9:28 PM Viresh Kumar wrote:
> >
> > On 17-11-20, 09:02, Rob Clark wrote:
> > > With that on top of the previous patch,
> >
> > Don't you still have this ? Which fixed the lockdep in the remove path.
> >
> > https://lore.kernel.org/lkml
Add hdmi-sound node to rk3066a.dtsi, so that it
can be reused by boards with HDMI support.
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3066a.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 67
Convert mediatek,musb.txt to YAML schema mediatek,musb.yaml
Cc: Min Guo
Signed-off-by: Chunfeng Yun
Reviewed-by: Rob Herring
---
v3: add Reviewed-by Rob
v2: new patch
---
.../devicetree/bindings/usb/mediatek,musb.txt | 57 -
.../bindings/usb/mediatek,musb.yaml | 113
Due to usb-device.txt is converted into usb-device.yaml,
so modify reference file names at the same time.
Signed-off-by: Chunfeng Yun
---
v2~v3: no changes
---
Documentation/devicetree/bindings/net/btusb.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/device
Add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks,
so that the parent COMPOSITE_FRACMUX and COMPOSITE_NOMUX
also update.
Signed-off-by: Johan Jonker
---
drivers/clk/rockchip/clk-rk3188.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --gi
This change also fix checkpatch.pl warning:
WARNING: Prefer using '"%s...", __func__' to using
'via_driver_irq_postinstall', this function's name, in a string
+ DRM_DEBUG("via_driver_irq_postinstall\n");
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/via/via_irq.c | 2 +-
1 file changed,
From: Nishad Saraf
AI engine errors events can be routed to generate interrupt. The
errors events routing will be done during AI engine configuration.
At runtime, Linux kernel AI engine driver monitors the interrupt and
backtracks errors events.
As error events from 400 AIE tiles and 50 shim tile
'#sound-dai-cells' is required to properly interpret
the list of DAI specified in the 'sound-dai' property,
so add them to the 'hdmi' node for 'rk3066a.dtsi'.
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3066a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/rk30
Hi,
Here's a fix shared with the DMA work for sun4i that will be merged
through arm-soc.
This conflicts with the subsequent work done for sun4i and
dma_direct_set_offset, so it would be better to merge that fix through a
PR in drm-misc-fixes.
Maxime
The following changes since commit 3650b228f8
AI engine is the acceleration engine provided by Xilinx. These engines
provide high compute density for vector-based algorithms, and flexible
custom compute and data movement. It has core tiles for compute and
shim tiles to interface the FPGA fabric.
You can check the AI engine architecture docume
The Rockchip PX2/RK3066 uses these bits in CRU_CLKGATE7_CON:
hclk_i2s_8ch_gate_en bit 4 (dtsi: i2s0)
hclk_i2s0_2ch_gate_en bit 2 (dtsi: i2s1)
hclk_i2s1_2ch_gate_en bit 3 (dtsi: i2s2)
The Rockchip PX3/RK3188 uses this bit in CRU_CLKGATE7_CON:
hclk_i2s_2ch_gate_en bit 2 (dtsi: i2s0)
The bits go
Add request/release and related clock gating functions to AI engine
driver:
* scanning when the partition is being requested to know which tiles
are in use.
* check if a tile is gated or not
* tiles requesting and releasing ioctl so that user application can
enable/disable tiles at runtime.
Si
Convert phy-mtk-ufs.txt to YAML schema mediatek,ufs-phy.yaml
Cc: Stanley Chu
Signed-off-by: Chunfeng Yun
Reviewed-by: Rob Herring
---
v3: add Reviewed-by Rob
v2: fix binding check warning of reg in example
---
.../bindings/phy/mediatek,ufs-phy.yaml| 64 +++
.../devicetr
Add operation to set SHIM DMA buffer descriptor.
The following operations are added to set the buffer descriptors:
* attach DMA buffer which enables AI engine device to access the DMA
buffer memory
* detach DMA buffer which disables AI engine device to access the DMA
buffer memory
* set DMA bu
Create AI engine device/partition hierarchical structure.
Each AI engine device can have multiple logical partitions(groups of AI
engine tiles). Each partition is column based and has its own node ID
in the system. AI engine device driver manages its partitions.
Applications can access AI engine
Devfreq cooling needs to now the correct status of the device in order
to operate. Do not rely on Devfreq last_status which might be a stale data
and get more up-to-date values of the load.
Devfreq framework can change the device status in the background. To
mitigate this situation make a copy of
Create AI engine device/partition hierarchical structure.
Each AI engine device can have multiple logical partitions(groups of AI
engine tiles). Each partition is column based and has its own node ID
in the system. AI engine device driver manages its partitions.
Applications can access AI engine
Add operation to set SHIM DMA buffer descriptor.
The following operations are added to set the buffer descriptors:
* attach DMA buffer which enables AI engine device to access the DMA
buffer memory
* detach DMA buffer which disables AI engine device to access the DMA
buffer memory
* set DMA bu
Prepare for deleting the static and dynamic power calculation and clean
the trace function. These two fields are going to be removed in the next
changes.
Reviewed-by: Steven Rostedt (VMware) # for tracing code
Signed-off-by: Lukasz Luba
---
drivers/thermal/devfreq_cooling.c | 3 +--
include/tr
Convert usb-device.txt to YAML schema usb-device.yaml
Signed-off-by: Chunfeng Yun
---
v3:
1. remove $nodenmae and items key word for compatilbe;
2. add additionalProperties;
The followings are suggested by Rob:
3. merge the following patch
[v2,1/4] dt-bindings: usb: convert usb-devic
Register devfreq cooling device and attempt to register Energy Model. This
will add the devfreq device to the Energy Model framework. It will create
a dedicated and unified data structures used i.e. in thermal framework.
The last NULL parameter indicates that the power model is simplified and
creat
This patch series add bus format negotiation support for Cadence MHDP8546
bridge driver.
The patch series has four patches in the below sequence:
1. drm: bridge: cdns-mhdp8546: Modify atomic_get_input_bus_format bridge
function.
Return all the input formats supported.
2. drm: bridge: cdns-mhd
Use min_t to replace min, min_t is a bit fast because min use
twice typeof.
This patch also fix check_patch.pl warning:
WARNING: min() should probably be min_t(unsigned long, num_pages,
VMW_PPN_PER_REMAP)
+unsigned long nr = min(num_pages, (unsigned long)
VMW_PPN_PER_REMAP);
Signed-off-by: Bernard
AI engine is the acceleration engine provided by Xilinx. These engines
provide high compute density for vector-based algorithms, and flexible
custom compute and data movement. It has core tiles for compute and
shim tiles to interface the FPGA fabric.
You can check the AI engine architecture docume
From: Nishad Saraf
Platform management services like device control, resets, power
management, etc. are provided by Platform, Loader and Manager(PLM)
through firmware driver APIs. For requesting some of these services,
this change reads AI Engine platform management node ID from DT node.
Some oth
Make some noise with mk808. Enable the hdmi_sound node and
add i2s0 as sound source for hdmi.
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3066a-mk808.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts
b/arch/arm/boot/dts/rk3066a-mk808.dts
There is no concern to have userspace to directly access AI engine
program and data memories. It will be much faster to directly copy
data to and from these memories from userspace.
We choose to use DMA buf for the data and program memory because of the
DMA buf features. DMA buf can share the DMA
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Now that the CRTCs have been converted, let's move forward with the
Remove old power model and use new Energy Model to calculate the power
budget. It drops static + dynamic power calculations and power table
in order to use Energy Model performance domain data. This model
should be easy to use and could find more users. It is also less
complicated to setup the need
Hi Laurent,
On Mon, Oct 12, 2020 at 02:00:30AM +0300, Laurent Pinchart wrote:
> > -static int drm_of_lvds_get_remote_pixels_type(
> > - const struct device_node *port_node)
> > +static int drm_of_lvds_get_remote_pixels_type(const struct device_node
> > *endpoint)
> > {
> > -
From: Nishad Saraf
AI engine errors events can be routed to generate interrupt. The
errors events routing will be done during AI engine configuration.
At runtime, Linux kernel AI engine driver monitors the interrupt and
backtracks errors events.
As error events from 400 AIE tiles and 50 shim tile
From: Izhar Ameer Shaikh
Latching of AIE NPI Interrupts is present in Versal ES1 Silicon Rev,
however it has been removed from ES2 rev.
As a result on ES1, in order to use the interrupt, a client needs to
request PMC to clear/ack the interrupt.
Provide an EEMI IOCTL to serve the same purpose. No
Use min_t to replace min, min_t is a bit fast because min use
twice typeof.
This patch also fix check_patch.pl warning:
WARNING: min() should probably be min_t(unsigned long, num_pages,
VMW_PPN_PER_REMAP)
+unsigned long nr = min(num_pages, (unsigned long)
VMW_PPN_PER_REMAP);
Signed-off-by: Bernard
From: Nishad Saraf
Platform management services like device control, resets, power
management, etc. are provided by Platform, Loader and Manager(PLM)
through firmware driver APIs. For requesting some of these services,
this change reads AI Engine platform management node ID from DT node.
Some oth
On 2020-11-12 10:27, Veera Sundaram Sankaran wrote:
Some drivers have hardware capability to get the precise timestamp of
certain events based on which the fences are triggered. This allows it
to set accurate timestamp factoring out any software and IRQ latencies.
Move the timestamp parameter out
Xilinx AI engine array can be partitioned statically for different
applications. In the device tree, there will be device node for the AI
engine device, and device nodes for the statically configured AI engine
partitions. Each of the statically configured partition has a partition
ID in the system.
Due to the phy/usb bindings are converted into YAML schema and
also renamed, update entries.
Meanwhile add drivers/usb/host/mtk-xhci* files.
Signed-off-by: Chunfeng Yun
---
v3: no changes
v2: new patch
---
MAINTAINERS | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/MAINTA
Hi all,
This patch set is a continuation of my previous work, which aimed
to add Energy Model to all devices. This series is a follow up
for the patches which got merged to v5.9-rc1. It aims to change
the thermal devfreq cooling and use the Energy Model instead of
private power table and structure
From: Izhar Ameer Shaikh
Latching of AIE NPI Interrupts is present in Versal ES1 Silicon Rev,
however it has been removed from ES2 rev.
As a result on ES1, in order to use the interrupt, a client needs to
request PMC to clear/ack the interrupt.
Provide an EEMI IOCTL to serve the same purpose. No
On 2020/11/19 9:14, Dave Airlie wrote:
> From: Dave Airlie
>
> In 7053e0eab473119503f6565b4e398f9a73122481
> drm/vram-helper: stop using TTM placement flags
>
> it appears the flags got mixed up.
>
> This should fix a regression on ast
> [ 64.782340] WARNING: CPU: 51 PID: 1964 at
> drivers/g
'#sound-dai-cells' is required to properly interpret
the list of DAI specified in the 'sound-dai' property.
Add it to rockchip,rk3066-hdmi.yaml to document that the
rk3066 HDMI TX also can be used to transmit some audio.
Signed-off-by: Johan Jonker
---
.../devicetree/bindings/display/rockchip/ro
When AI engine partition is released, that is if no one is using the AI
engine partition, by default, it will cleanup the partition by doing the
following:
* reset the columns
* reset the SHIMs
* clear data and program memory
* gate all the tiles
If user doesn't want the partition is reset when th
From: Zheng Yang
Add sound support to the rk3066 HDMI driver.
The I2S input of the HDMI TX allows transmission of
DVD-Audio and decoded Dolby Digital
to A/V Receivers and high-end displays.
The interface supports 2 to 8 channels audio up to 192 kHz.
The HDMI TX supports variable word length of
1
Some usb type-c dongle use irq_hpd request to perform device connection
and disconnection. This patch add handling of both connection and
disconnection are based on the state of hpd_state and sink_count.
Changes in V2:
-- add dp_display_handle_port_ststus_changed()
-- fix kernel test robot complai
Add request/release and related clock gating functions to AI engine
driver:
* scanning when the partition is being requested to know which tiles
are in use.
* check if a tile is gated or not
* tiles requesting and releasing ioctl so that user application can
enable/disable tiles at runtime.
Si
Convert HDMI PHY binding to YAML schema mediatek,hdmi-phy.yaml
Cc: Chun-Kuang Hu
Signed-off-by: Chunfeng Yun
Reviewed-by: Rob Herring
---
v3: add Reviewed-by Rob
v2: fix binding check warning of reg in example
---
.../display/mediatek/mediatek,hdmi.txt| 18 +---
.../bindings/phy/mediat
On 2020-11-13 12:45, Daniel Vetter wrote:
On Thu, Nov 12, 2020 at 10:27:23AM -0800, Veera Sundaram Sankaran
wrote:
The explicit out-fences in crtc are signaled as part of vblank event,
indicating all framebuffers present on the Atomic Commit request are
scanned out on the screen. Though the fenc
On Sun, Nov 01, 2020 at 06:39:22PM +0200, Laurent Pinchart wrote:
> Hi Lubomir,
>
> Thank you for the patch.
Thanks for the message. Some responses inline below.
> On Fri, Oct 30, 2020 at 04:07:59AM +0100, Lubomir Rintel wrote:
> > Himax HX8837 is a secondary display controller used to drive the
There is no concern to have userspace to directly access AI engine
program and data memories. It will be much faster to directly copy
data to and from these memories from userspace.
We choose to use DMA buf for the data and program memory because of the
DMA buf features. DMA buf can share the DMA
On Sat, Nov 14, 2020 at 01:22:22PM +0100, Greg Kroah-Hartman wrote:
> Ah, here's a hint:
> https://wiki.archlinux.org/index.php/Linux_console#Fonts
>
> The setfont tool should help you out here.
setfont seems to work fine, I tried Georgian-Fixed16 (256 chars) and
Uni2-VGA16 (512 chars) unde
Convert mediatek,mtk-xhci.txt to YAML schema mediatek,mtk-xhci.yaml
Signed-off-by: Chunfeng Yun
---
v3:
1. fix yamllint warning
2. remove pinctrl* properties supported by default suggested by Rob
3. drop unused labels
4. modify description of mediatek,syscon-wakeup
5. remove type of imo
From: Thomas Zimmermann
> Sent: 18 November 2020 19:37
>
> Hi
>
> Am 18.11.20 um 19:10 schrieb Linus Torvalds:
> > On Wed, Nov 18, 2020 at 4:12 AM David Laight
> > wrote:
> >>
> >> I've got the 'splat' below during boot.
> >> This is an 8-core C2758 Atom cpu using the on-board/cpu graphics.
> >
Fix check_patch.pl warning:
ERROR: do not use assignment in if condition
+ if ((HALCYON_HEADER2 == (cmd = *buf)) &&
ERROR: do not use assignment in if condition
+ if (HALCYON_HEADER2 == (cmd = *buf))
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/via
On Wed, 2020-11-18 at 16:21 +0800, Chunfeng Yun wrote:
> Convert phy-mtk-ufs.txt to YAML schema mediatek,ufs-phy.yaml
>
> Cc: Stanley Chu
> Signed-off-by: Chunfeng Yun
> Reviewed-by: Rob Herring
Reviewed-by: Stanley Chu
___
dri-devel mailing list
d
When AI engine partition is released, that is if no one is using the AI
engine partition, by default, it will cleanup the partition by doing the
following:
* reset the columns
* reset the SHIMs
* clear data and program memory
* gate all the tiles
If user doesn't want the partition is reset when th
On Wed, Nov 18, 2020 at 9:29 AM Guido Günther wrote:
> This adds new panel type to the mantix driver as found on the Librem 5 and
> fixes a glitch in the init sequence (affecting both panels). The fix is at the
> start of the series to make backporting simpler.
> It also adds a patch to make st77
errors are still
present in next-20201119. Details for this regression:
https://kernelci.org/test/case/id/5fb6196bfd0127fd68d8d902/
The first error is:
[ 14.757489] Internal error: synchronous external abort: 96000210 [#1]
PREEMPT SMP
Full log:
https://storage.kernelci.org/next/master/nex
Hi
Am 05.11.20 um 14:56 schrieb Maxime Ripard:
If a CRTC is enabled but not active, and that we're then doing a page
flip on another CRTC, drm_atomic_get_crtc_state will bring the first
CRTC state into the global state, and will make us wait for its vblank
as well, even though that might never o
Hi
Am 05.11.20 um 14:56 schrieb Maxime Ripard:
The current HVS muxing code will consider the CRTCs in a given state to
setup their muxing in the HVS, and disable the other CRTCs muxes.
However, it's valid to only update a single CRTC with a state, and in this
situation we would mux out a CRTC t
Hi
Am 29.10.20 um 14:40 schrieb Maxime Ripard:
There's cross-talk on the RPi4 between the 2.4GHz channels used by the WiFi
chip and some resolutions, most notably 1440p at 60Hz.
In such a case, we can either reject entirely the mode, or lower slightly
the pixel frequency to remove the overlap.
On Wed, 18 Nov 2020 10:52:12 +
Simon Ser wrote:
> Document how to perform a forced probe, and when should user-space do it.
>
> Signed-off-by: Simon Ser
> Cc: Daniel Vetter
> Cc: Pekka Paalanen
> ---
> include/uapi/drm/drm_mode.h | 13 +
> 1 file changed, 13 insertions(+)
>
Ping, can I get an rb or at least Acked-by for this?
Thanks in advance,
Christian.
Am 17.11.20 um 16:53 schrieb Christian König:
When we have mixed DMA32 and non DMA32 device in one system
it could otherwise happen that the DMA32 device gets pages
it can't work with.
Signed-off-by: Christian K
I'd merge this into the patch that introduces the function.
Am 13.11.20 um 16:29 schrieb Maxime Ripard:
We're going to use those helpers in functions higher in that file, let's
move it around.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_kms.c | 26 +-
1
Maybe merge this into the commit that introduces the functionality.
Am 13.11.20 um 16:29 schrieb Maxime Ripard:
Some fields that we're going to add cannot be just copied over to the
new state, and thus kmemdup is a bit unnecessary. Let's move to kzalloc
instead, and clean it up in the process.
Hi,
This patch set introduces i.MX8qxp Display Processing Unit(DPU) DRM support.
DPU is comprised of a blit engine for 2D graphics, a display controller
and a command sequencer. Outside of DPU, optional prefetch engines can
fetch data from memory prior to some DPU fetchunits of blit engine and
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Signed-off-by: Liu Ying
---
.../bindings/display/imx/fsl,imx8qxp-dpu.yaml | 358 +
1 file changed, 358 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dpu.yaml
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Signed-off-by: Liu Ying
---
.../bindings/display/imx/fsl,imx8qxp-prg.yaml | 60 ++
1 file changed, 60 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-pr
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Signed-off-by: Liu Ying
---
.../bindings/display/imx/fsl,imx8qxp-dprc.yaml | 87 ++
1 file changed, 87 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-d
Artifically use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Signed-off-by: Liu Ying
---
include/drm/drm_atomic.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/drm/drm_atomic.h b/i
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Signed-off-by: Liu Ying
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 970d9ce..dee4586 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5834,6 +5834,15 @@ F: Documentat
This patch adds basic i.MX8qxp DC0 subsystem support, which includes
the irqsteer, LPCG clock controller, Display Processing Unit(DPU) and
it's prefetch engines - Prefetch Resolve Gaskets(PRG) and Display Prefetch
Resolve Channels(DPRC).
Note that the clocks are still referenced in the legacy way
This patch enables DPU and it's prefetch engines for
the i.MX8qxp MEK platform.
Signed-off-by: Liu Ying
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 64 +++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
b/arch/arm64/b
Am 13.11.20 um 16:29 schrieb Maxime Ripard:
When we can't allocate a new channel, we can simply return instead of
having to handle both cases, and that simplifies a bit the code.
Signed-off-by: Maxime Ripard
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/vc4/vc4_kms.c | 13 ++--
Hi
Am 13.11.20 um 16:29 schrieb Maxime Ripard:
Private objects storing a state shared across all CRTCs need to be
carefully handled to avoid a use-after-free issue.
The proper way to do this to track all the commits using that shared
state and wait for the previous commits to be done before goi
Am 16.11.20 um 21:42 schrieb Andrey Grodzovsky:
On 11/16/20 3:36 PM, Christian König wrote:
Am 16.11.20 um 20:00 schrieb Andrey Grodzovsky:
On 11/16/20 4:48 AM, Christian König wrote:
Am 15.11.20 um 07:34 schrieb Andrey Grodzovsky:
On 11/14/20 4:51 AM, Daniel Vetter wrote:
On Sat, Nov 14,
- Remove duplicate doc-comments for struct members
- Add missing @member markers for in-line member comments
Signed-off-by: Simon Ser
Cc: Daniel Vetter
---
include/uapi/drm/drm_mode.h | 66 ++---
1 file changed, 32 insertions(+), 34 deletions(-)
diff --git a/inc
> -Original Message-
> From: Nautiyal, Ankit K
> Sent: Sunday, November 1, 2020 3:37 PM
> To: intel-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Shankar, Uma ;
> Kulkarni, Vandita ; ville.syrj...@linux.intel.com;
> Sharma, Swati2
> Subject: [PATCH v2 07/13] drm/i915
bisection started with next-20201118 but the errors are still
present in next-20201119. Details for this regression:
https://kernelci.org/test/case/id/5fb6196bfd0127fd68d8d902/
The first error is:
[ 14.757489] Internal error: synchronous external abort: 96000210
[#1] PREEMPT SMP
Look
On Thu, Nov 19, 2020 at 05:21:51PM +0800, Christian König wrote:
> Ping, can I get an rb or at least Acked-by for this?
>
> Thanks in advance,
> Christian.
>
> Am 17.11.20 um 16:53 schrieb Christian König:
> > When we have mixed DMA32 and non DMA32 device in one system
> > it could otherwise happ
> -Original Message-
> From: Nautiyal, Ankit K
> Sent: Sunday, November 1, 2020 3:37 PM
> To: intel-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Shankar, Uma ;
> Kulkarni, Vandita ; ville.syrj...@linux.intel.com;
> Sharma, Swati2
> Subject: [PATCH v2 08/13] drm/i915
>> trialing new bisection features on kernelci.org, however this one
>> looks valid.
>>
>> The bisection started with next-20201118 but the errors are still
>> present in next-20201119. Details for this regression:
>>
>> https://kernelci.org/test/case/id/5fb6
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