Reviewed-by: Bas Nieuwenhuizen
On Mon, Oct 26, 2020 at 2:17 PM Simon Ser wrote:
>
> DRM_FORMAT_MOD_NONE is in the list of vendors, which is pretty
> confusing. We already have DRM_FORMAT_MOD_VENDOR_NONE. Move it down in
> the list of format modifiers.
>
> DRM_FORMAT_MOD_NONE is an alias for DRM_
On Mon, 26 Oct 2020 13:17:02 +
Simon Ser wrote:
> DRM_FORMAT_MOD_NONE is in the list of vendors, which is pretty
> confusing. We already have DRM_FORMAT_MOD_VENDOR_NONE. Move it down in
> the list of format modifiers.
>
> DRM_FORMAT_MOD_NONE is an alias for DRM_FORMAT_MOD_LINEAR, however the
log() is affected by FP control word and can provide inaccurate result.
Fixes Killer Instinct under Wine not being able to find AMD vulkan
device.
Signed-off-by: Paul Gofman
---
With the rounding mode the application sets (unsigned int)log2(4) is 1.
The log2_int() implemetation is copied
[AMD Public Use]
-Original Message-
From: Christian König
Sent: Sunday, October 25, 2020 9:11 PM
To: Chauhan, Madhav ; dri-devel@lists.freedesktop.org
Cc: Huang, Ray
Subject: [PATCH 01/13] drm/ttm: nuke ttm_tt_set_(un)populated again
Neither page allocation backend nor the driver shoul
On Mon, Oct 19, 2020 at 06:44:28PM +0530, Akhil P Oommen wrote:
> Add cooling device support to gpu. A cooling device is bound to a
> thermal zone to allow thermal mitigation.
>
> Signed-off-by: Akhil P Oommen
> ---
> Documentation/devicetree/bindings/display/msm/gpu.txt | 7 +++
> 1 file ch
On Thu, 22 Oct 2020 10:34:44 +
Simon Ser wrote:
> User-space should avoid parsing EDIDs for metadata already exposed via
> other KMS interfaces and properties. For instance, user-space should not
> try to extract a list of modes from the EDID: the kernel might mutate
> the mode list (because
Am 26.10.20 um 14:36 schrieb Chauhan, Madhav:
[AMD Public Use]
-Original Message-
From: Christian König
Sent: Sunday, October 25, 2020 9:11 PM
To: Chauhan, Madhav ; dri-devel@lists.freedesktop.org
Cc: Huang, Ray
Subject: [PATCH 01/13] drm/ttm: nuke ttm_tt_set_(un)populated again
Neith
On Sun, Oct 25, 2020 at 11:40:47PM +0800, Christian König wrote:
> This replaces the spaghetti code in the two existing page pools.
>
> First of all depending on the allocation size it is between 3 (1GiB) and
> 5 (1MiB) times faster than the old implementation.
>
> It makes better use of
On Mon, Oct 26, 2020 at 01:16:43AM +0300, Dmitry Osipenko wrote:
> Hello,
>
> This series brings initial support for memory interconnect to Tegra20,
> Tegra30 and Tegra124 SoCs.
>
> For the starter only display controllers and devfreq devices are getting
> interconnect API support, others could b
On Mon, Oct 26, 2020 at 2:17 PM Simon Ser wrote:
>
> DRM_FORMAT_MOD_NONE is in the list of vendors, which is pretty
> confusing. We already have DRM_FORMAT_MOD_VENDOR_NONE. Move it down in
> the list of format modifiers.
>
> DRM_FORMAT_MOD_NONE is an alias for DRM_FORMAT_MOD_LINEAR, however the
>
On Mon, Oct 26, 2020 at 5:48 AM Robin Murphy wrote:
>
> DRM_MSM fails to build with DRM_MSM_DP=n; add the missing stub.
>
> Signed-off-by: Robin Murphy
Thanks..
Reviewed-by: Rob Clark
and looks like,
Fixes: 8ede2ecc3e5e ("drm/msm/dp: Add DP compliance tests on
Snapdragon Chipsets")
> ---
>
In our last attempt to fix races in the panfrost_job_timedout() path we
overlooked the case where a re-submitted job immediately triggers a
fault. This lead to a situation where we try to stop a scheduler that's
not resumed yet and lose the 'timedout' event without restarting the
timeout, thus bloc
On 26/10/2020 15:32, Boris Brezillon wrote:
In our last attempt to fix races in the panfrost_job_timedout() path we
overlooked the case where a re-submitted job immediately triggers a
fault. This lead to a situation where we try to stop a scheduler that's
not resumed yet and lose the 'timedout' e
Applied. Thanks!
Alex
On Mon, Oct 26, 2020 at 11:31 AM Zhang Qilong wrote:
>
> The 'break' is unnecessary because of previous
> 'return', discard it.
>
> Signed-off-by: Zhang Qilong
> ---
> drivers/gpu/drm/amd/amdgpu/atombios_encoders.c | 6 --
> drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
On Mon, Oct 26, 2020 at 05:24:02PM +0530, Sai Prakash Ranjan wrote:
> From: Sharat Masetty
>
> The register read-modify-write construct is generic enough
> that it can be used by other subsystems as needed, create
> a more generic rmw() function and have the gpu_rmw() use
> this new function.
>
On Mon, Oct 26, 2020 at 05:24:03PM +0530, Sai Prakash Ranjan wrote:
> From: Sharat Masetty
>
> The last level system cache can be partitioned to 32 different
> slices of which GPU has two slices preallocated. One slice is
> used for caching GPU buffers and the other slice is used for
> caching th
On Mon, 26 Oct 2020 16:16:49 +
Steven Price wrote:
> On 26/10/2020 15:32, Boris Brezillon wrote:
> > In our last attempt to fix races in the panfrost_job_timedout() path we
> > overlooked the case where a re-submitted job immediately triggers a
> > fault. This lead to a situation where we try
It should be able to handle all cases now.
Signed-off-by: Christian König
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 30 ++-
drivers/gpu/drm/nouveau/nouveau_drv.h | 1 -
2 files changed, 2 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
Not needed as far as I can see.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_gem_vram_helper.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c
b/drivers/gpu/drm/drm_gem_vram_helper.c
index 683762b2f9a8..16d68c04ea5d 100644
--- a/drivers/gpu/drm
It should be able to handle all cases here.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 39 +
1 file changed, 14 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.
Not needed as far as I can see.
Signed-off-by: Christian König
---
drivers/gpu/drm/qxl/qxl_ttm.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c
index d8ecfb8b3193..a80d59634143 100644
--- a/drivers/gpu/drm/qxl/qxl_ttm.c
+++ b/driv
It should be able to handle all cases now.
Signed-off-by: Christian König
---
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c| 4 ---
drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 36 ++
2 files changed, 3 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx
Provide the necessary parameters by all drivers and use the new pool alloc
when no driver specific function is provided.
v2: fix the GEM VRAM helpers
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++--
drivers/gpu/drm/drm_gem_vram_helper.c | 4 ++--
drivers/
This replaces the spaghetti code in the two existing page pools.
First of all depending on the allocation size it is between 3 (1GiB) and
5 (1MiB) times faster than the old implementation.
It makes better use of buddy pages to allow for larger physical contiguous
allocations which should result i
Not used any more.
Signed-off-by: Christian König
---
drivers/gpu/drm/Kconfig |7 -
drivers/gpu/drm/ttm/Makefile |3 +-
drivers/gpu/drm/ttm/ttm_agp_backend.c|1 -
drivers/gpu/drm/ttm/ttm_bo.c |1 -
drivers/gpu/drm/ttm/ttm_memory.c
It should be able to handle all cases here.
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/radeon_ttm.c | 47 +
1 file changed, 14 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c
b/drivers/gpu/drm/radeon/radeon_ttm.c
index
On Sat, Oct 24, 2020 at 08:48:07AM +0100, Christoph Hellwig wrote:
> On Fri, Oct 23, 2020 at 03:20:05PM -0300, Jason Gunthorpe wrote:
> > The problem is we have RDMA drivers that assume SGL's have a valid
> > struct page, and these hacky/wrong P2P sgls that DMABUF creates cannot
> > be passed into
Add a quirk IO_PGTABLE_QUIRK_SYS_CACHE to override the
attributes set in TCR for the page table walker when
using system cache.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/io-pgtable-arm.c | 7 ++-
include/linux/io-pgtable.h | 4
2 files changed, 10 insertions(+), 1 deletion
From: Sharat Masetty
The last level system cache can be partitioned to 32 different
slices of which GPU has two slices preallocated. One slice is
used for caching GPU buffers and the other slice is used for
caching the GPU SMMU pagetables. This talks to the core system
cache driver to acquire the
Use table and of_match_node() to match qcom implementation
instead of multiple of_device_compatible() calls for each
QCOM SMMU implementation.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 9 +
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 21
The 'break' is unnecessary because of previous
'return', discard it.
Signed-off-by: Zhang Qilong
---
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c | 6 --
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 4
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 7 ---
3 files changed, 17
From: Sharat Masetty
The register read-modify-write construct is generic enough
that it can be used by other subsystems as needed, create
a more generic rmw() function and have the gpu_rmw() use
this new function.
Signed-off-by: Sharat Masetty
Reviewed-by: Jordan Crouse
Signed-off-by: Sai Prak
Fix the checkpatch warning for space required before the open
parenthesis.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
b/drivers/iommu/arm/arm-smmu
On Wed, Oct 21, 2020 at 07:16:52PM +0200, Jernej Škrabec wrote:
> Hi!
>
> Dne četrtek, 15. oktober 2020 ob 11:36:42 CEST je Maxime Ripard napisal(a):
> > The A33 has a different phase parameter in the Allwinner BSP on the
> > channel1 than the one currently applied. Fix this.
> >
> > Signed-off-b
Some hardware variants contain a system cache or the last level
cache(llc). This cache is typically a large block which is shared
by multiple clients on the SOC. GPU uses the system cache to cache
both the GPU data buffers(like textures) as well the SMMU pagetables.
This helps with improved render
On Mon, Oct 26, 2020 at 12:49:05PM +0300, Dan Carpenter wrote:
> Originally this error path used to leak "bin" but then we accidentally
> applied two separate commits to fix it and ended up with a double free.
>
> Signed-off-by: Dan Carpenter
> ---
> Resending a year later because it was confusin
Thanks, adding stable.
Saeed
> On Oct 22, 2020, at 12:34 AM, Thomas Zimmermann wrote:
>
> Hi
>
> On 22.10.20 01:57, saeed.mirzamohamm...@oracle.com wrote:
>> From: Saeed Mirzamohammadi
>>
>> This patch fixes the issue due to:
>>
>> [ 89.572883] divide_error: [#1] SMP KASAN PTI
>> [
Add iommu domain attribute for using system cache aka last level
cache by client drivers like GPU to set right attributes for caching
the hardware pagetables into the system cache.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/arm/arm-smmu/arm-smmu.c | 17 +
drivers/iommu/a
I don't see them on the mailing list. Are you sure they went out?
Alex
On Sat, Oct 24, 2020 at 1:47 PM Sandeep wrote:
>
> Hello,
>
> I've resent the patches in the correct format. Please review.
>
> - Sandeep
>
> On Fri, 9 Oct 2020 at 13:14, Sandeep Raghuraman wrote:
> >
> > This patch adds a
This is an extension to the series [1] to enable the System Cache (LLC) for
Adreno a6xx targets.
GPU targets with an MMU-500 attached have a slightly different process for
enabling system cache. Use the compatible string on the IOMMU phandle
to see if an MMU-500 is attached and modify the programm
[AMD Public Use]
-Original Message-
From: Christian König
Sent: Monday, October 26, 2020 7:14 PM
To: Chauhan, Madhav ; dri-devel@lists.freedesktop.org
Cc: Huang, Ray
Subject: Re: [PATCH 01/13] drm/ttm: nuke ttm_tt_set_(un)populated again
Am 26.10.20 um 14:36 schrieb Chauhan, Madhav:
>
Yes, looks good to me as well. Series is:
Acked-by: Alex Deucher
I'll give the display guys a few more days to look this over, but if
there are no objections, I'll apply them.
Thanks!
Alex
On Fri, Oct 23, 2020 at 7:16 PM Luben Tuikov wrote:
>
> On 2020-10-23 03:46, Takashi Iwai wrote:
> > Hi,
From: Arnd Bergmann
The open-coded list_for_each_entry() causes a harmless warning:
drivers/video/fbdev/matrox/matroxfb_base.c: In function
'matroxfb_register_driver':
include/linux/kernel.h:856:3: warning: array subscript -98 is outside array
bounds of 'struct list_head[1]' [-Warray-bounds]
From: Arnd Bergmann
The -Wmissing-field-initializer warning when building with W=2
turns into an error because tilcdc is built with -Werror:
drm/tilcdc/tilcdc_drv.c:431:33: error: missing field 'data' initializer
[-Werror,-Wmissing-field-initializers] { "regs", tilcdc_regs_show, 0 },
drm/tilcdc
From: Arnd Bergmann
clang warns about functions returning a 'const int' result:
drivers/gpu/drm/imx/imx-tve.c:487:8: warning: type qualifiers ignored on
function return type [-Wignored-qualifiers]
Remove the extraneous 'const' qualifier here. I would guess that the
function was intended to be
From: Arnd Bergmann
gcc -Wextra notices that one of the fields in psbfb_roll_ops has two
initializers:
drivers/gpu/drm/gma500/framebuffer.c:185:20: warning: initialized field
overwritten [-Woverride-init]
Open-code this instead, leaving out the extraneous initializers for
.fb_pan_display.
Fix
From: Arnd Bergmann
There is one harmless duplicate initialization that causes a warning
with 'make W=1':
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c:122:19: warning: initialized
field overwritten [-Woverride-init]
122 | .max_linewidth = 4096,
| ^~~~
drivers/gpu/dr
Reviewed-by: Nicholas Kazlauskas
Looks fine to me. Feel free to apply.
Regards,
Nicholas Kazlauskas
On 2020-10-26 3:34 p.m., Alex Deucher wrote:
Yes, looks good to me as well. Series is:
Acked-by: Alex Deucher
I'll give the display guys a few more days to look this over, but if
there are no
Applied. Thanks!
Alex
On Mon, Oct 26, 2020 at 2:14 PM Sumera Priyadarsini
wrote:
>
> Bool initialisation should use 'true' and 'false' values instead of 0
> and 1.
>
> Modify amdgpu_amdkfd_gpuvm.c to initialise variable is_imported
> to false instead of 0.
>
> Issue found with Coccinelle.
>
> S
Applied. Thanks!
Alex
On Mon, Oct 26, 2020 at 4:22 PM Kazlauskas, Nicholas
wrote:
>
> Reviewed-by: Nicholas Kazlauskas
>
> Looks fine to me. Feel free to apply.
>
> Regards,
> Nicholas Kazlauskas
>
> On 2020-10-26 3:34 p.m., Alex Deucher wrote:
> > Yes, looks good to me as well. Series is:
>
On 2020-10-26 12:41, Arnd Bergmann wrote:
From: Arnd Bergmann
There is one harmless duplicate initialization that causes a warning
with 'make W=1':
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c:122:19: warning:
initialized field overwritten [-Woverride-init]
122 | .max_linewidth = 4096,
From: Arnd Bergmann
core_link_write_dpcd() returns enum dc_status, not ddc_result:
display/dc/core/dc_link_dp.c: In function 'dp_set_panel_mode':
display/dc/core/dc_link_dp.c:4237:11: warning: implicit conversion from 'enum
dc_status' to 'enum ddc_result'
[-Wenum-conversion]
Avoid the warning
From: Arnd Bergmann
A conversion from 'bool' to 'enum odm_combine_mode' was incomplete,
and gcc warns about this with many instances of
display/dc/dml/dcn20/display_mode_vba_20.c:3899:44: warning: implicit
conversion from 'enum ' to 'enum
odm_combine_mode' [-Wenum-conversion]
3899 | locals
From: Arnd Bergmann
gcc -Wextra warns about a function taking an enum argument
being called with a bool:
drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c: In function
'apply_degamma_for_user_regamma':
drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c:1617:29:
w
From: Arnd Bergmann
Building with 'make W=1' produces countless warnings like
amdgpu/../include/vega10_ip_offset.h:276:51: warning: initialized field
overwritten [-Woverride-init]
Shut these up by disabling the particular warning in the
amdgpu driver.
Signed-off-by: Arnd Bergmann
---
driver
From: Arnd Bergmann
gcc -Wextra warns about an incorrect prototype causing multiple
mismatched enums:
display/dc/gpio/gpio_service.c: In function 'dal_gpio_service_create':
display/dc/gpio/gpio_service.c:70:50: warning: implicit conversion from 'enum
dce_environment' to 'enum dce_version' [-Wen
tree: git://people.freedesktop.org/~agd5f/linux.git drm-next
head: 86568bafbfb37491e688201eccdc60660e8a6fdf
commit: 19ae333001b375bbc7d1ff9eaa9cbb0a72fff65e [447/497] drm/amdgpu: added
support for psp fw attestation
config: alpha-allyesconfig (attached as .config)
compiler: alpha-linux-gcc (GC
Hi Daniel,
On Mon, Oct 26, 2020 at 11:58:12AM +0100, Daniel Vetter wrote:
> The media model assumes that buffers are all preallocated, so that
> when a media pipeline is running we never miss a deadline because the
> buffers aren't allocated or available.
>
> This means we cannot fix the v4l foll
With the integration of chip-id detection scheme in kernel[1], there
is no specific need to maintain multitudes of SoC specific config
options, discussed as per [2], we have deprecated the usage in other
places for v5.10-rc1. Fix the missing user so that we can clean up the
configs in v5.11.
[1] d
On Mon, Oct 26, 2020 at 11:58:09AM +0100, Daniel Vetter wrote:
> It's the only user. This also garbage collects the CONFIG_FRAME_VECTOR
> symbol from all over the tree (well just one place, somehow omap media
> driver still had this in its Kconfig, despite not using it).
>
> Reviewed-by: John Hubb
Hi Daniel,
On Mon, Oct 26, 2020 at 11:58:08AM +0100, Daniel Vetter wrote:
> This is used by media/videbuf2 for persistent dma mappings, not just
> for a single dma operation and then freed again, so needs
> FOLL_LONGTERM.
>
> Unfortunately current pup_locked doesn't support FOLL_LONGTERM due to
>
tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head: 3458ef3969082647e64825452b8bfd06ee7c3351
commit: f439de91652a689740663abdcb72f7f015f7 [228/272] drm/amdgpu: added
support for psp fw attestation
config: x86_64-randconfig-a004-20201026 (attached as .config
From: Thomas Zimmermann
[ Upstream commit d50ace1e72f05708cc5dbc89b9bbb9873f150092 ]
Putting the DRM driver to the top of the file and the PCI code to the
bottom makes ast_drv.c more readable. While at it, the patch prefixes
file-scope variables with ast_.
Signed-off-by: Thomas Zimmermann
Acke
From: Sidong Yang
[ Upstream commit 05ca530268a9d0ab3547e7b288635e35990a77c4 ]
This patch avoid the warning in vkms_get_vblank_timestamp when vblanks
aren't enabled. When running igt test kms_cursor_crc just after vkms
module, the warning raised like below. Initial value of vblank time is
zero a
From: Guchun Chen
[ Upstream commit bf0b91b78f002faa1be1902a75eeb0797f9fbcf3 ]
RAS flags needs to be cleaned as well when user requires
one clean eeprom.
v2: RAS flags shall be restored after eeprom reset succeeds.
Signed-off-by: Guchun Chen
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deu
From: Antonio Borneo
[ Upstream commit c6d94e37bdbb6dfe7e581e937a915ab58399b8a5 ]
Current code enables the HS clock when video mode is started or to
send out a HS command, and disables the HS clock to send out a LP
command. This is not what DSI spec specify.
Enable HS clock either in command an
From: Luben Tuikov
[ Upstream commit e2d732fdb7a9e421720a644580cd6a9400f97f60 ]
Remove DRM_SCHED_PRIORITY_LOW, as it was used
in only one place.
Rename and separate by a line
DRM_SCHED_PRIORITY_MAX to DRM_SCHED_PRIORITY_COUNT
as it represents a (total) count of said
priorities and it is used as
From: Marek Szyprowski
[ Upstream commit c3d9c17f486d5c54940487dc31a54ebfdeeb371a ]
The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function
returns the number of the created entries in the DMA address space.
However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and
From: Nadezda Lutovinova
[ Upstream commit f688a345f0d7a6df4dd2aeca8e4f3c05e123a0ee ]
If ge_b850v3_lvds_init() does not allocate memory for ge_b850v3_lvds_ptr,
then a null pointer dereference is accessed.
The patch adds checking of the return value of ge_b850v3_lvds_init().
Found by Linux Driv
From: Enric Balletbo i Serra
[ Upstream commit c5589b39549d1875bb506da473bf4580c959db8c ]
In an eDP application, HPD is not required and on most bridge chips
useless. If HPD is not used, we need to set initial status as connected,
otherwise the connector created by the drm_bridge_connector API r
From: Marek Szyprowski
[ Upstream commit 84404614167b829f7b58189cd24b6c0c74897171 ]
The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function
returns the number of the created entries in the DMA address space.
However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and
From: Luben Tuikov
[ Upstream commit 5aea5327ea2ddf544cbeff096f45fc2319b0714e ]
Not being able to create amdgpu sysfs attributes
is not a fatal error warranting not to continue
to try to bring up the display. Thus, if we get
an error trying to create amdgpu sysfs attrs,
report it and continue on
From: Tom Rix
[ Upstream commit 8e1ba47c60bcd325fdd097cd76054639155e5d2e ]
clang static analysis reports this repesentative error
pvr2fb.c:1049:2: warning: 1st function call argument
is an uninitialized value [core.CallAndMessage]
if (*cable_arg)
^~~
Problem is th
From: Rodrigo Siqueira
[ Upstream commit 4b4f21ff7f5d11bb77e169b306dcbc5b216f5db5 ]
During the load processes for Renoir, our display code needs to retrieve
the SMU clock and voltage table, however, this operation can fail which
means that we have to check this scenario. Currently, we are not
ha
From: Fangzhi Zuo
[ Upstream commit 95d620adb48f7728e67d82f56f756e8d451cf8d2 ]
[Why]
Currently mode validation is bypassed if remote sink exists. That
leads to mode set issue when a BW bottle neck exists in the link path,
e.g., a DP-to-HDMI converter that only supports HDMI 1.4.
Any invalid mod
From: Marek Szyprowski
[ Upstream commit 34a4e66faf8b22c8409cbd46839ba5e488b1e6a9 ]
The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function
returns the number of the created entries in the DMA address space.
However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and
From: Rodrigo Siqueira
[ Upstream commit 2f8be0e516803cc3fd87c1671247896571a5a8fb ]
[Why]
Sometimes CRTCs can be disabled due to display unplugging or temporarily
transition in the userspace; in these circumstances, DCE tries to set
the minimum clock threshold. When we have this situation, the f
From: Luben Tuikov
[ Upstream commit e2d732fdb7a9e421720a644580cd6a9400f97f60 ]
Remove DRM_SCHED_PRIORITY_LOW, as it was used
in only one place.
Rename and separate by a line
DRM_SCHED_PRIORITY_MAX to DRM_SCHED_PRIORITY_COUNT
as it represents a (total) count of said
priorities and it is used as
From: Guchun Chen
[ Upstream commit bf0b91b78f002faa1be1902a75eeb0797f9fbcf3 ]
RAS flags needs to be cleaned as well when user requires
one clean eeprom.
v2: RAS flags shall be restored after eeprom reset succeeds.
Signed-off-by: Guchun Chen
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deu
From: Tom Rix
[ Upstream commit 8e1ba47c60bcd325fdd097cd76054639155e5d2e ]
clang static analysis reports this repesentative error
pvr2fb.c:1049:2: warning: 1st function call argument
is an uninitialized value [core.CallAndMessage]
if (*cable_arg)
^~~
Problem is th
From: Marek Szyprowski
[ Upstream commit 84404614167b829f7b58189cd24b6c0c74897171 ]
The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function
returns the number of the created entries in the DMA address space.
However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and
From: Enric Balletbo i Serra
[ Upstream commit c5589b39549d1875bb506da473bf4580c959db8c ]
In an eDP application, HPD is not required and on most bridge chips
useless. If HPD is not used, we need to set initial status as connected,
otherwise the connector created by the drm_bridge_connector API r
From: Sidong Yang
[ Upstream commit 05ca530268a9d0ab3547e7b288635e35990a77c4 ]
This patch avoid the warning in vkms_get_vblank_timestamp when vblanks
aren't enabled. When running igt test kms_cursor_crc just after vkms
module, the warning raised like below. Initial value of vblank time is
zero a
From: Antonio Borneo
[ Upstream commit c6d94e37bdbb6dfe7e581e937a915ab58399b8a5 ]
Current code enables the HS clock when video mode is started or to
send out a HS command, and disables the HS clock to send out a LP
command. This is not what DSI spec specify.
Enable HS clock either in command an
From: Luben Tuikov
[ Upstream commit 5aea5327ea2ddf544cbeff096f45fc2319b0714e ]
Not being able to create amdgpu sysfs attributes
is not a fatal error warranting not to continue
to try to bring up the display. Thus, if we get
an error trying to create amdgpu sysfs attrs,
report it and continue on
From: Nadezda Lutovinova
[ Upstream commit f688a345f0d7a6df4dd2aeca8e4f3c05e123a0ee ]
If ge_b850v3_lvds_init() does not allocate memory for ge_b850v3_lvds_ptr,
then a null pointer dereference is accessed.
The patch adds checking of the return value of ge_b850v3_lvds_init().
Found by Linux Driv
From: Marek Szyprowski
[ Upstream commit c3d9c17f486d5c54940487dc31a54ebfdeeb371a ]
The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function
returns the number of the created entries in the DMA address space.
However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and
From: Marek Szyprowski
[ Upstream commit 34a4e66faf8b22c8409cbd46839ba5e488b1e6a9 ]
The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function
returns the number of the created entries in the DMA address space.
However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and
From: Rodrigo Siqueira
[ Upstream commit 4b4f21ff7f5d11bb77e169b306dcbc5b216f5db5 ]
During the load processes for Renoir, our display code needs to retrieve
the SMU clock and voltage table, however, this operation can fail which
means that we have to check this scenario. Currently, we are not
ha
From: Fangzhi Zuo
[ Upstream commit 95d620adb48f7728e67d82f56f756e8d451cf8d2 ]
[Why]
Currently mode validation is bypassed if remote sink exists. That
leads to mode set issue when a BW bottle neck exists in the link path,
e.g., a DP-to-HDMI converter that only supports HDMI 1.4.
Any invalid mod
From: Rodrigo Siqueira
[ Upstream commit 2f8be0e516803cc3fd87c1671247896571a5a8fb ]
[Why]
Sometimes CRTCs can be disabled due to display unplugging or temporarily
transition in the userspace; in these circumstances, DCE tries to set
the minimum clock threshold. When we have this situation, the f
From: Antonio Borneo
[ Upstream commit c6d94e37bdbb6dfe7e581e937a915ab58399b8a5 ]
Current code enables the HS clock when video mode is started or to
send out a HS command, and disables the HS clock to send out a LP
command. This is not what DSI spec specify.
Enable HS clock either in command an
From: Tom Rix
[ Upstream commit 8e1ba47c60bcd325fdd097cd76054639155e5d2e ]
clang static analysis reports this repesentative error
pvr2fb.c:1049:2: warning: 1st function call argument
is an uninitialized value [core.CallAndMessage]
if (*cable_arg)
^~~
Problem is th
From: Nadezda Lutovinova
[ Upstream commit f688a345f0d7a6df4dd2aeca8e4f3c05e123a0ee ]
If ge_b850v3_lvds_init() does not allocate memory for ge_b850v3_lvds_ptr,
then a null pointer dereference is accessed.
The patch adds checking of the return value of ge_b850v3_lvds_init().
Found by Linux Driv
From: Fangzhi Zuo
[ Upstream commit 95d620adb48f7728e67d82f56f756e8d451cf8d2 ]
[Why]
Currently mode validation is bypassed if remote sink exists. That
leads to mode set issue when a BW bottle neck exists in the link path,
e.g., a DP-to-HDMI converter that only supports HDMI 1.4.
Any invalid mod
From: Tom Rix
[ Upstream commit 8e1ba47c60bcd325fdd097cd76054639155e5d2e ]
clang static analysis reports this repesentative error
pvr2fb.c:1049:2: warning: 1st function call argument
is an uninitialized value [core.CallAndMessage]
if (*cable_arg)
^~~
Problem is th
From: Antonio Borneo
[ Upstream commit c6d94e37bdbb6dfe7e581e937a915ab58399b8a5 ]
Current code enables the HS clock when video mode is started or to
send out a HS command, and disables the HS clock to send out a LP
command. This is not what DSI spec specify.
Enable HS clock either in command an
From: Nadezda Lutovinova
[ Upstream commit f688a345f0d7a6df4dd2aeca8e4f3c05e123a0ee ]
If ge_b850v3_lvds_init() does not allocate memory for ge_b850v3_lvds_ptr,
then a null pointer dereference is accessed.
The patch adds checking of the return value of ge_b850v3_lvds_init().
Found by Linux Driv
From: Fangzhi Zuo
[ Upstream commit 95d620adb48f7728e67d82f56f756e8d451cf8d2 ]
[Why]
Currently mode validation is bypassed if remote sink exists. That
leads to mode set issue when a BW bottle neck exists in the link path,
e.g., a DP-to-HDMI converter that only supports HDMI 1.4.
Any invalid mod
From: Nadezda Lutovinova
[ Upstream commit f688a345f0d7a6df4dd2aeca8e4f3c05e123a0ee ]
If ge_b850v3_lvds_init() does not allocate memory for ge_b850v3_lvds_ptr,
then a null pointer dereference is accessed.
The patch adds checking of the return value of ge_b850v3_lvds_init().
Found by Linux Driv
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