Keep track of the heap device struct.
This will be useful for special DMA allocations
and actions.
Cc: Sumit Semwal
Cc: Andrew F. Davis
Cc: Benjamin Gaignard
Cc: Liam Mark
Cc: Laura Abbott
Cc: Brian Starkey
Cc: Hridya Valsaraju
Cc: Robin Murphy
Cc: Ezequiel Garcia
Cc: Simon Ser
Cc: Jame
This adds a heap that allocates non-contiguous buffers that are
marked as writecombined, so they are not cached by the CPU.
This is useful, as most graphics buffers are usually not touched
by the CPU or only written into once by the CPU. So when mapping
the buffer over and over between devices, we
I'll defer to Ville & Lyude.
I dug up more on the bug report and found that both Thinkpad and
Galaxy Chromebook use the same Samsung OLED.
So my 2 vs 1 argument is actually not valid.
On Fri, Sep 18, 2020 at 10:59 AM Kevin Chowski wrote:
>
> Apologies once again, some of my emails were bouncing
On Fri, 2020-08-21 at 15:41 +0200, Stefan Agner wrote:
> Hi Matthias,
>
> On 2020-08-20 12:58, Matthias Schiffer wrote:
> > The PIXCLK needs to be enabled in SCFG before accessing the DCU on LS1021A,
> > or the access will hang.
>
> Hm, this seems a rather ad-hoc access to SCFG from the DCU. We d
Am Freitag, 18. September 2020, 13:46:53 CEST schrieb Yannick Fertre:
> The current driver calls drm_bridge_add(), to add the dsi bridge
> to the global bridge list, in dw_mipi_dsi_host_attach().
> Thus, it relies on the probing of panel or bridge sub-nodes to
> trigger the execution of dsi host at
The HVS has three FIFOs that can be assigned to a number of PixelValves
through a mux.
However, changing that FIFO requires that we disable and then enable the
pixelvalve, so we want to assign FIFOs to all the enabled CRTCs, and not
just the active ones.
Fixes: 87ebcd42fb7b ("drm/vc4: crtc: Assig
Hi Daniel, Dave,
Here's this week drm-misc-next PR
Maxime
drm-misc-next-2020-09-18:
drm-misc-next for 5.10:
UAPI Changes:
Cross-subsystem Changes:
- virtio: Merged a PR for patches that will affect drm/virtio
Core Changes:
- atomic: Split out drm_atomic_helper_calc_timestamping_constants
Update kernel-doc line comments to fix warnings reported by make W=1.
drivers/gpu/drm/ttm/ttm_memory.c:271: warning: Function parameter or
member 'glob' not described in 'ttm_shrink'
drivers/gpu/drm/ttm/ttm_memory.c:271: warning: Function parameter or
member 'from_wq' not described in 'ttm_shrink'
The ANX7625 is an ultra-low power 4K Mobile HD Transmitter designed
for portable device. It converts MIPI DSI/DPI to DisplayPort 1.3 4K.
Signed-off-by: Xin Ji
Reported-by: kernel test robot
Reported-by: Dan Carpenter
---
drivers/gpu/drm/bridge/analogix/Kconfig |9 +
drivers/gpu/drm/bridg
Hi Tomi,
> -Original Message-
> From: Tomi Valkeinen
> Sent: Wednesday, September 16, 2020 5:48 PM
> To: Swapnil Kashinath Jakhade ; airl...@linux.ie;
> dan...@ffwll.ch; laurent.pinch...@ideasonboard.com; robh...@kernel.org;
> a.ha...@samsung.com; narmstr...@baylibre.com; jo...@kwiboo.se;
Apologies once again, some of my emails were bouncing for some
addresses yesterday. Hopefully it was a temporary condition; I'll
continue trying to dig into it on my end if it happens again for this
email.
Since there's evidence that some models want lsb and some (well, at
least one) want msb, my
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/gma500/mmu.c: In function psb_mmu_insert_pfn_sequence:
drivers/gpu/drm/gma500/mmu.c:660:6: warning: variable ‘ret’ set but not used
[-Wunused-but-set-variable]
drivers/gpu/drm/gma500/oaktrail_lvds_i2c.c: In function get_clock:
driver
Hi all,
The following series add support for the Slimport ANX7625 transmitter, a
ultra-low power Full-HD 4K MIPI to DP transmitter designed for portable device.
This is the v17 version, any mistakes, please let me know, I will fix it in
the next series.
Change history:
v17: Fix comments from Da
The HVS FIFOs are currently assigned each time we have an atomic_check
for all the enabled CRTCs.
However, if we are running multiple outputs in parallel and we happen to
disable the first (by index) CRTC, we end up changing the assigned FIFO
of the second CRTC without disabling and reenabling the
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
Signed-off-by: Qinglang Miao
---
v2: based on linux-next(20200917), and can be applied to
mainline cleanly now.
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 15 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 29 ++---
anx7625: MIPI to DP transmitter DT schema
Signed-off-by: Xin Ji
Reviewed-by: Rob Herring
---
.../bindings/display/bridge/analogix,anx7625.yaml | 95 ++
1 file changed, 95 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/analogix,anx7625.ya
NULL pointer dereference is observed while exporting the dmabuf but
failed to allocate the 'struct file' which results into the dropping of
the allocated dentry corresponding to this file in the dmabuf fs, which
is ending up in dma_buf_release() and accessing the uninitialzed
dentry->d_fsdata.
Cal
Add J721E wrapper for mhdp, which sets up the clock and data muxes.
Signed-off-by: Jyri Sarha
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Reviewed-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
---
drivers/gpu/drm/bridge/cadence/Kconfig| 13
drivers/gpu/drm/brid
Kernel crash is observed when dual lvds link mode is activated
along with HDMI. For this use case DU0 drives dual lvds output
and DU1 drives hdmi output, but dot clock for DU1 is generated
from lvds1.
[ 585.890230] Unable to handle kernel paging request at virtual address
ff18
[ 585
This patch series adds new DRM bridge driver for Cadence MHDP8546 DPI/DP
bridge. The Cadence Display Port IP is also referred as MHDP (Mobile High
Definition Link, High-Definition Multimedia Interface, Display Port).
Cadence Display Port complies with VESA DisplayPort (DP) and embedded
Display Port
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/nouveau/dispnv50/disp.c: In function nv50_mstm_cleanup:
drivers/gpu/drm/nouveau/dispnv50/disp.c:1303:6: warning: variable ‘ret’ set but
not used [-Wunused-but-set-variable]
drivers/gpu/drm/nouveau/dispnv50/disp.c: In function nv50_ms
Add a new DRM bridge driver for Cadence MHDP8546 DPTX IP used in TI J721E
SoC. MHDP DPTX IP is the component that complies with VESA DisplayPort (DP)
and embedded Display Port (eDP) standards. It integrates uCPU running the
embedded Firmware (FW) interfaced over APB interface.
Basically, it takes
Update kernel-doc line comments to fix warnings reported by make W=1.
drivers/gpu/drm/drm_dp_helper.c:1036: warning: Function parameter or member
'dpcd' not described in 'drm_dp_subconnector_type'
drivers/gpu/drm/drm_dp_helper.c:1036: warning: Function parameter or member
'port_cap' not described
On Fri, Sep 18, 2020 at 11:45:34AM +0300, Dan Carpenter wrote:
> Hi Xin,
>
> url:
> https://github.com/0day-ci/linux/commits/Xin-Ji/Add-initial-support-for-slimport-anx7625/20200917-163238
> base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> 5925fa68fe8244651b3f78a88
From: Yuti Amonkar
Document the bindings used for the Cadence MHDP8546 DPI/DP bridge in
yaml format.
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Reviewed-by: Rob Herring
Reviewed-by: Laurent Pinchart
---
.../display/bridge/cdns,mhdp8546.yaml | 169 ++
On Sat, Sep 19, 2020 at 11:50 AM Thomas Gleixner wrote:
>
> First of all, sorry for the horribly big Cc list!
>
> Following up to the discussion in:
>
> https://lore.kernel.org/r/20200914204209.256266...@linutronix.de
>
> this provides a preemptible variant of kmap_atomic & related
> interfaces.
On Sat, Sep 19, 2020 at 12:35 PM Daniel Vetter wrote:
>
> On Sat, Sep 19, 2020 at 11:50 AM Thomas Gleixner wrote:
> >
> > First of all, sorry for the horribly big Cc list!
> >
> > Following up to the discussion in:
> >
> > https://lore.kernel.org/r/20200914204209.256266...@linutronix.de
> >
> >
Looks good for me, patch is:
Reviewed-by: Qiang Yu
Regards,
Qiang
On Sat, Sep 19, 2020 at 5:47 PM Liu Shixin wrote:
>
> Simplify the return expression.
>
> Signed-off-by: Liu Shixin
> ---
> drivers/gpu/drm/lima/lima_devfreq.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> d
To avoid having to create all the device and driver scaffolding we
just manually create and destroy a devres_group.
v2: Rebased
v3: use devres_open/release_group so we can use devm without real
hacks in the driver core or having to create an entire fake bus for
testing drivers. Might want to extr
To avoid having to create all the device and driver scaffolding we
just manually create and destroy a devres_group.
v2: Rebased
v3: use devres_open/release_group so we can use devm without real
hacks in the driver core or having to create an entire fake bus for
testing drivers. Might want to extr
tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head: 4589b6459d145ea133422b91be2f55a40fe74463
commit: cf3da8ea14f50741d6ddd3bee410459703036c4c [357/442] drm/amd/display:
Update idle optimization handling
config: x86_64-randconfig-a002-20200919 (attached as .config
Simplify the return expression.
Signed-off-by: Liu Shixin
---
drivers/gpu/drm/lima/lima_devfreq.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/lima/lima_devfreq.c
b/drivers/gpu/drm/lima/lima_devfreq.c
index bbe02817721b..5914442936ed 100644
--- a/dri
Simplify the return expression.
Signed-off-by: Liu Shixin
---
drivers/gpu/drm/omapdrm/dss/dsi.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index eeccf40bae41..cac0d1993dab 100644
--- a/drivers/g
On Sat, Sep 19, 2020 at 2:50 AM Thomas Gleixner wrote:
>
> this provides a preemptible variant of kmap_atomic & related
> interfaces. This is achieved by:
Ack. This looks really nice, even apart from the new capability.
The only thing I really reacted to is that the name doesn't make sense
to me
On Fri, Sep 18, 2020 at 09:57:37AM -0400, Alex Deucher wrote:
On Fri, Sep 18, 2020 at 3:17 AM Quan, Evan wrote:
[AMD Official Use Only - Internal Distribution Only]
Hi @Sasha Levin @Deucher, Alexander,
The following changes need to be applied also.
Otherwise, you may see unexpected shutdown
On Sat, Sep 19, 2020 at 10:39 AM Matthew Wilcox wrote:
>
> My concern with that is people might use kmap() and then pass the address
> to a different task. So we need to audit the current users of kmap()
> and convert any that do that into using vmap() instead.
Ahh. Yes, I guess they might do th
From: Rob Clark
This will allow us to more easily switch scheduling rules based on what
userspace wants.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_atomic_helper.c | 13
include/drm/drm_atomic.h| 31 +
2 files changed, 40 insertions(+)
From: Rob Clark
This will be used for non-block atomic commits.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_crtc.c | 11 +++
include/drm/drm_crtc.h | 8
2 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index aecd
From: Rob Clark
Add DRM_CLIENT_CAP_SCHED_MODE so that userspace can control the
scheduling mode for nonblocking atomic commits. Userspace such as
android, which treats the display pipeline as realtime (SCHED_FIFO)
should set DRM_CLIENT_CAP_SCHED_FIFO to prevent userspace components
of the displa
From: Rob Clark
The android userspace treats the display pipeline as a realtime problem.
And arguably, if your goal is to not miss frame deadlines (ie. vblank),
it is. (See https://lwn.net/Articles/809545/ for the best explaination
that I found.)
But this presents a problem with using workqueue
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