11.09.2020 12:59, Mikko Perttunen пишет:
> On 9/11/20 12:57 AM, Dmitry Osipenko wrote:
>> 09.09.2020 11:36, Mikko Perttunen пишет:
>> ...
Does it make sense to have timeout in microseconds?
>>>
>>> Not sure, but better have it a bit more fine-grained rather than
>>> coarse-grained. T
This eliminates the following sparse warning:
drivers/gpu/drm/panel/panel-sitronix-st7703.c:156:26: warning: symbol
'jh057n00900_panel_desc' was not declared. Should it be static?
Reported-by: Hulk Robot
Signed-off-by: Jason Yan
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 2 +-
1 file
Handing the return value of drm_universal_plane_init to fix the following
W=1 kernel build warning(s):
vc4_plane.c: In function ‘vc4_plane_init’:
vc4_plane.c:1340:6: warning: variable ‘ret’ set but not
used [-Wunused-but-set-variable]
Signed-off-by: Tian Tao
---
drivers/gpu/drm/vc4/vc4_plane.c |
This eliminates the following sparse warning:
drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c:217:15: warning: symbol
'vint_table' was not declared. Should it be static?
Reported-by: Hulk Robot
Signed-off-by: Jason Yan
---
drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c | 2 +-
1 file changed, 1 i
The function iommu_domain_alloc returns NULL on platforms without IOMMU
such as msm8974. This resulted in PTR_ERR(-ENODEV) being assigned to
gpu->aspace so the correct code path wasn't taken.
Fixes: ccac7ce373c1 ("drm/msm: Refactor address space initialization")
Signed-off-by: Luca Weiss
---
dri
Add a quirk IO_PGTABLE_QUIRK_SYS_CACHE to override the
attributes set in TCR for the page table walker when
using system cache.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/io-pgtable-arm.c | 7 ++-
include/linux/io-pgtable.h | 4
2 files changed, 10 insertions(+), 1 deletion
Some hardware variants contain a system cache or the last level
cache(llc). This cache is typically a large block which is shared
by multiple clients on the SOC. GPU uses the system cache to cache
both the GPU data buffers(like textures) as well the SMMU pagetables.
This helps with improved render
This eliminates the following sparse warning:
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c:527:5: warning: symbol
'analogix_dp_start_aux_transaction' was not declared. Should it be
static?
Reported-by: Hulk Robot
Signed-off-by: Jason Yan
---
drivers/gpu/drm/bridge/analogix/analogix_dp_reg
Commit f15a3ea80391 ("MAINTAINERS: Add ASPEED BMC GFX DRM driver entry")
does not mention that linux-asp...@lists.ozlabs.org is moderated for
non-subscribers, but the other three entries for
linux-asp...@lists.ozlabs.org do.
By 'majority vote' among entries, let us assume it was just missed here a
This adds support for the 7nm ("V4") DSI PHY/PLL for sm8150 and sm8250.
Implementation is based on 10nm driver, but updated based on the downstream
7nm driver.
Signed-off-by: Jonathan Marek
Tested-by: Dmitry Baryshkov (SM8250)
---
.../devicetree/bindings/display/msm/dsi.txt | 6 +-
drivers
add event thread to execute events serially from event queue. Also
timeout mode is supported which allow an event be deferred to be
executed at later time. Both link and phy compliant tests had been
done successfully.
Changes in v2:
-- Fix potential deadlock by removing redundant connect_mutex
--
On 2020-09-11 22:04, Robin Murphy wrote:
On 2020-09-11 17:21, Sai Prakash Ranjan wrote:
On 2020-09-11 21:37, Will Deacon wrote:
On Fri, Sep 11, 2020 at 05:03:06PM +0100, Robin Murphy wrote:
BTW am I supposed to have received 3 copies of everything? Because I
did...
Yeah, this seems to be hap
13.09.2020 12:51, Mikko Perttunen пишет:
...
>> All waits that are internal to a job should only wait for relative sync
>> point increments. >
>> In the grate-kernel every job uses unique-and-clean sync point (which is
>> also internal to the kernel driver) and a relative wait [1] is used for
>> th
Hi Thomas:
在 2020/9/11 15:47, Thomas Zimmermann 写道:
Hi
Am 09.09.20 um 09:33 schrieb Tian Tao:
Fixes the following W=1 kernel build warning(s):
vc4_plane.c: In function ‘vc4_plane_init’:
vc4_plane.c:1340:6: warning: variable ‘ret’ set but not
used [-Wunused-but-set-variable]
Signed-off-by: Tia
It's allocating an array of a6xx_gpu_state_obj structure rather than
its pointers.
Fixes: d6852b4b2d01 ("drm/msm/a6xx: Track and manage a6xx state memory")
Signed-off-by: Zhenzhong Duan
---
v2: Update commit message per Markus, thanks
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 +-
1 file c
rcar_dw_hdmi driver is also used on Renesas RZ/G2 SoC's, update the
same to reflect the description for DRM_RCAR_DW_HDMI config.
Signed-off-by: Lad Prabhakar
Reviewed-by: Chris Paterson
---
drivers/gpu/drm/rcar-du/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/d
This allows DSI driver to work with sm8150 and sm8250. The sdm845 config
is re-used as the config is the same.
Signed-off-by: Jonathan Marek
Tested-by: Dmitry Baryshkov (SM8250)
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 5 -
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 2 ++
2 files changed, 6 inserti
From: Sharat Masetty
The register read-modify-write construct is generic enough
that it can be used by other subsystems as needed, create
a more generic rmw() function and have the gpu_rmw() use
this new function.
Signed-off-by: Sharat Masetty
Reviewed-by: Jordan Crouse
Signed-off-by: Sai Prak
From: Sharat Masetty
The last level system cache can be partitioned to 32 different
slices of which GPU has two slices preallocated. One slice is
used for caching GPU buffers and the other slice is used for
caching the GPU SMMU pagetables. This talks to the core system
cache driver to acquire the
On Sat, 12 Sep 2020, Lukas Bulwahn wrote:
> Commit f15a3ea80391 ("MAINTAINERS: Add ASPEED BMC GFX DRM driver entry")
> does not mention that linux-asp...@lists.ozlabs.org is moderated for
> non-subscribers, but the other three entries for
> linux-asp...@lists.ozlabs.org do.
>
> By 'majority vo
It's allocating an array of a6xx_gpu_state_obj structure rathor than
its pointers.
This patch fix it.
Signed-off-by: Zhenzhong Duan
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
b/
Use table and of_match_node() to match qcom implementation
instead of multiple of_device_compatible() calls for each
QCOM SMMU implementation.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff
On Thu, Sep 10, 2020 at 10:18:32AM -0700, Nathan Chancellor wrote:
> Clang warns:
>
> drivers/gpu/drm/vc4/vc4_plane.c:901:27: warning: operator '?:' has lower
> precedence than '|'; '|' will be evaluated first
> [-Wbitwise-conditional-parentheses]
> fb->format->has_
> It's allocating an array of a6xx_gpu_state_obj structure rathor than
> its pointers.
* Please avoid a typo here.
* Would an other imperative wording become helpful for the change description?
> This patch fix it.
Please replace this sentence by the tag “Fixes” for a better commit message.
R
On Fri 11 Sep 11:08 CDT 2020, Luca Weiss wrote:
> The function iommu_domain_alloc returns NULL on platforms without IOMMU
> such as msm8974. This resulted in PTR_ERR(-ENODEV) being assigned to
> gpu->aspace so the correct code path wasn't taken.
>
> Fixes: ccac7ce373c1 ("drm/msm: Refactor address
On Thu, Sep 10, 2020 at 10:04:02AM -0700, Nathan Chancellor wrote:
> Clang warns 100+ times in the vc4 driver along the lines of:
>
> drivers/gpu/drm/vc4/vc4_hdmi_phy.c:518:13: warning: implicit conversion
> from enumeration type 'enum vc4_hdmi_field' to different enumeration
> type 'enum vc4_hdmi
12.09.2020 16:31, Mikko Perttunen пишет:
...
>> I'm now taking a closer look at this patch and it raises some more
>> questions, like for example by looking at the "On job timeout, we stop
>> the channel, NOP all future jobs on the channel using the same syncpoint
>> ..." through the prism of grate
Add iommu domain attribute for using system cache aka last level
cache by client drivers like GPU to set right attributes for caching
the hardware pagetables into the system cache.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/arm/arm-smmu/arm-smmu.c | 17 +
drivers/iommu/a
On 2020-09-11 21:37, Will Deacon wrote:
On Fri, Sep 11, 2020 at 05:03:06PM +0100, Robin Murphy wrote:
BTW am I supposed to have received 3 copies of everything? Because I
did...
Yeah, this seems to be happening for all of Sai's emails :/
Sorry, I am not sure what went wrong as I only sent t
05.09.2020 13:34, Mikko Perttunen пишет:
> + } else {
> + struct host1x_job *failed_job = job;
> +
> + host1x_job_dump(dev, job);
> +
> + host1x_syncpt_set_locked(job->syncpt);
> + failed_job->cancelled = true;
> +
> + list_for_each_en
if of_find_device_by_node() succeed, mtk_drm_kms_init() doesn't have
a corresponding put_device(). Thus add jump target to fix the exception
handling for this function implementation.
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Signed-off-by: Yu Kuai
---
drivers
Note I haven't tested SM8150 recently, but DSI is almost identical to SM8250.
v2:
- added workaround for 5GHz max_rate overflowing in 32-bit builds
(based on robclark's suggestion)
- Updated Kconfig option to mention SM8250 and not just SM8150
Jonathan Marek (3):
drm/msm/dsi: remove unused
Hi
Am 11.09.20 um 10:09 schrieb Tian Tao:
> Handing the return value of drm_universal_plane_init to fix the following
> W=1 kernel build warning(s):
> vc4_plane.c: In function ‘vc4_plane_init’:
> vc4_plane.c:1340:6: warning: variable ‘ret’ set but not
> used [-Wunused-but-set-variable]
>
> Signed
Hi
Am 11.09.20 um 16:07 schrieb Hans de Goede:
> Hi,
>
> On 9/11/20 9:59 AM, Thomas Zimmermann wrote:
>> VRAM helpers support ref counting for pin and vmap operations, no need
>> to avoid these operations, by employing the internal kmap interface. Just
>> use drm_gem_vram_vmap() and let it handle
An active cursor plane requires a valid display mode. Change the
commit_tail callback, so that it sets up the CRTC's mode before
updating planes.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_mode.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/ast/ast
This change simplifies ast's modesetting code. The display mode
is now programmed from within the CRTC's atomic_enable(), which
only runs if we actually want to program the mode.
Corresponding code in atomic_flush() is being removed. Also removed
is atomic_begin(), which serves no purpose at all.
The ast HW cursor requires the primary plane and CRTC to display at
a valid mode and format. This is not the case while switching
display modes, which can lead to the screen turing permanently dark.
As a workaround, the ast driver now disables active planes while the
mode or format switch takes pl
Since converting the ast driver to atomic modesetting, modesetting
occationally locks up the graphics hardware and turns the display
permanently dark. This happens once or twice per 10 mode switches.
Investigation shows that the ast hardware presumably requires the HW
cursor to be disabled while th
The atomic modesetting code tried to distinguish format changes from
full modesetting operations. But the implementation was buggy and the
format registers were often updated even for simple pageflips.
Fix this problem by handling format changes in the primary plane's
update function.
v3:
On 2020-09-07 9:57 a.m., Daniel Vetter wrote:
On Fri, Sep 04, 2020 at 12:43:04PM +0200, Michel Dänzer wrote:
From: Michel Dänzer
Don't check drm_crtc_state::active for this either, per its
documentation in include/drm/drm_crtc.h:
* Hence drivers must not consult @active in their various
*
Hi Michael,
On 11.09.2020 15:54, Michael Tretter wrote:
> Make the exynos_dsi driver a full drm bridge that can be found and used
> from other drivers.
>
> Other drivers can only attach to the bridge, if a mipi dsi device
> already attached to the bridge. This allows to defer the probe of the
> di
Hi Maxime,
On 9/8/20 9:00 PM, Maxime Ripard wrote:
> Hi Hoegeun,
>
> On Mon, Sep 07, 2020 at 08:49:12PM +0900, Hoegeun Kwon wrote:
>> On 9/3/20 5:00 PM, Maxime Ripard wrote:
>>> Hi everyone,
>>>
>>> Here's a (pretty long) series to introduce support in the VC4 DRM driver
>>> for the display pipeli
On Thu, 03 Sep 2020, Abhinav Kumar wrote:
> Add support for video pattern Display Port Compliance tests to
> MSM DP driver.
FWIW, I find it useful to prefix the cover letter subject line with the
usual git log prefixes, e.g. "drm/msm/dp", so people can filter their
mails better.
BR,
Jani.
> A
This patch updates dma_buf_vunmap() and dma-buf's vunmap callback to
use struct dma_buf_map. The interfaces used to receive a buffer address.
This address is now given in an instance of the structure.
Users of the functions are updated accordingly. This is only an interface
change. It is currently
This patch updates dma_buf_vmap() and dma-buf's vmap callback to use
struct dma_buf_map.
The interfaces used to return a buffer address. This address now gets
stored in an instance of the structure that is given as an additional
argument. The functions return an errno code on errors.
Users of the
Dma-buf provides vmap() and vunmap() for retrieving and releasing mappings
of dma-buf memory in kernel address space. The functions operate with plain
addresses and the assumption is that the memory can be accessed with load
and store operations. This is not the case on some architectures (e.g.,
sp
The new type struct dma_buf_map represents a mapping of dma-buf memory
into kernel space. It contains a flag, is_iomem, that signals users to
access the mapped memory with I/O operations instead of regular loads
and stores.
It was assumed that DMA buffer memory can be accessed with regular load
an
On Sun, 13 Sep 2020 at 09:57, Lukas Bulwahn wrote:
>
>
>
> On Sat, 12 Sep 2020, Lukas Bulwahn wrote:
>
> > Commit f15a3ea80391 ("MAINTAINERS: Add ASPEED BMC GFX DRM driver entry")
> > does not mention that linux-asp...@lists.ozlabs.org is moderated for
> > non-subscribers, but the other three entr
Hi,
On 14.09.2020 10:29, Marek Szyprowski wrote:
> On 11.09.2020 15:54, Michael Tretter wrote:
>> Make the exynos_dsi driver a full drm bridge that can be found and used
>> from other drivers.
>>
>> Other drivers can only attach to the bridge, if a mipi dsi device
>> already attached to the bridge
We already have a private data member for maximum display width so
let's use it and get rid of the redundant tilcdc_crtc_max_width().
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 16 +---
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 38 +++-
driv
END_OF_FRAME interrupts have been enabled all the time since the
beginning of this driver. It is about time to add this feature.
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 36 +---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/dr
The vblank interrupts have been always on when the display is on for a
very long time, so I decided that it is about time to fix it. Then the
following patch is just a cleanup.
BR,
Jyri
Jyri Sarha (2):
drm/tilcdc: Do not keep vblank interrupts enabled all the time
drm/tilcdc: Remove tilcdc_cr
On 14/09/2020 11:34, Jyri Sarha wrote:
> The vblank interrupts have been always on when the display is on for a
> very long time, so I decided that it is about time to fix it. Then the
> following patch is just a cleanup.
>
> BR,
> Jyri
>
> Jyri Sarha (2):
> drm/tilcdc: Do not keep vblank inter
Add the new vma_set_file() function to allow changing
vma->vm_file with the necessary refcount dance.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-buf.c | 16 +---
include/linux/mm.h| 2 ++
mm/mmap.c | 16
3 files changed, 23 insert
This reverts commit 26d3ac3cb04d171a861952e89324e347598a347f.
We need to figure out if dma_buf_mmap() is valid or not first.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_gem_shmem_helper.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c
b/
Hi Andrew,
I'm the new DMA-buf maintainer and Daniel and others came up with patches
extending the use of the dma_buf_mmap() function.
Now this function is doing something a bit odd by changing the vma->vm_file
while installing a VMA in the mmap() system call
The background here is that DMA-bu
Am 14.09.20 um 15:29 schrieb Christian König:
Hi Andrew,
Sorry forgot to add Daniel as well.
I'm the new DMA-buf maintainer and Daniel and others came up with patches
extending the use of the dma_buf_mmap() function.
Now this function is doing something a bit odd by changing the vma->vm_fi
On Mon, Sep 14, 2020 at 02:13:09AM -0400, Alex Deucher wrote:
> On Thu, Sep 10, 2020 at 4:29 AM Simon Ser wrote:
> >
> > On Thursday, September 10, 2020 10:18 AM, Daniel Vetter
> > wrote:
> >
> > > On Thu, Sep 10, 2020 at 07:50:59AM +, Simon Ser wrote:
> > >
> > > > On Wednesday, September 9
Hi Martin and Guido,
I am trying to get MIPI DSI panel to work on an imx8mq-evk board.
Here are the changes I did against linux-next 20200914 following what
was done on imx8mq-librem5-devkit.dts:
https://pastebin.com/raw/GXazRyNx
The config I am using is this one:
https://pastebin.com/raw
On Mon, Sep 14, 2020 at 10:52 AM Fabio Estevam wrote:
>
> Hi Martin and Guido,
>
> I am trying to get MIPI DSI panel to work on an imx8mq-evk board.
>
> Here are the changes I did against linux-next 20200914 following what
> was done on imx8mq-librem5-devkit.dts:
>
On 2020-09-14 3:52 a.m., Michel Dänzer wrote:
On 2020-09-07 9:57 a.m., Daniel Vetter wrote:
On Fri, Sep 04, 2020 at 12:43:04PM +0200, Michel Dänzer wrote:
From: Michel Dänzer
Don't check drm_crtc_state::active for this either, per its
documentation in include/drm/drm_crtc.h:
* Hence driver
On Mon, Sep 14, 2020 at 9:32 AM Ville Syrjälä
wrote:
>
> On Mon, Sep 14, 2020 at 02:13:09AM -0400, Alex Deucher wrote:
> > On Thu, Sep 10, 2020 at 4:29 AM Simon Ser wrote:
> > >
> > > On Thursday, September 10, 2020 10:18 AM, Daniel Vetter
> > > wrote:
> > >
> > > > On Thu, Sep 10, 2020 at 07:5
Hi
Am 13.08.20 um 12:22 schrieb Christian König:
> Am 13.08.20 um 10:36 schrieb Thomas Zimmermann:
>> GEM object functions deprecate several similar callback interfaces in
>> struct drm_driver. This patch replaces the per-driver callbacks with
>> per-instance callbacks in amdgpu. The only exceptio
On Mon, Sep 14, 2020 at 10:38:24AM -0400, Alex Deucher wrote:
> On Mon, Sep 14, 2020 at 9:32 AM Ville Syrjälä
> wrote:
> >
> > On Mon, Sep 14, 2020 at 02:13:09AM -0400, Alex Deucher wrote:
> > > On Thu, Sep 10, 2020 at 4:29 AM Simon Ser wrote:
> > > >
> > > > On Thursday, September 10, 2020 10:18
On 2020-09-14 4:37 p.m., Kazlauskas, Nicholas wrote:
On 2020-09-14 3:52 a.m., Michel Dänzer wrote:
On 2020-09-07 9:57 a.m., Daniel Vetter wrote:
On Fri, Sep 04, 2020 at 12:43:04PM +0200, Michel Dänzer wrote:
From: Michel Dänzer
Don't check drm_crtc_state::active for this either, per its
docu
On 2020-09-14 11:22 a.m., Michel Dänzer wrote:
On 2020-09-14 4:37 p.m., Kazlauskas, Nicholas wrote:
On 2020-09-14 3:52 a.m., Michel Dänzer wrote:
On 2020-09-07 9:57 a.m., Daniel Vetter wrote:
On Fri, Sep 04, 2020 at 12:43:04PM +0200, Michel Dänzer wrote:
From: Michel Dänzer
Don't check drm_
Hi Swapnil,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on linus/master v5.9-rc5 next-20200914]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use
On 2020-09-14 5:33 p.m., Kazlauskas, Nicholas wrote:
On 2020-09-14 11:22 a.m., Michel Dänzer wrote:
On 2020-09-14 4:37 p.m., Kazlauskas, Nicholas wrote:
On 2020-09-14 3:52 a.m., Michel Dänzer wrote:
P.S. Since DCN doesn't make a distinction between primary or overlay
planes in hardware, coul
On Sat, Sep 12, 2020 at 06:25:58PM +0800, Zhenzhong Duan wrote:
> It's allocating an array of a6xx_gpu_state_obj structure rathor than
> its pointers.
>
> This patch fix it.
>
> Signed-off-by: Zhenzhong Duan
LGTM but should have a Fixes: tag for the stable trees
Fixes: d6852b4b2d01 ("drm/msm/a
On 23/07/2020 18:21, Chris Wilson wrote:
Since the debugfs may peek into the GEM contexts as the corresponding
client/fd is being closed, we may try and follow a dangling pointer.
However, the context closure itself is serialised with the ctx->mutex,
so if we hold that mutex as we inspect the s
On 14/09/2020 12:00, Nikunj A. Dadhania wrote:
As we close GEM object and set file_priv to -EBADF which is protected
by ctx->mutex, populating the GEM debugfs info is not protected
and results in the crash shown below.
Make sure to protect the access to file_priv using ctx->mutex to avoid
race
On 2020-09-12 11:25, Rob Clark wrote:
Fyi, I've pushed this series and the dp-compliance bits to
msm-next-dp[1]
I didn't include the dp audio series yet, which seems to need some
minor rebasing. (And a small request, when resending, cc
freedr...@lists.freedesktop.org, so it shows up in the pat
Am 14.09.20 um 17:05 schrieb Thomas Zimmermann:
Hi
Am 13.08.20 um 12:22 schrieb Christian König:
Am 13.08.20 um 10:36 schrieb Thomas Zimmermann:
GEM object functions deprecate several similar callback interfaces in
struct drm_driver. This patch replaces the per-driver callbacks with
per-instan
On Sat, 29 Aug 2020 16:24:56 +0200, Krzysztof Kozlowski wrote:
> Add Samsung 11-pin USB-C connector into standard dtschema bindings file.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../connector/samsung,usb-connector-11pin.txt | 49 ---
> .../bindings/connector/usb-connector.
On Sat, 29 Aug 2020 19:25:29 +0200, Krzysztof Kozlowski wrote:
> The samsung,s6e63j0x03 does not have enable GPIO, so do not require it.
> This fixes dtbs_check warning:
>
> arch/arm/boot/dts/exynos3250-rinato.dt.yaml: panel@0: 'enable-gpios' is a
> required property
>
> Signed-off-by: Krzyszt
Am 14.09.20 um 16:06 schrieb Jason Gunthorpe:
On Mon, Sep 14, 2020 at 03:30:47PM +0200, Christian König wrote:
Am 14.09.20 um 15:29 schrieb Christian König:
Hi Andrew,
I'm the new DMA-buf maintainer and Daniel and others came up with
patches extending the use of the dma_buf_mmap() function.
N
Hi Swapnil,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on linus/master v5.9-rc5 next-20200914]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use
https://bugzilla.kernel.org/show_bug.cgi?id=208825
--- Comment #3 from Jon Tourville (jontourvi...@me.com) ---
I am now unable to reproduce even on versions <5.8.6, which I know still had
the problem. So I am thinking it may have been a firmware update or something
else that resolved the issue for
On Mon, Sep 07, 2020 at 08:12:56PM +0200, Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 03:00:25PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > The timestamping constants have nothing to do with any legacy state
> > so should not be updated from
> > drm_atomic_helper_update_legacy
Hi,
On Mon, 14 Sep 2020 14:31:19 +0200, Marek Szyprowski wrote:
> On 14.09.2020 10:29, Marek Szyprowski wrote:
> > On 11.09.2020 15:54, Michael Tretter wrote:
> >> Make the exynos_dsi driver a full drm bridge that can be found and used
> >> from other drivers.
> >>
> >> Other drivers can only atta
On Thu, 03 Sep 2020 21:14:33 +0200, Krzysztof Kozlowski wrote:
> Add common properties appearing in DTSes (opp-table) to fix dtbs_check
> warnings like:
>
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: gpu@14ac:
> 'opp-table' does not match any of the regexes: 'pinctrl-[0-9]+'
>
>
On Thu, Sep 03, 2020 at 09:14:36PM +0200, Krzysztof Kozlowski wrote:
> Add common properties appearing in DTSes (iommus, power-domains) to fix
> dtbs_check warnings like:
>
> arch/arm/boot/dts/exynos4210-i9100.dt.yaml: rotator@1281:
> 'iommus', 'power-domains' do not match any of the reg
On Thu, 03 Sep 2020 21:14:34 +0200, Krzysztof Kozlowski wrote:
> Add common properties appearing in DTSes (opp-table) to fix dtbs_check
> warnings like:
>
> arch/arm/boot/dts/exynos4210-i9100.dt.yaml: gpu@1300:
> 'opp-table' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed
On Thu, 03 Sep 2020 21:14:35 +0200, Krzysztof Kozlowski wrote:
> Update the address of Maxime Ripard as one in @free-electrons.com does
> not work.
>
> Cc: Maxime Ripard
> Signed-off-by: Krzysztof Kozlowski
> Acked-by: Maxime Ripard
>
> ---
>
> Changes since v1:
> 1. Add Ack
> ---
> Document
On Mon, 14 Sep 2020 22:42:09 +0200
Thomas Gleixner wrote:
> 21 files changed, 23 insertions(+), 92 deletions(-)
This alone makes it look promising, and hopefully acceptable by Linus :-)
-- Steve
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On Mon, Sep 14, 2020 at 1:45 PM Thomas Gleixner wrote:
>
> Recently merged code does:
>
> gfp = preemptible() ? GFP_KERNEL : GFP_ATOMIC;
>
> Looks obviously correct, except for the fact that preemptible() is
> unconditionally false for CONFIF_PREEMPT_COUNT=n, i.e. all allocations in
> tha
Hi Marek, Michael,
On 14.09.2020 22:01, Michael Tretter wrote:
> Hi,
>
> On Mon, 14 Sep 2020 14:31:19 +0200, Marek Szyprowski wrote:
>> On 14.09.2020 10:29, Marek Szyprowski wrote:
>>> On 11.09.2020 15:54, Michael Tretter wrote:
Make the exynos_dsi driver a full drm bridge that can be found a
On Fri, Sep 11, 2020 at 4:50 PM Luben Tuikov wrote:
>
> On 2020-09-08 16:09, Luben Tuikov wrote:
> > On 2020-09-07 04:07, Daniel Vetter wrote:
> >> On Mon, Sep 07, 2020 at 10:06:08AM +0200, Daniel Vetter wrote:
> >>> On Sat, Sep 05, 2020 at 11:50:05AM -0400, Alex Deucher wrote:
> On Thu, Sep
Reviewed-by: Dave Airlie
On Fri, 11 Sep 2020 at 23:10, Christian König
wrote:
>
> As far as I can tell this was never used either and we just
> always fallback to the order cached > wc > uncached anyway.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c |
For both:
Reviewed-by: Dave Airlie
On Sat, 12 Sep 2020 at 01:24, Christian König
wrote:
>
> Instead of letting TTM make an educated guess based on
> some mask all drivers should just specify what caching
> they want for their CPU mappings.
>
> Signed-off-by: Christian König
> ---
> drivers/gp
Hi, Frank:
Frank Wunderlich 於 2020年9月4日 週五 下午7:01寫道：
>
> From: chunhui dai
>
> Without that patch if you use specific resolutions like 1280x1024,
> I can see distortion in the output. It seems as if the
> frequency for updating the pixel of the image is out of sync.
>
> For initialization tmds n
On Mon, Sep 14, 2020 at 2:55 PM Thomas Gleixner wrote:
>
> Yes it does generate better code, but I tried hard to spot a difference
> in various metrics exposed by perf. It's all in the noise and I only
> can spot a difference when the actual preemption check after the
> decrement
I'm somewhat mor
On Fri, 04 Sep 2020 16:53:00 +0200, Krzysztof Kozlowski wrote:
> The i.MX General Power Controller v2 is also an interrupt controller so
> document additional properties to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a:
> '#interrupt-cells',
On Fri, 04 Sep 2020 16:53:01 +0200, Krzysztof Kozlowski wrote:
> Add common properties appearing in DTSes (assigned-clocks and others) to
> fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: mipi-dsi@30a0:
> 'assigned-clock-parents', 'assigned-clock-rates
On Fri, 04 Sep 2020 16:53:02 +0200, Krzysztof Kozlowski wrote:
> All Purism Librem5 phones have three compatibles so they need their own
> entry to fix dbts_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml: /:
> compatible: ['purism,librem5r2', 'purism,librem5
On Fri, 04 Sep 2020 16:53:04 +0200, Krzysztof Kozlowski wrote:
> Remove whitespace at the end of line.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> Documentation/devicetree/bindings/gpu/vivante,gc.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Applied, thanks!
___
On Fri, 04 Sep 2020 16:53:03 +0200, Krzysztof Kozlowski wrote:
> Add common properties appearing in DTSes (cooling-cells, assigned-clocks
> and others) to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpu@3800:
> '#cooling-cells', 'assigned-clock-par
On Mon, Sep 14, 2020 at 3:24 PM Linus Torvalds
wrote:
>
> Ard and Herbert added to participants: see
> chacha20poly1305_crypt_sg_inplace(), which does
>
> flags = SG_MITER_TO_SG;
> if (!preemptible())
> flags |= SG_MITER_ATOMIC;
>
> introduced in commit d95312a3ccc0
The microcode in linux-firmware has been updated to 1.87.01 for a5xx
1.77.01 for a6xx [1]. These microcode versions support a new opcode called
WHERE_AM_I that takes the place of the hardware RPTR shadow and enables the
microcode to update the RPTR shadow in privileged memory so it is protected
aga
Support the WHERE_AM_I opcode for the A618, A630 and A640 GPUs if the
microcode supports it. The WHERE_AM_I opcode allows the RPTR shadow
to be updated in priviliged memory which protects the shadow from being
read or written from user submissions.
A650 already supports extended APRIV have built i
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