Hi Krzysztof,
On 29.08.2020 19:25, Krzysztof Kozlowski wrote:
> Commit 52005dece527 ("ARM: dts: Add assigned clock parents to CMU node
> for exynos3250") added assigned clocks under Clock Management Unit to
> fix hangs when accessing ISP registers.
>
> This is not the place for it as CMU does not
On Mon, Aug 31, 2020 at 10:11:02AM +0200, Marek Szyprowski wrote:
> Hi Krzysztof,
>
> On 29.08.2020 19:25, Krzysztof Kozlowski wrote:
> > Commit 52005dece527 ("ARM: dts: Add assigned clock parents to CMU node
> > for exynos3250") added assigned clocks under Clock Management Unit to
> > fix hangs w
Hi Krzysztof,
On 31.08.2020 10:19, Krzysztof Kozlowski wrote:
> On Mon, Aug 31, 2020 at 10:11:02AM +0200, Marek Szyprowski wrote:
>> On 29.08.2020 19:25, Krzysztof Kozlowski wrote:
>>> Commit 52005dece527 ("ARM: dts: Add assigned clock parents to CMU node
>>> for exynos3250") added assigned clocks
On Mon, Aug 31, 2020 at 10:19:06AM +0200, Krzysztof Kozlowski wrote:
> On Mon, Aug 31, 2020 at 10:11:02AM +0200, Marek Szyprowski wrote:
> > Hi Krzysztof,
> >
> > On 29.08.2020 19:25, Krzysztof Kozlowski wrote:
> > > Commit 52005dece527 ("ARM: dts: Add assigned clock parents to CMU node
> > > for
On Fri, Aug 28, 2020 at 12:53:32PM +0300, Jani Nikula wrote:
> On Tue, 25 Aug 2020, Dan Carpenter wrote:
> > Hello Mathieu Malaterre,
> >
> > The patch e9c0c874711b: "drm/dp: annotate implicit fall throughs"
> > from Jan 14, 2019, leads to the following static checker warning:
> >
> > drivers/
Hi Samuel,
Am Montag, 31. August 2020, 02:47:56 CEST schrieb Samuel Dionne-Riel:
> I have an Asus Chromebook Tablet CT100PA, which I will refer to as
> "dumo" from this point on, which is a specific variant of gru-scarlet.
> As far as I am aware, all gru-scarlet are the same, except for the
> disp
On Mon, 2020-08-31 at 07:03 +0800, Chun-Kuang Hu wrote:
> Hi, Chunfeng & Kishon:
>
> How do you feel about this patch?
It's fine to me,
Reviewed-by: Chunfeng Yun
Thanks a lot
>
> Regards,
> Chun-Kuang.
>
> Chun-Kuang Hu 於 2020年8月23日 週日 上午9:48寫道：
> >
> > From: CK Hu
> >
> > mtk_hdmi_phy is
27.08.2020 18:54, Thierry Reding пишет:
...
>> The Tegra DRM has a very special quirk for ARM32 that was added in this
>> commit [2] and driver relies on checking of whether explicit or implicit
>> IOMMU is used in order to activate the quirk.
>>
>> [2]
>> https://git.kernel.org/pub/scm/linux/kerne
This patch series adds new DRM bridge driver for Cadence MHDP8546 DPI/DP
bridge. The Cadence Display Port IP is also referred as MHDP (Mobile High
Definition Link, High-Definition Multimedia Interface, Display Port).
Cadence Display Port complies with VESA DisplayPort (DP) and embedded
Display Port
On Thu, 2020-08-20 at 16:08 +0100, Robin Murphy wrote:
> Now that arch/arm is wired up for default domains and iommu-dma,
> implement the corresponding driver-side support for groups and DMA
> domains to replace the shared mapping workaround.
>
> Signed-off-by: Robin Murphy
> ---
> drivers/iommu
Hi Maxime,
On 7/9/20 2:41 AM, Maxime Ripard wrote:
> Hi everyone,
>
> Here's a (pretty long) series to introduce support in the VC4 DRM driver
> for the display pipeline found in the BCM2711 (and thus the RaspberryPi 4).
>
> The main differences are that there's two HDMI controllers and that the
Fix kernel-doc warning in :
../include/linux/dma-buf.h:330: warning: Function parameter or member
'name_lock' not described in 'dma_buf'
Signed-off-by: Randy Dunlap
Cc: Sumit Semwal
Cc: Gustavo Padovan
Cc: Christian König
Cc: linux-me...@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
--
Add @cookie to dma_fence_end_signalling() to prevent kernel-doc
warning in drivers/dma-buf/dma-fence.c:
../drivers/dma-buf/dma-fence.c:291: warning: Function parameter or member
'cookie' not described in 'dma_fence_end_signalling'
Signed-off-by: Randy Dunlap
Cc: Sumit Semwal
Cc: Gustavo Padova
Hi Sam,
Le sam. 29 août 2020 à 23:07, Sam Ravnborg a
écrit :
On Thu, Aug 27, 2020 at 01:44:03PM +0200, Paul Cercueil wrote:
of_graph_get_remote_node() requires of_node_put() to be called on
the
device_node pointer when it's no more in use.
Fixes: fc1acf317b01 ("drm/ingenic: Add support f
On Sun, Aug 30, 2020 at 10:51:22AM +0200, Krzysztof Kozlowski wrote:
> Update the address of Maxime Ripard as one in @free-electrons.com does
> not work.
>
> Cc: Maxime Ripard
> Signed-off-by: Krzysztof Kozlowski
Acked-by: Maxime Ripard
Thanks!
Maxime
signature.asc
Description: PGP signatur
Le dim. 30 août 2020 à 21:21, Ezequiel Garcia
a écrit :
Hi Paul,
On Thu, 27 Aug 2020 at 09:04, Paul Cercueil
wrote:
Even if support for the IPU was compiled in, we may run on a device
(e.g. the Qi LB60) where the IPU is not available, or simply with
an old
devicetree without the IPU
From: Yuti Amonkar
Document the bindings used for the Cadence MHDP8546 DPI/DP bridge in
yaml format.
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Reviewed-by: Rob Herring
Reviewed-by: Laurent Pinchart
---
.../display/bridge/cdns,mhdp8546.yaml | 154 ++
On Sun, Aug 30, 2020 at 02:57:43PM +0200, Hans de Goede wrote:
> This commit removes a check where we would skip writing the ctrl register
> and then setting the update bit in case the ctrl register already contains
> the correct values.
>
> In a perfect world skipping the update should be fine in
Dear all,
Here are the notes we took during the BoF.
I believe the meeting was super interesting.
Although it felt a bit short for the topic,
we left with a few interesting ideas.
Thanks everyone!
Ezequiel
---
LPC 2020 BoF: Negotiating DMA-BUF Heaps
Attendees:
* Brian Starkey
* Daniel Stone
*
On Mon, Aug 31, 2020 at 7:30 AM Ben Skeggs wrote:
>
> On Tue, 25 Aug 2020 at 17:21, Alexander Kapshuk
> wrote:
> >
> > Since upgrading to linux-next based on 5.9.0-rc1 and 5.9.0-rc2 I have
> > had my mouse pointer disappear soon after logging in, and I have
> > observed the system freezing tempor
Hi Leon,
Le dim. 30 août 2020 à 16:36, 何小龙 (Leon He)
a écrit :
+struct ili9341 {
+ struct drm_panel panel;
+ struct mipi_dsi_device *dsi;
+ const struct ili9341_pdata *pdata;
+
+ struct gpio_desc*reset_gpiod;
+ u32 rotation;
+};
+
Hi Paul, you p
Daniel Vetter 于2020年7月29日周三 上午5:51写道：
>
> On Tue, Jul 28, 2020 at 12:08 PM Kevin Tang wrote:
> >
> > From: Kevin Tang
> >
> > Adds DPU(Display Processor Unit) support for the Unisoc's display subsystem.
> > It's support multi planes, scaler, rotation, PQ(Picture Quality) and more.
> >
> > RFC v6
The only usage of these is to assign their address to the fbops field in
the fb_info struct, which is a const pointer. Make them const to allow
the compiler to put them in read-only memory.
Signed-off-by: Rikard Falkeborn
---
drivers/gpu/drm/gma500/framebuffer.c | 6 +++---
1 file changed, 3 ins
Add J721E wrapper for mhdp, which sets up the clock and data muxes.
Signed-off-by: Jyri Sarha
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Reviewed-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
---
drivers/gpu/drm/bridge/cadence/Kconfig| 13
drivers/gpu/drm/brid
Hi,
I have an Asus Chromebook Tablet CT100PA, which I will refer to as
"dumo" from this point on, which is a specific variant of gru-scarlet.
As far as I am aware, all gru-scarlet are the same, except for the
display, and in turn the different scarlets with the innolux panel
are the same.
I do no
On Sun, 2020-08-23 at 09:48 +0800, Chun-Kuang Hu wrote:
> Mediatek HDMI phy driver is moved from drivers/gpu/drm/mediatek to
> drivers/phy/mediatek, so add the new folder to the Mediatek DRM drivers'
> information.
>
> Signed-off-by: Chun-Kuang Hu
> Reviewed-by: Matthias Brugger
> ---
> MAINTAI
Add a new DRM bridge driver for Cadence MHDP8546 DPTX IP used in TI J721E
SoC. MHDP DPTX IP is the component that complies with VESA DisplayPort (DP)
and embedded Display Port (eDP) standards. It integrates uCPU running the
embedded Firmware (FW) interfaced over APB interface.
Basically, it takes
Hi Philipp,
url:
https://github.com/0day-ci/linux/commits/Philipp-Zabel/drm-add-drmm_encoder_alloc/20200826-203629
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-m001-20200826 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
If you fix th
Hi Philipp,
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Philipp-Zabel/drm-add-drmm_encoder_alloc/20200826-203629
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-m001-20200826 (attached as .config)
compiler:
Am 31.08.20 um 06:16 schrieb Randy Dunlap:
Fix kernel-doc warning in :
../include/linux/dma-buf.h:330: warning: Function parameter or member
'name_lock' not described in 'dma_buf'
Signed-off-by: Randy Dunlap
Cc: Sumit Semwal
Cc: Gustavo Padovan
Cc: Christian König
Cc: linux-me...@vger.kern
Am 31.08.20 um 06:17 schrieb Randy Dunlap:
Add @cookie to dma_fence_end_signalling() to prevent kernel-doc
warning in drivers/dma-buf/dma-fence.c:
../drivers/dma-buf/dma-fence.c:291: warning: Function parameter or member
'cookie' not described in 'dma_fence_end_signalling'
Signed-off-by: Randy
e' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Swapnil-Jakhade/drm-Add-support-for-Cadence-MHDP8546-DPI-DP-bridge-and-J721E-wrapper/20200831-162549
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-n
Hi Laurentiu,
On Fr, 2020-08-28 at 11:36 +0300, Laurentiu Palcu wrote:
> Hi Lucas,
>
> I was wondering about the plans to merge this series. Since not many
> people can test it properly due to lack of DCSS support in the upstream
> NWL driver (which I heard it's coming soon) and a completely none
https://bugzilla.kernel.org/show_bug.cgi?id=203905
shanmukhat...@gmail.com (shanmukhat...@gmail.com) changed:
What|Removed |Added
CC||shanmu
On Sun, Aug 30, 2020 at 02:57:39PM +0200, Hans de Goede wrote:
> According to the data-sheet the way the PWM controller works is that
> each input clock-cycle the base_unit gets added to a N bit counter and
> that counter overflowing determines the PWM output frequency.
>
> So assuming e.g. a 16 b
On Sun, Aug 30, 2020 at 02:57:40PM +0200, Hans de Goede wrote:
> When the user requests a high enough period ns value, then the
> calculations in pwm_lpss_prepare() might result in a base_unit value of 0.
>
> But according to the data-sheet the way the PWM controller works is that
> each input clo
On Sun, Aug 30, 2020 at 02:57:41PM +0200, Hans de Goede wrote:
> In the not-enabled -> enabled path pwm_lpss_apply() needs to get a
> runtime-pm reference; and then on any errors it needs to release it
> again.
>
> This leads to somewhat hard to read code. This commit introduces a new
> pwm_lpss_p
On 29.08.2020 19:25, Krzysztof Kozlowski wrote:
> The fixed clocks are kept under dedicated node fixed-rate-clocks, thus a
> fake "reg" was added. This is not correct with dtschema as fixed-clock
> binding does not have a "reg" property:
>
>arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: clo
On Sun, Aug 30, 2020 at 02:57:42PM +0200, Hans de Goede wrote:
> Before this commit a suspend + resume of the LPSS PWM controller
> would result in the controller being reset to its defaults of
> output-freq = clock/256, duty-cycle=100%, until someone changes
> to the output-freq and/or duty-cycle
On Sun, Aug 30, 2020 at 02:57:43PM +0200, Hans de Goede wrote:
> This commit removes a check where we would skip writing the ctrl register
> and then setting the update bit in case the ctrl register already contains
> the correct values.
>
> In a perfect world skipping the update should be fine in
On Sun, Aug 30, 2020 at 02:57:44PM +0200, Hans de Goede wrote:
> While looking into adding atomic-pwm support to the pwm-crc driver I
> noticed something odd, there is a PWM_BASE_CLK define of 6 MHz and
> there is a clock-divider which divides this with a value between 1-128,
> and there are 256 du
On Sun, Aug 30, 2020 at 02:57:44PM +0200, Hans de Goede wrote:
> While looking into adding atomic-pwm support to the pwm-crc driver I
> noticed something odd, there is a PWM_BASE_CLK define of 6 MHz and
> there is a clock-divider which divides this with a value between 1-128,
> and there are 256 du
On Sun, Aug 30, 2020 at 02:57:45PM +0200, Hans de Goede wrote:
> The CRC PWM controller has a clock-divider which divides the clock with
> a value between 1-128. But as can seen from the PWM_DIV_CLK_xxx
> defines, this range maps to a register value of 0-127.
>
> So after calculating the clock-div
On Sun, Aug 30, 2020 at 02:57:46PM +0200, Hans de Goede wrote:
> The pwm-crc code is using 2 different enable bits:
> 1. bit 7 of the PWM0_CLK_DIV (PWM_OUTPUT_ENABLE)
> 2. bit 0 of the BACKLIGHT_EN register
>
> The BACKLIGHT_EN register at address 0x51 really controls a separate
> output-only GPIO
On Sun, Aug 30, 2020 at 02:57:47PM +0200, Hans de Goede wrote:
> The pwm-crc code is using 2 different enable bits:
> 1. bit 7 of the PWM0_CLK_DIV (PWM_OUTPUT_ENABLE)
> 2. bit 0 of the BACKLIGHT_EN register
>
> So far we've kept the PWM_OUTPUT_ENABLE bit set when disabling the PWM,
> this commit m
On Sun, Aug 30, 2020 at 02:57:49PM +0200, Hans de Goede wrote:
> Implement the pwm_ops.get_state() method to complete the support for the
> new atomic PWM API.
>
> Reviewed-by: Andy Shevchenko
> Signed-off-by: Hans de Goede
> ---
> Changes in v6:
> - Rebase on 5.9-rc1
> - Use DIV_ROUND_UP_ULL be
On Sun, Aug 30, 2020 at 02:57:48PM +0200, Hans de Goede wrote:
> Replace the enable, disable and config pwm_ops with an apply op,
> to support the new atomic PWM API.
>
> Reviewed-by: Andy Shevchenko
> Signed-off-by: Hans de Goede
> ---
> Changes in v6:
> - Rebase on 5.9-rc1
> - Use do_div when
Hi Lucas, Sam,
On Mon, Aug 31, 2020 at 12:37:23PM +0200, Lucas Stach wrote:
> Hi Laurentiu,
>
> On Fr, 2020-08-28 at 11:36 +0300, Laurentiu Palcu wrote:
> > Hi Lucas,
> >
> > I was wondering about the plans to merge this series. Since not many
> > people can test it properly due to lack of DCSS
Hi,
On 8/31/20 1:13 PM, Thierry Reding wrote:
On Sun, Aug 30, 2020 at 02:57:43PM +0200, Hans de Goede wrote:
This commit removes a check where we would skip writing the ctrl register
and then setting the update bit in case the ctrl register already contains
the correct values.
In a perfect wor
Hello Guido Günther,
The patch 72967d5616d3: "drm/panel: Add panel driver for the Mantix
MLAF057WE51-X DSI panel" from Aug 17, 2020, leads to the following
static checker warning:
drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c:205 mantix_get_modes()
error: we previously assumed
Hello Linus Walleij,
The patch 5fc537bfd000: "drm/mcde: Add new driver for ST-Ericsson
MCDE" from May 24, 2019, leads to the following static checker
warning:
drivers/gpu/drm/mcde/mcde_display.c:570 mcde_configure_channel()
error: uninitialized symbol 'val'.
drivers/gpu/drm/mcde/
On Saturday, August 29, 2020 4:06 PM, Sidong Yang wrote:
> Currently vkms module doesn't support gamma function for userspace. so igt
> subtests in kms_plane(pixel-format-pipe-A-plan) failed for calling
> drmModeCrtcSetGamma().
It doesn't seem like this IGT test's goal is to exercise support for
Hi,
On 8/31/20 1:10 PM, Thierry Reding wrote:
On Sun, Aug 30, 2020 at 02:57:42PM +0200, Hans de Goede wrote:
Before this commit a suspend + resume of the LPSS PWM controller
would result in the controller being reset to its defaults of
output-freq = clock/256, duty-cycle=100%, until someone cha
Hi,
On 8/31/20 10:56 AM, Andy Shevchenko wrote:
On Sun, Aug 30, 2020 at 02:57:43PM +0200, Hans de Goede wrote:
This commit removes a check where we would skip writing the ctrl register
and then setting the update bit in case the ctrl register already contains
the correct values.
In a perfect w
This is a note to let you know that I've just added the patch titled
drm/modeset-lock: Take the modeset BKL for legacy drivers
to the 5.8-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
On 29.08.2020 16:24, Krzysztof Kozlowski wrote:
> Additional properties actually might appear (e.g. assigned-clocks) so
> use unevaluatedProperties to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
> system-controller@105c:
> 'assigned-clock-parents
On 29.08.2020 16:24, Krzysztof Kozlowski wrote:
> Additional properties or nodes actually might appear (e.g. operating
> points table) so use unevaluatedProperties to fix dtbs_check warnings
> like:
>
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: gpu@14ac:
> 'opp_table' does not m
On 29.08.2020 16:24, Krzysztof Kozlowski wrote:
> Additional properties actually might appear (e.g. clocks) so use
> unevaluatedProperties to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: timer@101c:
> 'clock-names', 'clocks' do not match any of the
On 29.08.2020 16:24, Krzysztof Kozlowski wrote:
> Samsung Exynos SoCs use syscon for system registers so document its
> compatibles.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> Documentation/devicetree/bindings/mfd/syscon.yaml | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/Docu
On 29.08.2020 16:24, Krzysztof Kozlowski wrote:
> Additional properties actually might appear (e.g. power-domains) so use
> unevaluatedProperties to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: i2s@1144:
> Additional properties are not allowed ('po
On Mon, Aug 31, 2020 at 02:30:52PM +0200, Sylwester Nawrocki wrote:
> On 29.08.2020 16:24, Krzysztof Kozlowski wrote:
> > Samsung Exynos SoCs use syscon for system registers so document its
> > compatibles.
> >
> > Signed-off-by: Krzysztof Kozlowski
> > ---
> > Documentation/devicetree/bindings/
Hi Krzysztof,
On 29.08.2020 16:25, Krzysztof Kozlowski wrote:
> The USB-C connector bindings require port@0. Such port was already
> described in DTS but outside of the connector itself. Put it into
> proper place to fix dtbs_check warnings like:
>
>arch/arm64/boot/dts/exynos/exynos5433-tm2.
On 29.08.2020 16:24, Krzysztof Kozlowski wrote:
> "gpios" property is deprecated. Update the Exynos5433 DTS to fix
> dtbs_checks warnings like:
>
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: i2c-gpio-0: 'sda-gpios'
> is a required property
> arch/arm64/boot/dts/exynos/exynos5433-tm2.
On 29.08.2020 16:24, Krzysztof Kozlowski wrote:
> System register nodes, implementing syscon binding, should use
> appropriate compatible. This fixes dtbs_check warnings:
>
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: syscon@13b8:
> compatible: ['syscon'] is not valid under any
Novatek NT36672a is a generic DSI IC that drives command and video mode
panels. Add the driver for it.
Right now adding support for some Poco F1 phones that have an LCD panel
from Tianma connected with this IC, with a resolution of 1080x2246 that
operates in DSI video mode.
During testing, Benni
Some Poco F1 phones from Xiaomi have a FHD+ video mode panel based on the
Novatek NT36672A display controller; Add support for the same.
Most of the panel data is taken from downstream panel dts, and is converted to
drm-panel based driver by me.
It has been validated with v5.9-rc1 based drm-misc-
Novatek nt36672a is a display driver IC that can drive DSI panel. It
is also present in the Tianma video mode panel, which is a FHD+ panel
with a resolution of 1080x2246 and 6.18 inches size. It is found in
some of the Poco F1 phones.
This patch adds the display driver for the IC, with support add
On 29.08.2020 16:24, Krzysztof Kozlowski wrote:
> "gpios" property is deprecated. Update the Exynos5433 DTS to fix
> dtbs_checks warnings like:
>
>arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: i2c-gpio-0: 'sda-gpios'
> is a required property
>arch/arm64/boot/dts/exynos/exynos5433-t
Hi Sam,
On Sun, 30 Aug 2020 at 03:01, Sam Ravnborg wrote:
>
> Hi Sumit.
>
> On Wed, Aug 26, 2020 at 09:33:08PM +0530, Sumit Semwal wrote:
> > Novatek NT36672a is a generic DSI IC that drives command and video mode
> > panels. Add the driver for it.
> >
> > Right now adding support for some Poco
'--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Swapnil-Jakhade/drm-Add-support-for-Cadence-MHDP8546-DPI-DP-bridge-and-J721E-wrapper/20200831-162549
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.gi
On 29.08.2020 16:25, Krzysztof Kozlowski wrote:
> The Wolfson Arizona codec is interrupt controller which is required by
> bindings. This fixes dtbs_check warnings like:
>
>arch/arm64/boot/dts/exynos/exynos5433-tm2e.dt.yaml: wm5110-codec@0:
> 'interrupt-controller' is a required property
>
On Mon, Aug 31, 2020 at 01:46:28PM +0200, Hans de Goede wrote:
> Hi,
>
> On 8/31/20 1:10 PM, Thierry Reding wrote:
> > On Sun, Aug 30, 2020 at 02:57:42PM +0200, Hans de Goede wrote:
> > > Before this commit a suspend + resume of the LPSS PWM controller
> > > would result in the controller being re
On Mon, Aug 31, 2020 at 01:26:46PM +0200, Hans de Goede wrote:
> Hi,
>
> On 8/31/20 1:13 PM, Thierry Reding wrote:
> > On Sun, Aug 30, 2020 at 02:57:43PM +0200, Hans de Goede wrote:
> > > This commit removes a check where we would skip writing the ctrl register
> > > and then setting the update bi
On Mon, Aug 31, 2020 at 11:39:10AM +, Simon Ser wrote:
> On Saturday, August 29, 2020 4:06 PM, Sidong Yang wrote:
>
> > Currently vkms module doesn't support gamma function for userspace. so igt
> > subtests in kms_plane(pixel-format-pipe-A-plan) failed for calling
> > drmModeCrtcSetGamma().
On Mon, Aug 31, 2020 at 01:38:58PM +, Sidong Yang wrote:
> On Mon, Aug 31, 2020 at 11:39:10AM +, Simon Ser wrote:
> > On Saturday, August 29, 2020 4:06 PM, Sidong Yang
> > wrote:
> >
> > > Currently vkms module doesn't support gamma function for userspace. so igt
> > > subtests in kms_pl
On Mon, 31 Aug 2020 at 15:12, Marek Szyprowski wrote:
>
>
> On 29.08.2020 16:25, Krzysztof Kozlowski wrote:
> > The Wolfson Arizona codec is interrupt controller which is required by
> > bindings. This fixes dtbs_check warnings like:
> >
> >arch/arm64/boot/dts/exynos/exynos5433-tm2e.dt.yaml:
On Sat, Aug 29, 2020 at 5:21 AM Adam wrote:
>
>
> Hi All,
>
> I hope this is useful. Let me know if you would like me to test anything.
>
> Cheers,
>
> Adam
>
>
> [2.] Full description of the problem/report:
>
> X works but, 6 warnings triggered, in;
> drivers/gpu/drm/drm_modeset_lock.c:185
> driv
https://bugzilla.kernel.org/show_bug.cgi?id=208373
--- Comment #4 from Alex Deucher (alexdeuc...@gmail.com) ---
Google for "kernel git bisect howto"
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Hi James,
On Sun, Aug 23, 2020 at 03:53:50PM -0700, James Jones wrote:
> On 8/23/20 1:46 PM, Laurent Pinchart wrote:
> > On Sun, Aug 23, 2020 at 01:04:43PM -0700, James Jones wrote:
> >> On 8/20/20 1:15 AM, Ezequiel Garcia wrote:
> >>> On Mon, 2020-08-17 at 20:49 -0700, James Jones wrote:
> O
https://bugzilla.kernel.org/show_bug.cgi?id=209091
Bug ID: 209091
Summary: i915: drm:fw_domains_get [i915] *ERROR* render: timed
out waiting for forcewake ack request.
Product: Drivers
Version: 2.5
Kernel Version: 5.8.5
From: Tong Zhang
[ Upstream commit ed9ab229fea24cbcab17f484297dc8344afb7ea9 ]
core_link_read_dpcd returns only DC_OK(1) and DC_ERROR_UNEXPECTED(-1),
the caller should check error using DC_OK instead of checking against 0
Signed-off-by: Tong Zhang
Signed-off-by: Alex Deucher
Signed-off-by: Sas
From: Kalyan Thota
[ Upstream commit ccc862b957c6413b008fbe458034372847992d7f ]
In TEST_ONLY commit, rm global_state will duplicate the
object and request for new reservations, once they pass
then the new state will be swapped with the old and will
be available for the Atomic Commit.
This patch
From: Kalyan Thota
[ Upstream commit 4c978caf08aa155bdeadd9e2d4b026d4ce97ebd0 ]
Plane validation uses an API drm_calc_scale which will
return src/dst value as a scale ratio.
when viewing the range on a scale the values should fall in as
Upscale ratio < Unity scale < Downscale ratio for src/dst
From: Rob Clark
[ Upstream commit 35c719da95c0d28560bff7bafeaf07ebb212665e ]
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c:817 dpu_crtc_enable() error:
uninitialized symbol 'request_bandwidth'.
Reported-by: kernel test robot
Signed-off-by: Rob Clark
Reviewed-by: Sean Paul
Signed-off-by: Rob Cla
From: Krishna Manikandan
[ Upstream commit 9d5cbf5fe46e350715389d89d0c350d83289a102 ]
Define shutdown callback for display drm driver,
so as to disable all the CRTCS when shutdown
notification is received by the driver.
This change will turn off the timing engine so
that no display transactions
From: Tomi Valkeinen
[ Upstream commit 7fd5b25499bcec157dd4de9a713425efcf4571cd ]
After commit 92cc68e35863c1c61c449efa2b2daef6e9926048 ("drm/vblank: Use
spin_(un)lock_irq() in drm_crtc_vblank_on()") omapdrm locking is broken:
WARNING: inconsistent lock state
5.8.0-rc2-00483-g92cc68e35863 #13 T
From: Rob Clark
[ Upstream commit 43906812eaab06423f56af5cca9a9fcdbb4ac454 ]
This has roughly the same effect as drm_atomic_helper_wait_for_vblanks(),
basically just ensuring that vblank accounting is enabled so that we get
valid timestamp/seqn on pageflip events.
Signed-off-by: Rob Clark
Test
From: Jaehyun Chung
[ Upstream commit b61f05622ace5b9498ae279cdfd1c9f0c1ce3f75 ]
[Why]
Revert HDCP disable sequence change that blanks stream before
disabling HDCP. PSP and HW teams are currently investigating the
root cause of why HDCP cannot be disabled before stream blank,
which is expected t
From: Furquan Shaikh
[ Upstream commit 5896585512e5156482335e902f7c7393b940da51 ]
In `amdgpu_dm_update_backlight_caps()`, there is a local
`amdgpu_dm_backlight_caps` object that is filled in by
`amdgpu_acpi_get_backlight_caps()`. However, this object is
uninitialized before the call and hence th
From: Nicholas Kazlauskas
[ Upstream commit 168f09cdadbd547c2b202246ef9a8183da725f13 ]
[Why]
These aren't stable on some platform configurations when driving
multiple displays, especially on higher resolution.
In particular the delay in asserting p-state and validating from
x86 outweights any p
From: Dmitry Baryshkov
[ Upstream commit f5749d6181fa7df5ae741788e5d96f593d3a60b6 ]
New Qualcomm firmware has changed a way it reports back the 'started'
event. Support new register values.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Rob Clark
Signed-off-by: Sasha Levin
---
drivers/gpu/d
From: Brandon Syu
[ Upstream commit cba4b52e431e5de3d8012281cfe194f1c39a9052 ]
[Why]
When system enters s3/s0i3, backlight PWM would set user level.
[How]
ABM disable function add keep current gain to avoid it.
Signed-off-by: Brandon Syu
Reviewed-by: Josip Pavic
Acked-by: Eryk Brol
Signed-o
From: Krishna Manikandan
[ Upstream commit 9d5cbf5fe46e350715389d89d0c350d83289a102 ]
Define shutdown callback for display drm driver,
so as to disable all the CRTCS when shutdown
notification is received by the driver.
This change will turn off the timing engine so
that no display transactions
From: Samson Tam
[ Upstream commit efbde23a3b0164cef27fd394e7d548f46af5b51d ]
[Why]
dongle_type is set during dongle connection but for passive dongles,
dongle_type is not set. If user starts with an active dongle and
then switches to a passive dongle, it will still report as an active
dongle. T
From: Furquan Shaikh
[ Upstream commit 5896585512e5156482335e902f7c7393b940da51 ]
In `amdgpu_dm_update_backlight_caps()`, there is a local
`amdgpu_dm_backlight_caps` object that is filled in by
`amdgpu_acpi_get_backlight_caps()`. However, this object is
uninitialized before the call and hence th
From: Krishna Manikandan
[ Upstream commit 9d5cbf5fe46e350715389d89d0c350d83289a102 ]
Define shutdown callback for display drm driver,
so as to disable all the CRTCS when shutdown
notification is received by the driver.
This change will turn off the timing engine so
that no display transactions
From: Tomi Valkeinen
[ Upstream commit 7fd5b25499bcec157dd4de9a713425efcf4571cd ]
After commit 92cc68e35863c1c61c449efa2b2daef6e9926048 ("drm/vblank: Use
spin_(un)lock_irq() in drm_crtc_vblank_on()") omapdrm locking is broken:
WARNING: inconsistent lock state
5.8.0-rc2-00483-g92cc68e35863 #13 T
From: Dmitry Baryshkov
[ Upstream commit f5749d6181fa7df5ae741788e5d96f593d3a60b6 ]
New Qualcomm firmware has changed a way it reports back the 'started'
event. Support new register values.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Rob Clark
Signed-off-by: Sasha Levin
---
drivers/gpu/d
From: Dinghao Liu
[ Upstream commit b67a468a4ccef593cd8df6a02ba3d167b77f0c81 ]
When amdgpu_display_modeset_create_props() fails, state and
state->context should be freed to prevent memleak. It's the
same when amdgpu_dm_audio_init() fails.
Signed-off-by: Dinghao Liu
Signed-off-by: Alex Deucher
From: Wayne Lin
[ Upstream commit ef67d792a2fc578319399f605fbec2f99ecc06ea ]
[Why]
In dm_dp_aux_transfer() now, we forget to handle AUX_WR fail cases. We
suppose every write wil get done successfully and hence some AUX
commands might not sent out indeed.
[How]
Check if AUX_WR success. If not, r
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