Dave, Daniel.
Another one (the last for some time) of those pull requests that Linus probably
wants separate. The mm and ttm patches have been acked by the maintainers
for merge through drm, but see CAVEATS below:
CAVEATS:
- Patch 1/9 is trivial, but I can't get it acked or reviewed by fs peopl
Am 25.03.20 um 01:24 schrieb Shane Francis:
As dma_map_sg can reorganize scatter-gather lists in a
way that can cause some later segments to be empty we should
always use the sg_dma_len macro to fetch the actual length.
This could now be 0 and not need to be mapped to a page or
address array
Si
On Fri, Mar 20, 2020 at 8:01 PM Bartlomiej Zolnierkiewicz
wrote:
>
>
> On 3/10/20 3:35 AM, Chuhong Yuan wrote:
> > The driver forgets to free the I/O region in remove and probe
> > failure.
> > Add the missed calls to fix it.
> >
> > Signed-off-by: Chuhong Yuan
> > ---
> > Changes in v3:
> > -
From: Bogdan Togorean
For ADV7533 and ADV7535 low refresh rate is selected using
bits [3:2] of 0x4a main register.
So depending on ADV model write 0xfb or 0x4a register.
Fixes: 9c8af882bf12: ("drm: Add adv7511 encoder driver")
Signed-off-by: Bogdan Togorean
---
drivers/gpu/drm/bridge/adv7511/a
The driver forgets to free irq in remove which is requested in
probe.
Add the missed call to fix it.
Also, the position of request_irq() in probe should be put before
register_framebuffer().
Signed-off-by: Chuhong Yuan
---
Changes in v4:
- Use info->par->irq instead of par->irq to avoid derefer
Add binding document for the Chrontel CH7033 VGA/DVI/HDMI Encoder.
Signed-off-by: Lubomir Rintel
Reviewed-by: Rob Herring
---
Changes since v3:
- Fixed the example so that it validates
Changes since v1:
- Dual licensed with BSD-2-Clause
- Collected Rob's reviewed-by tag
.../display/bridge/ch
Creates entry for Synopsys DesignWare IPK MIPI DSI host driver and
adds myself as maintainer.
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: David Airlie
Cc: Daniel Vetter
Cc: Gustavo Pimentel
Cc: Joao Pinto
Signed-off-by: Angelo Ribeiro
---
MAINTAINERS | 8
1 file changed, 8 inserti
Quoting Mauro Carvalho Chehab (2020-02-22 01:00:03)
> Several references got broken due to txt to ReST conversion.
>
> Several of them can be automatically fixed with:
>
> scripts/documentation-file-ref-check --fix
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
> drivers/hwtracing/core
Add support for Synopsys DesignWare VPG (Video Pattern Generator) and
DRM driver for Synopsys DesignWare DSI Host IPK solution.
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: David Airlie
Cc: Daniel Vetter
Cc: Gustavo Pimentel
Cc: Joao Pinto
Signed-off-by: Angelo Ribeiro
---
drivers/gpu/drm/K
This patch series adds support for the display subsystem in the Synopsys
DesignWare IPK devices.
The display pipeline is limited and does not have access to memory, the
validation is done using a VPG (Video Pattern Generator), as DPI
stimulus for the DW MIPI DSI Host.
A Synopsys DesignWare MIPI D
On Mon, Mar 02, 2020 at 12:31:38PM +0200, Roman Stratiienko wrote:
> Allwinner display engine blender consists of 3 pipelined blending units.
>
> PIPE0->\
> BLD0-\
> PIPE1->/ BLD1-\
> PIPE2->--/ BLD2->OUT
> PIPE3->/
>
> This pipeline produces incorrect composition
Hi,
On Fri, Mar 20, 2020 at 12:21:31PM +0100, Pascal Roeleven wrote:
> This series add support for the Topwise A721 tablet and it's display.
> It is an old tablet (around 2012) but it might be useful as reference
> as the devicetree is pretty complete.
It looks good to me for the last 2 patches,
On Tue, Mar 24, 2020 at 08:27:12AM +0100, Christoph Hellwig wrote:
> On Mon, Mar 23, 2020 at 10:14:50PM -0300, Jason Gunthorpe wrote:
> > +enum {
> > + HMM_NEED_FAULT = 1 << 0,
> > + HMM_NEED_WRITE_FAULT = HMM_NEED_FAULT | (1 << 1),
> > + HMM_NEED_ALL_BITS = HMM_NEED_FAULT | HMM_NEED_WRITE_FA
On Tue, Mar 24, 2020 at 08:33:39AM +0100, Christoph Hellwig wrote:
> >
> > +/*
> > + * If the valid flag is masked off, and default_flags doesn't set valid,
> > then
> > + * hmm_pte_need_fault() always returns 0.
> > + */
> > +static bool hmm_can_fault(struct hmm_range *range)
> > +{
> > + ret
Chrontel makes encoders for video displays and perhaps other stuff.
Their web site is http://www.chrontel.com/.
Signed-off-by: Lubomir Rintel
Acked-by: Rob Herring
---
Changes since v1:
- Collect Rob's ack
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insert
The driver calls register_framebuffer() in probe but does not call
unregister_framebuffer() in remove.
Rename current remove to __s1d13xxxfb_remove() for error handler.
Then add a new remove to call unregister_framebuffer().
Signed-off-by: Chuhong Yuan
---
Changes in v3:
- Fix code style.
- S
Hi!
Dne ponedeljek, 02. marec 2020 ob 11:31:37 CET je Roman Stratiienko
napisal(a):
> Argument:
>
> All information below is author's understanding of underlying processes.
> This information was obtained from DE2.0-3.0 datasheet analysis and
> analysis of different DRM driver source code and co
Hi,
chained to this message is another spin of a driver for CH7033.
Only cosmetic changes since the previous version [1]. Please take a look.
[1] https://lore.kernel.org/lkml/20200314101627.336939-1-lkund...@v3.sk/
Thanks,
Lubo
___
dri-devel maili
This is a driver for video encoder with VGA and DVI/HDMI outputs.
There is no documentation for the chip -- the operation was guessed from
what was sniffed on a Dell Wyse 3020 ThinOS terminal, the register names
come from the ch7035 driver in Mediatek's GPL code dump.
Only bare minimum is impleme
This change adds support to configure dspp blocks in
the dpu driver.
Macro description of the changes coming in this patch.
1) Add dspp definitions in the hw catalog.
2) Add capability to reserve dspp blocks in the display data path.
3) Attach the reserved block to the encoder.
Signed-off-by: Kal
From: Bogdan Togorean
ADV7511 support sample rates up to 192kHz. CTS and N parameters should
be computed accordingly so this commit extend the list up to maximum
supported sample rate.
Signed-off-by: Bogdan Togorean
---
drivers/gpu/drm/bridge/adv7511/adv7511_audio.c | 12
1 file c
This change adds support for color correction sub block
for SC7180 device.
Signed-off-by: Kalyan Thota
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 77 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 9 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c| 49
The conversion to bool is not needed, remove it.
Signed-off-by: Chen Zhou
---
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index 0995378..20f10a5 100644
---
Hi!
Dne ponedeljek, 02. marec 2020 ob 11:31:38 CET je Roman Stratiienko
napisal(a):
> Allwinner display engine blender consists of 3 pipelined blending units.
>
> PIPE0->\
> BLD0-\
> PIPE1->/ BLD1-\
> PIPE2->--/ BLD2->OUT
> PIPE3->/
>
> This pipeline produces i
From: Bogdan Togorean
ADV7511 support I2S or SPDIF as audio input interfaces. This commit
enable support for SPDIF.
Signed-off-by: Bogdan Togorean
Reviewed-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/adv7511/adv7511_audio.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/
Add dt-bindings for Synopsys DesignWare MIPI DSI Host and VPG (Video
Pattern Generator) support in the IPK display subsystem.
The Synopsys DesignWare IPK display video pipeline is composed by a DSI
controller (snps,dw-ipk-dsi) and a VPG (snps,dw-ipk-vpg) as DPI
stimulus. Typically is used the Rasp
On Tue, Mar 24, 2020 at 08:37:46AM +0100, Christoph Hellwig wrote:
> On Mon, Mar 23, 2020 at 10:14:55PM -0300, Jason Gunthorpe wrote:
> > if (pte_none(pte)) {
> > required_fault = hmm_pte_need_fault(hmm_vma_walk, orig_pfn, 0);
> > if (required_fault)
> >
Add Synopsys DesignWare IPK specific extensions for Synopsys DesignWare
MIPI DSI Host driver.
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: David Airlie
Cc: Daniel Vetter
Cc: Gustavo Pimentel
Cc: Joao Pinto
Signed-off-by: Angelo Ribeiro
---
drivers/gpu/drm/ipk/Kconfig | 9 +
driv
Add bindings documentation for BOE TV105WUM-NW0 10.5" WUXGA TFT LCD
panel.
Signed-off-by: David Lu
Change-Id: I450c0e52aae080728d4794bdffc50bb0d2f39f40
---
.../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicet
Add entries for BOE TV105WUM-NW0 10.5" WUXGA TFT LCD panel.
Signed-off-by: David Lu
Change-Id: I5b1cef259de5fb498220dcc47baa035083c41667
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv10
Amlogic uses a proprietary lossless image compression protocol and format
for their hardware video codec accelerators, either video decoders or
video input encoders.
An option exist changing the layout superblock size to save memory when
using 8bit components pixels size.
The layout options start
Since the VD1 Amlogic FBC decoder is now configured by the overlay driver,
commit the right registers to decode the Amlogic FBC frame.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_crtc.c | 118 +
1 file changed, 88 insertions(
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use
a different superblock size for the Memory Saving mode.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_overlay.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
dif
On 24/03/2020 15:20, Neil Armstrong wrote:
> Amlogic uses a proprietary lossless image compression protocol and format
> for their hardware video codec accelerators, either video decoders or
> video input encoders.
>
> It considerably reduces memory bandwidth while writing and reading
> frames in
Setup the Amlogic FBC decoder for the VD1 video overlay plane.
The VD1 Amlogic FBC decoder is integrated in the pipeline like the
YUV pixel reading/formatter but used a direct memory address instead.
This adds support for the basic layout, and needs to calculate the content
body size since the he
Amlogic uses a proprietary lossless image compression protocol and format
for their hardware video codec accelerators, either video decoders or
video input encoders.
This introduces the Scatter Memory layout, means the header contains IOMMU
references to the compressed frames content to optimize m
Amlogic uses a proprietary lossless image compression protocol and format
for their hardware video codec accelerators, either video decoders or
video input encoders.
It considerably reduces memory bandwidth while writing and reading
frames in memory.
The underlying storage is considered to be 3 c
Add the registers of the VPU VD1 Amlogic FBC decoder module, and routing
register.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_registers.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/meson/meson_registers.
Amlogic uses a proprietary lossless image compression protocol and format
for their hardware video codec accelerators, either video decoders or
video input encoders.
It considerably reduces memory bandwidth while writing and reading
frames in memory.
The underlying storage is considered to be 3 c
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use
read the FBC header as Scatter Memory layout reference.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_overlay.c | 48 +--
1 file changed, 31 insertions(+), 17 del
On Wednesday, March 25, 2020 9:50 AM, Neil Armstrong
wrote:
> Amlogic uses a proprietary lossless image compression protocol and format
> for their hardware video codec accelerators, either video decoders or
> video input encoders.
>
> This introduces the Scatter Memory layout, means the header
On Tue, Mar 24, 2020 at 10:36 PM Sam Ravnborg wrote:
>
> On Mon, Mar 23, 2020 at 03:49:21PM +0100, Daniel Vetter wrote:
> > The cleanup here is somewhat tricky, since we can't tell apart the
> > allocated minor index from 0. So register a cleanup action first, and
> > if the index allocation fails
This patch set is to fix a bug in amdgpu / radeon drm that results in
a crash when dma_map_sg combines elemnets within a scatterlist table.
There are 2 shortfalls in the current kernel.
1) AMDGPU / RADEON assumes that the requested and created scatterlist
table lengths using from dma_map_sg a
As dma_map_sg can reorganize scatter-gather lists in a
way that can cause some later segments to be empty we should
always use the sg_dma_len macro to fetch the actual length.
This could now be 0 and not need to be mapped to a page or
address array
Signed-off-by: Shane Francis
---
drivers/gpu/d
Calls to dma_map_sg may return segments / entries than requested
if they fall on page bounderies. The old implementation did not
support this use case.
Signed-off-by: Shane Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dri
Calls to dma_map_sg may return segments / entries than requested
if they fall on page bounderies. The old implementation did not
support this use case.
Signed-off-by: Shane Francis
---
drivers/gpu/drm/radeon/radeon_ttm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
On Tue, Mar 24, 2020 at 10:42 PM Sam Ravnborg wrote:
>
> On Tue, Mar 24, 2020 at 09:39:36PM +0100, Daniel Vetter wrote:
> > The cleanup here is somewhat tricky, since we can't tell apart the
> > allocated minor index from 0. So register a cleanup action first, and
> > if the index allocation fails
Hi,
On 25/03/2020 10:04, Simon Ser wrote:
> On Wednesday, March 25, 2020 9:50 AM, Neil Armstrong
> wrote:
>
>> Amlogic uses a proprietary lossless image compression protocol and format
>> for their hardware video codec accelerators, either video decoders or
>> video input encoders.
>>
>> This i
This patch makes the virtio-video driver use virtio objects as DMA buffers.
So, users will beable to import resources exported by other virtio devices
such as virtio-gpu.
Currently, we assumes that only one virtio object for each v4l2_buffer
format even if it's for a multiplanar format.
Signed-of
In the old txt situation we add/describe only properties that are used
by the driver/hardware itself. With yaml it also filters things in a
node that are used by other drivers like 'assigned-clocks' and
'assigned-clock-rates' for rk3399 and 'power-domains' for most
Rockchip Socs in 'vop' nodes, so
This implements a feature in virtio-video driver to use exported virtio
objects as video buffers. So, the users will be able to use resources
allocated by other virtio devices such as virtio-gpu.
The virtio protocol for this feature is proposed by [1].
This commit depends on the following unmerge
Current dts files with 'vop' nodes are manually verified.
In order to automate this process rockchip-vop.txt
has to be converted to yaml.
Signed-off-by: Johan Jonker
---
Changes v4:
Change description
Replace compatible oneOf by enum
Change interrupts description
Remove resets minItems
C
Hi,
On 25/02/2020 01:20, Sebastian Reichel wrote:
From: Sebastian Reichel
This reverts commit 4ff8e98879e6eeae9d125dfcf3b642075d00089d.
---
drivers/gpu/drm/omapdrm/dss/base.c | 26 +++
drivers/gpu/drm/omapdrm/dss/omapdss.h | 6
drivers/gpu/drm/omapdrm/omap_encoder.c
On 25/02/2020 01:20, Sebastian Reichel wrote:
The panel-dsi-cm's ddata->pin_config is always NULL, so this
callback is never called. Instead the DSI encoder gets the pin
configuration directly from DT.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 11 -
On 25/02/2020 01:20, Sebastian Reichel wrote:
This updates the existing omapdrm DSI code, so that it uses
common drm_mipi_dsi API and drm_panel.
The patchset has been tested with Droid 4 using Linux console, X.org and
Weston. The patchset is based on Laurent Pinchartl's patch series [0]
and remo
Hi Tomi,
On Wed, Mar 25, 2020 at 02:47:48PM +0200, Tomi Valkeinen wrote:
> On 25/02/2020 01:20, Sebastian Reichel wrote:
> > This updates the existing omapdrm DSI code, so that it uses
> > common drm_mipi_dsi API and drm_panel.
> >
> > The patchset has been tested with Droid 4 using Linux console
On 25/02/2020 01:20, Sebastian Reichel wrote:
This replaces OMAP specific enum for pixel format with
common implementation.
Signed-off-by: Sebastian Reichel
---
.../gpu/drm/omapdrm/displays/panel-dsi-cm.c | 2 +-
drivers/gpu/drm/omapdrm/dss/dsi.c | 49 +++
dri
On 25/02/2020 01:20, Sebastian Reichel wrote:
The write buffers are not modified, so they can be constant.
Signed-off-by: Sebastian Reichel
---
drivers/gpu/drm/omapdrm/dss/dsi.c | 24
drivers/gpu/drm/omapdrm/dss/omapdss.h | 10 +-
2 files changed, 17 ins
>-Original Message-
>From: dri-devel On Behalf Of
>Shane Francis
>Sent: Wednesday, March 25, 2020 5:08 AM
>To: dri-devel@lists.freedesktop.org
>Cc: airl...@linux.ie; linux-ker...@vger.kernel.org; bigbeesh...@gmail.com;
>amd-gfx-requ...@lists.freedesktop.org; alexander.deuc...@amd.com;
>chr
On 25/02/2020 01:20, Sebastian Reichel wrote:
This prepares the driver for becoming a mipi_dsi_host implementation,
which provides a generic transfer function instead of all kind of
different read/write functions. The implementation will become more
elegant after unexporting the specific function
On Wed, 25 Mar 2020 11:24:15 +0100
Neil Armstrong wrote:
> Hi,
>
> On 25/03/2020 10:04, Simon Ser wrote:
> > On Wednesday, March 25, 2020 9:50 AM, Neil Armstrong
> > wrote:
> >
> >> Amlogic uses a proprietary lossless image compression protocol and format
> >> for their hardware video codec
>-Original Message-
>From: dri-devel On Behalf Of
>Shane Francis
>Sent: Wednesday, March 25, 2020 5:08 AM
>To: dri-devel@lists.freedesktop.org
>Cc: airl...@linux.ie; linux-ker...@vger.kernel.org; bigbeesh...@gmail.com;
>amd-gfx-requ...@lists.freedesktop.org; alexander.deuc...@amd.com;
>chr
>-Original Message-
>From: dri-devel On Behalf Of
>Shane Francis
>Sent: Wednesday, March 25, 2020 5:08 AM
>To: dri-devel@lists.freedesktop.org
>Cc: airl...@linux.ie; linux-ker...@vger.kernel.org; bigbeesh...@gmail.com;
>amd-gfx-requ...@lists.freedesktop.org; alexander.deuc...@amd.com;
>chr
>-Original Message-
>From: dri-devel On Behalf Of
>Shane Francis
>Sent: Wednesday, March 25, 2020 5:08 AM
>To: dri-devel@lists.freedesktop.org
>Cc: airl...@linux.ie; linux-ker...@vger.kernel.org; bigbeesh...@gmail.com;
>amd-gfx-requ...@lists.freedesktop.org; alexander.deuc...@amd.com;
>chr
The vboxvideo driver is missing a call to remove conflicting framebuffers.
Surprisingly, when using legacy BIOS booting this does not really cause
any issues. But when using UEFI to boot the VM then plymouth will draw
on both the efifb /dev/fb0 and /dev/drm/card0 (which has registered
/dev/fb1 as
On Mon, Mar 23, 2020 at 11:16:56PM +0530, Kiran Gunda wrote:
> Add wled_cabc_config, wled_sync_toggle, wled_ovp_fault_status
> and wled_ovp_delay callback functions to prepare the driver for
> adding WLED5 support.
>
> wled_cabc_config() ===> Used to configure the cabc register.
>
invalidate_caches is actually not used, so clean it up.
Signed-off-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 6 --
drivers/gpu/drm/nouveau/nouveau_bo.c | 7 ---
drivers/gpu/drm/qxl/qxl_ttm.c | 6 --
drivers/gpu/drm/radeon/radeon_ttm.c
On Mon, Mar 23, 2020 at 11:16:57PM +0530, Kiran Gunda wrote:
> Add WLED5 specific bindings.
>
> Signed-off-by: Kiran Gunda
> Signed-off-by: Subbaraman Narayanamurthy
> ---
> .../bindings/leds/backlight/qcom-wled.yaml | 39
> ++
> 1 file changed, 39 insertions(+)
>
Stephen Boyd 於 2020年3月21日 週六 上午7:14寫道：
>
> Quoting Enric Balletbo i Serra (2020-03-11 09:53:20)
> > From: Matthias Brugger
> >
> > There is no strong reason for this to use CLK_OF_DECLARE instead of
> > being a platform driver. Plus, MMSYS provides clocks but also a shared
> > register space for
On Tue, Mar 24, 2020 at 7:35 AM Doug Anderson wrote:
>
> Hi,
>
> On Sun, Mar 22, 2020 at 11:14 PM Kalyan Thota wrote:
> >
> > "The PM core always increments the runtime usage counter
> > before calling the ->suspend() callback and decrements it
> > after calling the ->resume() callback"
> >
> > D
Hi,
On Wed, Mar 25, 2020 at 8:40 AM Rob Clark wrote:
>
> On Tue, Mar 24, 2020 at 7:35 AM Doug Anderson wrote:
> >
> > Hi,
> >
> > On Sun, Mar 22, 2020 at 11:14 PM Kalyan Thota
> > wrote:
> > >
> > > "The PM core always increments the runtime usage counter
> > > before calling the ->suspend() c
On Tue, Mar 24, 2020 at 9:14 PM Masahiro Yamada wrote:
>
> On Wed, Mar 25, 2020 at 4:42 AM Alex Deucher wrote:
> >
> > On Tue, Mar 24, 2020 at 12:48 PM Masahiro Yamada
> > wrote:
> > >
> > > Hi,
> > >
> > > I think this series is a good clean-up.
> > >
> > > Could you take a look at this please
> >-Original Message-
> >From: dri-devel On Behalf Of
> >Shane Francis
> >Sent: Wednesday, March 25, 2020 5:08 AM
> >To: dri-devel@lists.freedesktop.org
> >Cc: airl...@linux.ie; linux-ker...@vger.kernel.org; bigbeesh...@gmail.com;
> >amd-gfx-requ...@lists.freedesktop.org; alexander.deuc...
On Wed, Mar 25, 2020 at 11:54 AM Shane Francis wrote:
>
> > >-Original Message-
> > >From: dri-devel On Behalf Of
> > >Shane Francis
> > >Sent: Wednesday, March 25, 2020 5:08 AM
> > >To: dri-devel@lists.freedesktop.org
> > >Cc: airl...@linux.ie; linux-ker...@vger.kernel.org; bigbeesh...@g
Hi,
On 25/03/2020 14:49, Pekka Paalanen wrote:
> On Wed, 25 Mar 2020 11:24:15 +0100
> Neil Armstrong wrote:
>
>> Hi,
>>
>> On 25/03/2020 10:04, Simon Ser wrote:
>>> On Wednesday, March 25, 2020 9:50 AM, Neil Armstrong
>>> wrote:
>>>
Amlogic uses a proprietary lossless image compression
Am 25.03.20 um 16:34 schrieb Huang Rui:
invalidate_caches is actually not used, so clean it up.
Signed-off-by: Huang Rui
Already had the same patch around for a while, looks like I've just
forgot to commit it.
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
On Wed, Mar 25, 2020 at 1:20 PM Christian König
wrote:
>
> Am 25.03.20 um 16:34 schrieb Huang Rui:
> > invalidate_caches is actually not used, so clean it up.
> >
> > Signed-off-by: Huang Rui
>
> Already had the same patch around for a while, looks like I've just
> forgot to commit it.
>
> Review
Am 25.03.20 um 18:27 schrieb Alex Deucher:
On Wed, Mar 25, 2020 at 1:20 PM Christian König
wrote:
Am 25.03.20 um 16:34 schrieb Huang Rui:
invalidate_caches is actually not used, so clean it up.
Signed-off-by: Huang Rui
Already had the same patch around for a while, looks like I've just
forg
On Wed, Mar 25, 2020 at 4:17 AM Chen Zhou wrote:
>
> The conversion to bool is not needed, remove it.
>
> Signed-off-by: Chen Zhou
Applied. Thanks!
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/
On Mon, 23 Mar 2020, Daniel Vetter wrote:
> For two reasons:
>
> - The driver core clears this already for us after we're unloaded in
> __device_release_driver().
>
> - It's way too late, the drm_device ->release callback might massively
> outlive the underlying physical device, since a drm_de
On Tue, Mar 24, 2020 at 8:54 AM Geert Uytterhoeven
wrote:
>
> Improve the help text for the CONFIG_DMABUF_MOVE_NOTIFY symbol by:
> 1. Removing duplicated single quotes,
> 2. Adding a missing subject,
> 3. Fixing a misspelling of "yet",
> 4. Wrapping long lines.
>
> Fixes: bb42df4662a44765
On Tue, Mar 17, 2020 at 09:25:33AM -0400, Harry Wentland wrote:
>
>
> On 2020-03-17 5:08 a.m., Simon Ser wrote:
> > On Thursday, March 12, 2020 3:43 PM, Harry Wentland
> > wrote:
> >
> >> Not the main VRR expert and we're still discussing this internally but I
> >> think it'll very much depend
On Wed, Mar 18, 2020 at 11:10 AM Jagan Teki wrote:
>
> Convert the sitronix,st7701 panel bindings to DT schema.
>
> Signed-off-by: Jagan Teki
> ---
> Changes for v2:
> - fix dt_binding_check
>
> .../display/panel/sitronix,st7701.txt | 30
> .../display/panel/sitronix,st7701.yaml
From: Thierry Reding
Tegra124 and Tegra210 support addressing more than 32 bits of physical
memory. However, since their host1x does not support the wide GATHER
opcode, they should use the SMMU if at all possible to ensure that all
the system memory can be used for command buffers, irrespective o
From: Thierry Reding
When testing whether or not to enable the use of the SMMU, consult the
supported DMA mask rather than the actually configured DMA mask, since
the latter might already have been restricted.
Fixes: 2d9384ff9177 ("drm/tegra: Relax IOMMU usage criteria on old Tegra")
Signed-off-
On 25/03/2020 20:16, Thierry Reding wrote:
> From: Thierry Reding
>
> When testing whether or not to enable the use of the SMMU, consult the
> supported DMA mask rather than the actually configured DMA mask, since
> the latter might already have been restricted.
>
> Fixes: 2d9384ff9177 ("drm/t
On 25/03/2020 20:16, Thierry Reding wrote:
> From: Thierry Reding
>
> Tegra124 and Tegra210 support addressing more than 32 bits of physical
> memory. However, since their host1x does not support the wide GATHER
> opcode, they should use the SMMU if at all possible to ensure that all
> the syst
On Wed, Mar 25, 2020 at 8:41 AM Gurchetan Singh
wrote:
>
> For 3D buffers, virtio_gpu_gem_object_open notifies.
> We can have the same behavior for dumb buffer. We just
> need to make sure the first open notifies the host for
> dumb buffers.
virtio_gpu_notify is cheap and does not kick unless the
Setting 'additionalProperties: false' is frequently omitted, but is
important in order to check that there aren't extra undocumented
properties in a binding.
Ideally, we'd just add this automatically and make this the default, but
there's some cases where it doesn't work. For example, if a common
The regex for child nodes doesn't match the example. This wasn't flagged
with 'additionalProperties: false' missing. The child node schema was also
incorrect with 'ranges' property as it applies to child nodes and should
be moved up to the parent node.
Fixes: 957fd69d396b ("dt-bindings: soc: qcom:
Numerous schemas are missing 'additionalProperties: false' statements which
ensures a binding doesn't have any extra undocumented properties or child
nodes. Fixing this reveals various missing properties, so let's fix all
those occurrences.
Cc: Stephen Boyd
Cc: Linus Walleij
Cc: Bartosz Golaszew
Setting 'additionalProperties: false' is frequently omitted, but is
important in order to check that there aren't extra undocumented
properties in a binding.
This series is a bunch of fixes in patches 1-3 found by setting
'additionalProperties: false' and then patch 4 sets additionalProperties
on
The 'adi,adxl345' definition is a duplicate as there's a full binding in:
Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml
The trivial-devices binding doesn't capture that 'adi,adxl346' has a
fallback compatible 'adi,adxl345', so let's add it to adi,adxl345.yaml.
Cc: Michael Hennerich
On Wed, Mar 25, 2020 at 04:05:41PM -0600, Rob Herring wrote:
> Setting 'additionalProperties: false' is frequently omitted, but is
> important in order to check that there aren't extra undocumented
> properties in a binding.
>
> Ideally, we'd just add this automatically and make this the default,
https://bugzilla.kernel.org/show_bug.cgi?id=206021
--- Comment #6 from Clément Guérin (li...@protonmail.com) ---
Is anyone looking at this? I can still reproduce the bug 100%.
--
You are receiving this mail because:
You are watching the assignee of the bug.
__
Hi, Enric:
On Wed, 2020-02-26 at 12:27 +0100, Enric Balletbo i Serra wrote:
> Equivalent information can be nowadays obtained using function tracer.
>
Acked-by: CK Hu
> Signed-off-by: Enric Balletbo i Serra
> ---
>
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 5 -
> drivers/gpu/drm/media
Hi, Enric:
On Wed, 2020-02-26 at 12:27 +0100, Enric Balletbo i Serra wrote:
> Equivalent information can be nowadays obtained using function tracer.
>
> Signed-off-by: Enric Balletbo i Serra
> ---
Acked-by: CK Hu
>
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 5 -
> drivers/gpu/drm/media
For 3D buffers, virtio_gpu_gem_object_open notifies.
We can have the same behavior for dumb buffer.
v2: virtio_gpu_gem_object_open always notifies
v3: avoid boolean variable
Signed-off-by: Gurchetan Singh
---
drivers/gpu/drm/virtio/virtgpu_gem.c| 3 ++-
drivers/gpu/drm/virtio/virtgpu_object
Hi, Matthias:
On Wed, 2020-03-25 at 17:16 +0100, Matthias Brugger wrote:
>
> On 11/03/2020 17:53, Enric Balletbo i Serra wrote:
> > Provide a mtk_mmsys_ddp_connect() and mtk_mmsys_disconnect() functions to
> > replace mtk_ddp_add_comp_to_path() and mtk_ddp_remove_comp_from_path().
> > Those funct
On Thu, Mar 26, 2020 at 7:10 AM Gurchetan Singh
wrote:
>
> For 3D buffers, virtio_gpu_gem_object_open notifies.
> We can have the same behavior for dumb buffer.
>
> v2: virtio_gpu_gem_object_open always notifies
> v3: avoid boolean variable
Series is
Reviewed-by: Chia-I Wu
>
> Signed-off-by: Gu
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