Hi,
> There's similar code in udl, [1] which still uses writecombine for
> imported buffers. Virtio does not need this?
virtio doesn't support dma-buf imports (yet).
So no worries for now.
Why pick writecombine for the imported buffer btw?
It'll probably be correct for the majority of imports,
v2: make shmem helper caching configurable.
Gerd Hoffmann (2):
drm/shmem: add support for per object caching attributes
drm/virtio: fix mmap page attributes
include/drm/drm_gem_shmem_helper.h | 12
drivers/gpu/drm/drm_gem_shmem_helper.c | 24 +---
drive
virtio-gpu uses cached mappings, set shmem->caching accordingly.
Reported-by: Gurchetan Singh
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_object.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/virtio/virtgpu_object.c
b/drivers/gpu/drm/virtio/virtgpu_ob
Add caching field to drm_gem_shmem_object to specify the cachine
attributes for mappings. Add helper function to tweak pgprot
accordingly. Switch vmap and mmap functions to the new helper.
Set caching to write-combine when creating the object so behavior
doesn't change by default. Drivers can o
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_plane.c | 31 ++
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c
b/drivers/gpu/drm/virtio/virtgpu_plane.c
index bc4bc4475a8c..a0f91658c2bc 100644
--- a/d
Gerd Hoffmann (3):
drm/virtio: skip set_scanout if framebuffer didn't change
virtio-gpu: batch display update commands.
virtio-gpu: use damage info for display updates.
drivers/gpu/drm/virtio/virtgpu_drv.h | 6 ++
drivers/gpu/drm/virtio/virtgpu_plane.c | 76 +++---
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_plane.c | 41 +++---
1 file changed, 24 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c
b/drivers/gpu/drm/virtio/virtgpu_plane.c
index 2e0d14e005db..1a0fbbb91ec7 100644
--- a/d
When the driver submits multiple commands in a row it makes sense to
notify the host only after submitting the last one, so the host can
process them all at once, with a single vmexit.
Add functions to enable/disable notifications to allow that. Use the
new functions for primary plane updates.
S
Daniel Vetter 于2019年12月10日周二 下午6:41写道:
> On Tue, Dec 10, 2019 at 04:36:29PM +0800, Kevin Tang wrote:
> > From: Kevin Tang
> >
> > Adds drm support for the Unisoc's display subsystem.
> >
> > This is drm device and gem driver. This driver provides support for the
> > Direct Rendering Infrastructu
ping ...
On Tue, Nov 26, 2019 at 11:50 AM Navid Emamdoost
wrote:
>
> ping...
>
> On Thu, Nov 21, 2019 at 12:09 PM Navid Emamdoost
> wrote:
> >
> > On Mon, Oct 21, 2019 at 4:14 PM Navid Emamdoost
> > wrote:
> > >
> > > In the implementation of nouveau_bo_alloc() if it fails to determine the
> >
On Mon, Dec 9, 2019 at 10:53 PM Laurent Pinchart
wrote:
Hi Laurent,
> How about converting this to yaml bindings already ? It's fairly simple
> and gives you DT validation.
>
Added in
https://lore.kernel.org/lkml/20191211061911.238393-1-hsi...@chromium.org/T/#m183b3822bf60101666436b0244b27275c67
On Mon, Dec 9, 2019 at 11:32 PM Laurent Pinchart
wrote:
>
Hi Laurent,
> You may have used a proportional font when writing this, the | doesn't
> align with anything using a fixed font. Do I assume correctly that the
> hardware multiplexer is actually a demultiplexer with one input and two
> output
Reviewed-by: Thomas Anderson
On Wed, Sep 25, 2019 at 04:55:00PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add a second table to the cea modes with VIC >= 193.
>
> Cc: Hans Verkuil
> Cc: Shashank Sharma
> Signed-off-by: Ville Syrjälä
> Reviewed-by: Manasi Navare
> ---
> drivers
On 02.12.19 20:35, Guido Günther wrote:
> This adds initial support for the NWL MIPI DSI Host controller found on
> i.MX8 SoCs.
>
> It adds support for the i.MX8MQ but the same IP can be found on
> e.g. the i.MX8QXP.
>
> It has been tested on the Librem 5 devkit using mxsfb.
>
> Signed-off-by: G
Hello Jani,
On 2019-12-09 15:03, Jani Nikula wrote:
On Tue, 03 Dec 2019, Jani Nikula wrote:
Now that the fbops member of struct fb_info is const, we can start
making the ops const as well.
Cc: Miguel Ojeda Sandonis
Cc: Robin van der Gracht
Reviewed-by: Daniel Vetter
Reviewed-by: Miguel Oje
The LCD controller in the JZ4770 supports up to 720p. While there has
been many new features added since the old JZ4740, which are not yet
handled here, this driver still works fine.
v2: No change
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 7 +++
1 file changed
From: Nicolas Boichat
Add bindings for Generic GPIO mux driver.
Signed-off-by: Nicolas Boichat
Signed-off-by: Hsin-Yi Wang
---
Change from RFC to v1:
- txt to yaml
---
.../bindings/display/bridge/gpio-mux.yaml | 89 +++
1 file changed, 89 insertions(+)
create mode 100644
Hello,
syzbot found the following crash on:
HEAD commit:6794862a Merge tag 'for-5.5-rc1-kconfig-tag' of git://git...
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=17f407f2e0
kernel config: https://syzkaller.appspot.com/x/.config?x=79f79de2a27d3e3d
da
While the LCD controller can effectively only support a maximum
resolution of 800x600, the framebuffer's height can be much higher,
since we can change the Y start offset.
v2: No change
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 2 +-
1 file changed, 1 insertion(+)
On Tue, Dec 03, 2019 at 02:53:12PM +0200, Ville Syrjälä wrote:
> On Mon, Dec 02, 2019 at 03:32:46PM -0800, Tom Anderson wrote:
> > On Mon, Nov 25, 2019 at 01:42:00PM -0500, Bhawanpreet Lakha wrote:
> > > Reviewed-by: Bhawanpreet Lakha
> >
> > Thank you for the review. +Ville has brought to my att
On Tue, Dec 10, 2019 at 10:05:55PM +0200, Ville Syrjälä wrote:
> On Tue, Dec 10, 2019 at 11:13:35AM -0800, Tom Anderson wrote:
> > On Tue, Dec 03, 2019 at 02:53:12PM +0200, Ville Syrjälä wrote:
> > > On Mon, Dec 02, 2019 at 03:32:46PM -0800, Tom Anderson wrote:
> > > > On Mon, Nov 25, 2019 at 01:42
Doubled system clock should be used as pixel cock source only if this
is supported. This is emphasized by the value of
atmel_hlcdc_crtc::dc::desc::fixed_clksrc.
Fixes: a6eca2abdd42 ("drm: atmel-hlcdc: add config option for clock selection")
Signed-off-by: Claudiu Beznea
---
drivers/gpu/drm/atmel
From: Nicolas Boichat
This driver supports single input, 2 output display mux (e.g.
HDMI mux), that provide its status via a GPIO.
Signed-off-by: Nicolas Boichat
Signed-off-by: Hsin-Yi Wang
---
drivers/gpu/drm/bridge/Kconfig| 10 +
drivers/gpu/drm/bridge/Makefile | 1
For HLCDC timing engine configurations bit ATMEL_HLCDC_SIP of
ATMEL_HLCDC_SR needs to checked if it is equal with zero before applying
new configuration to timing engine. In case of timeout there is no
indicator about this, so, return with error in case of timeout in
regmap_atmel_hlcdc_reg_write()
Hi,
I have few fixes for atmel-hlcdc driver in this series as well
as two reverts.
Revert "drm: atmel-hlcdc: enable sys_clk during initalization." is
due to the fix in in patch 2/5.
Thank you,
Claudiu Beznea
Claudiu Beznea (5):
drm: atmel-hlcdc: use double rate for pixel clock only if supporte
On 2019-12-10 14:24, Claudiu Beznea wrote:
> This reverts commit f6f7ad3234613f6f7f27c25036aaf078de07e9b0.
> ("drm/atmel-hlcdc: allow selecting a higher pixel-clock than requested")
> because allowing selecting a higher pixel clock may overclock
> LCD devices, not all of them being capable of this.
syzbot has bisected this bug to:
commit 2de50e9674fc4ca3c6174b04477f69eb26b4ee31
Author: Russell Currey
Date: Mon Feb 8 04:08:20 2016 +
powerpc/powernv: Remove support for p5ioc2
bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=16af042ae0
start commit: 9455d25f Merg
This reverts commit d2c755e66617620b729041c625a6396c81d1231c.
("drm: atmel-hlcdc: enable sys_clk during initalization."). With
commit "drm: atmel-hlcdc: enable clock before configuring timing engine"
there is no need for this patch. Code is also simpler.
Cc: Sandeep Sheriker Mallikarjun
Signed-of
Hi Jani
Thanks for your help and I will follow your suggestion to modify the patch.
-Original Message-
From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
Sent: Tuesday, December 10, 2019 7:10 PM
To: Allen Chen (陳柏宇)
Cc: Jau-Chih Tseng (曾昭智); Maxime Ripard; Allen Chen (陳柏宇); open list
10.12.2019 08:53, allen пишет:
> This reverts commit 9a42c7c647a9ad0f7ebb147a52eda3dcb7c84292.
Commit messsage must explain reason of the changes made in the patch.
> Signed-off-by: Allen Chen
> ---
> drivers/gpu/drm/drm_dp_helper.c | 128 ++
> drivers/gpu/drm/tegra/Makefile | 1 -
> dri
Hello,
syzbot found the following crash on:
HEAD commit:6794862a Merge tag 'for-5.5-rc1-kconfig-tag' of git://git...
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=1574aaeae0
kernel config: https://syzkaller.appspot.com/x/.config?x=79f79de2a27d3e3d
da
Reviewed-by: Thomas Anderson
On Wed, Sep 25, 2019 at 04:55:02PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We depend on a specific relationship between the VIC number and the
> index in the CEA mode arrays. Assert that the arrays have the excpected
> size to make sure we've not accid
Some variables are set but never used. To avoid warning when compiling
with W=1 and keep the algorithm like it is tag theses variables
with _maybe_unused macro.
Signed-off-by: Benjamin Gaignard
---
changes in this version:
- do not modify the code to remove the unused variables
just prefix them
Hi
Thomas Zimmermann 于2019年12月10日周二 下午8:47写道:
> Hi
>
> Am 10.12.19 um 13:38 schrieb tang pengchuan:
> > Hi
> >
> > Thomas Zimmermann mailto:tzimmerm...@suse.de>> 于
> > 2019年12月10日周二 下午6:33写道:
> >
> > Hi
> >
> > Am 10.12.19 um 09:36 schrieb Kevin Tang:
> > > From: Kevin Tang >
Changing pixel clock source without having this clock source enabled
will block the timing engine and the next operations after (in this case
setting ATMEL_HLCDC_CFG(5) settings in atmel_hlcdc_crtc_mode_set_nofb()
will fail). It is recomended (although in datasheet this is not present)
to actually
On 10.12.2019 16:11, Peter Rosin wrote:
> On 2019-12-10 14:24, Claudiu Beznea wrote:
>> This reverts commit f6f7ad3234613f6f7f27c25036aaf078de07e9b0.
>> ("drm/atmel-hlcdc: allow selecting a higher pixel-clock than requested")
>> because allowing selecting a higher pixel clock may overclock
>> LC
Add a compatible string for the LCD controller found in the JZ4770 SoC.
v2: No change
Signed-off-by: Paul Cercueil
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/display/ingenic,lcd.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/i
On Wed, Sep 25, 2019 at 04:55:01PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Now that the cea mode handling is not 100% tied to the single
> array the dummy VIC 0 mode is pretty much pointles. Throw it
> out.
>
> Cc: Hans Verkuil
> Cc: Shashank Sharma
> Signed-off-by: Ville Syrjälä
+CCs that were accidnetally lost
On Tue, Dec 10, 2019 at 02:34:23PM -0800, Tom Anderson wrote:
> On Wed, Sep 25, 2019 at 04:54:59PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > We're going to need two cea mode tables (on for VICs < 128,
>
> s/on/one
>
> > another one for VICs >=
It is possible that there is no drm_framebuffer associated with a given
plane state.
v2: Handle drm_plane->state which can be NULL too
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/dri
Instead of obtaining the width/height of the framebuffer from the CRTC
state, obtain it from the current plane state.
v2: No change
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/inge
This reverts commit f6f7ad3234613f6f7f27c25036aaf078de07e9b0.
("drm/atmel-hlcdc: allow selecting a higher pixel-clock than requested")
because allowing selecting a higher pixel clock may overclock
LCD devices, not all of them being capable of this.
Cc: Peter Rosin
Signed-off-by: Claudiu Beznea
-
From: Nicolas Boichat
Add support for analogix,anx7688
Signed-off-by: Nicolas Boichat
Signed-off-by: Hsin-Yi Wang
---
Change from RFC to v1:
- txt to yaml
---
.../bindings/display/bridge/anx7688.yaml | 60 +++
1 file changed, 60 insertions(+)
create mode 100644
Document
Check that the requested display size isn't above the limits supported
by the CRTC.
- JZ4750 and older support up to 800x600;
- JZ4755 supports up to 1024x576;
- JZ4760 and JZ4770 support up to 720p;
- JZ4780 supports up to 2k.
v2: No change
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ing
Hi Thomas
Thomas Zimmermann 于2019年12月10日周二 下午8:47写道:
> Hi
>
> Am 10.12.19 um 13:38 schrieb tang pengchuan:
> > Hi
> >
> > Thomas Zimmermann mailto:tzimmerm...@suse.de>> 于
> > 2019年12月10日周二 下午6:33写道:
> >
> > Hi
> >
> > Am 10.12.19 um 09:36 schrieb Kevin Tang:
> > > From: Kevin Tang >
ping ...
On Thu, Nov 21, 2019 at 12:17 PM Navid Emamdoost
wrote:
>
> On Tue, Sep 24, 2019 at 11:38 PM Navid Emamdoost
> wrote:
> >
> > In vmw_cmdbuf_res_add if drm_ht_insert_item fails the allocated memory
> > for cres should be released.
> >
> > Signed-off-by: Navid Emamdoost
>
> Would you ple
Hi
Emil Velikov 于2019年12月11日周三 上午1:14写道:
> Hi Kevin,
>
> On Tue, 10 Dec 2019 at 08:41, Kevin Tang wrote:
> >
> > From: Kevin Tang
> >
> > Adds DPU(Display Processor Unit) support for the Unisoc's display
> subsystem.
> > It's support multi planes, scaler, rotation, PQ(Picture Quality) and
> mo
On Mon, Dec 9, 2019 at 3:04 PM Jani Nikula wrote:
>
> On Tue, 03 Dec 2019, Jani Nikula wrote:
> > Now that the fbops member of struct fb_info is const, we can start
> > making the ops const as well.
> >
> > Cc: Miguel Ojeda Sandonis
> > Cc: Robin van der Gracht
> > Reviewed-by: Daniel Vetter
>
Hi
Thomas Zimmermann 于2019年12月10日周二 下午6:33写道:
> Hi
>
> Am 10.12.19 um 09:36 schrieb Kevin Tang:
> > From: Kevin Tang
> >
> > Adds drm support for the Unisoc's display subsystem.
> >
> > This is drm device and gem driver. This driver provides support for the
> > Direct Rendering Infrastructure (
This is a resend of [1] with a few modification due to drm core function
changes and use regmap abstraction.
The gpio mux driver is required for MT8173 board layout:
/-- anx7688
-- MT8173 HDMI bridge -- GPIO mux
\-- native HDMI
On 2019-12-10 15:59, claudiu.bez...@microchip.com wrote:
>
>
> On 10.12.2019 16:11, Peter Rosin wrote:
>> On 2019-12-10 14:24, Claudiu Beznea wrote:
>>> This reverts commit f6f7ad3234613f6f7f27c25036aaf078de07e9b0.
>>> ("drm/atmel-hlcdc: allow selecting a higher pixel-clock than requested")
>>> b
From: Nicolas Boichat
ANX7688 is a HDMI to DP converter (as well as USB-C port controller),
that has an internal microcontroller.
The only reason a Linux kernel driver is necessary is to reject
resolutions that require more bandwidth than what is available on
the DP side. DP bandwidth and lane c
On Tue, 10 Dec 2019, Stephen Rothwell wrote:
> Hi all,
>
> [Just adding Dave Airlie to the cc list]
>
> On Tue, 10 Dec 2019 09:39:57 +1100 Stephen Rothwell
> wrote:
>>
>> After merging the drm-intel tree, today's linux-next build (x86_64
>> allmodconfig) failed like this:
FYI, I've now backmerg
When logging the AVI InfoFrame, clearly indicate whether or not
attributes are active/"in effect". The specification is given in
CTA-861-G Section 6.4: Format of Version 2, 3 & 4 AVI InfoFrames.
Attribute BytesRequirement
Ext. Colorimetry EC0..EC2 Colorimetry (C0,C1) set to Extended.
Hi Gerd
Am 11.12.19 um 09:18 schrieb Gerd Hoffmann:
> Add caching field to drm_gem_shmem_object to specify the cachine
> attributes for mappings. Add helper function to tweak pgprot
> accordingly. Switch vmap and mmap functions to the new helper.
>
> Set caching to write-combine when creating t
Am 11.12.19 um 10:58 schrieb Thomas Zimmermann:
>
> What do you think about turning this function into a callback in struct
> shmem_funcs? The default implementation would be for WC, virtio would
s/shmem_funcs/drm_gem_object_funcs
> use CACHED. The individual implementations could still be loc
Am 11.12.19 um 10:58 schrieb Thomas Zimmermann:
> Hi Gerd
>
> Am 11.12.19 um 09:18 schrieb Gerd Hoffmann:
>> Add caching field to drm_gem_shmem_object to specify the cachine
>> attributes for mappings. Add helper function to tweak pgprot
>> accordingly. Switch vmap and mmap functions to the ne
On 9/25/19 6:38 AM, Navid Emamdoost wrote:
> In vmw_cmdbuf_res_add if drm_ht_insert_item fails the allocated memory
> for cres should be released.
>
> Signed-off-by: Navid Emamdoost
> ---
> drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf_res.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> d
On 9/25/19 6:46 AM, Navid Emamdoost wrote:
> In vmw_context_define if vmw_context_init fails the allocated resource
> should be unreferenced. The goto label was fixed.
>
> Signed-off-by: Navid Emamdoost
> ---
> drivers/gpu/drm/vmwgfx/vmwgfx_context.c | 2 +-
> 1 file changed, 1 insertion(+), 1 de
On Tue 10-12-19 18:53:13, John Hubbard wrote:
> 1. Convert from get_user_pages() to pin_user_pages().
>
> 2. As required by pin_user_pages(), release these pages via
> put_user_page().
>
> Cc: Jan Kara
> Signed-off-by: John Hubbard
The patch looks good to me. You can add:
Reviewed-by: Jan Kar
Hi Laurent,
On Tuesday, 10 December 2019 22:57:04 GMT Laurent Pinchart wrote:
> To support implementation of DRM connectors on top of DRM bridges
> instead of by bridges, the drm_bridge needs to expose new operations and
> data:
>
> - Output detection, hot-plug notification, mode retrieval and ED
Hi,
On Wednesday, 11 December 2019 07:38:29 GMT Thomas Zimmermann wrote:
> Hi
>
> Am 10.12.19 um 16:11 schrieb Mihail Atanassov:
> > As suggested in [1], the 'dev' field is a bit repetitive, since it 1:1
> > follows the setting and NULLing of the 'encoder' field. Therefore, use
> > drm_bridge->en
On Tue, Dec 10, 2019 at 03:18:54PM -0800, Tom Anderson wrote:
> On Wed, Sep 25, 2019 at 04:55:01PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Now that the cea mode handling is not 100% tied to the single
> > array the dummy VIC 0 mode is pretty much pointles. Throw it
> > out.
>
On Tue, 10 Dec 2019, Miguel Ojeda wrote:
> On Mon, Dec 9, 2019 at 3:04 PM Jani Nikula wrote:
>>
>> On Tue, 03 Dec 2019, Jani Nikula wrote:
>> > Now that the fbops member of struct fb_info is const, we can start
>> > making the ops const as well.
>> >
>> > Cc: Miguel Ojeda Sandonis
>> > Cc: Robi
On Tue 10-12-19 18:53:16, John Hubbard wrote:
> Add tracking of pages that were pinned via FOLL_PIN.
>
> As mentioned in the FOLL_PIN documentation, callers who effectively set
> FOLL_PIN are required to ultimately free such pages via unpin_user_page().
> The effect is similar to FOLL_GET, and may
On Wed, 11 Dec 2019 at 09:18, tang pengchuan wrote:
>
> Hi
>
> Emil Velikov 于2019年12月11日周三 上午1:14写道:
>>
>> Hi Kevin,
>>
>> On Tue, 10 Dec 2019 at 08:41, Kevin Tang wrote:
>> >
>> > From: Kevin Tang
>> >
>> > Adds DPU(Display Processor Unit) support for the Unisoc's display
>> > subsystem.
>> >
globle, goblin, moblin?
It's dead code, we lucked out.
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/gma500/mdfld_intel_display.c | 23
1 file changed, 23 deletions(-)
diff --git a/drivers/gpu/drm/gma500/mdfld_intel_display.c
b/drive
As suggested in [1], the 'dev' field is a bit repetitive, since it 1:1
follows the setting and NULLing of the 'encoder' field. Therefore, use
drm_bridge->encoder->dev in place of drm_bridge->dev.
[1] https://patchwork.freedesktop.org/patch/343824/
v2:
- fix checkpatch complaint about unnecessary
With shmem helpers allowing to update pgprot caching flags via
drm_gem_object_funcs.pgprot we can just use that and ditch our own
implementations of mmap() and vmap().
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/udl/udl_gem.c | 62 ---
1 file changed, 7 inser
Use drm_gem_pgprot_wc() as pgprot callback in drm_gem_shmem_funcs.
Use drm_gem_pgprot() to update pgprot caching flags.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/drm_gem_shmem_helper.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem_shmem_
virtio-gpu uses cached mappings, set virtio_gpu_gem_funcs.pgprot
accordingly.
Reported-by: Gurchetan Singh
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_object.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/virtio/virtgpu_object.c
b/drivers/gpu/drm/virt
v3: switch to drm_gem_object_funcs callback.
v2: make shmem helper caching configurable.
Gerd Hoffmann (4):
drm: add pgprot callback to drm_gem_object_funcs
drm/shmem: add support for per object caching flags.
drm/virtio: fix mmap page attributes
drm/udl: simplify gem object mapping.
inc
The callback allows drivers and helpers to tweak pgprot for mappings.
This is especially helpful when using shmem helpers. It allows drivers
to switch mappings from writecombine (default) to something else (cached
for example) on a per-object base without having to supply their own
mmap() and vmap
On Wed, Dec 11, 2019 at 11:07:25AM +0100, Thomas Zimmermann wrote:
>
>
> Am 11.12.19 um 10:58 schrieb Thomas Zimmermann:
> > Hi Gerd
> >
> > Am 11.12.19 um 09:18 schrieb Gerd Hoffmann:
> >> Add caching field to drm_gem_shmem_object to specify the cachine
> >> attributes for mappings. Add helper
On Wed, Dec 11, 2019 at 01:19:53PM +0100, Gerd Hoffmann wrote:
> The callback allows drivers and helpers to tweak pgprot for mappings.
> This is especially helpful when using shmem helpers. It allows drivers
> to switch mappings from writecombine (default) to something else (cached
> for example)
On 10/12/2019 23:08, Rob Herring wrote:
> From: Boris Brezillon
>
> With the introduction of per-FD address space, the same BO can be mapped
> in different address space if the BO is globally visible (GEM_FLINK)
> and opened in different context or if the dmabuf is self-imported. The
> current im
Hi
Am 11.12.19 um 13:36 schrieb Daniel Vetter:
>
> The udl use-case should be covered already, simply set the flag correctly
> at create/import time? It's per-object ...
The original udl gem code did this. It was additional state for
something that was detectable from the value of import_attach.
> > + /**
> > +* @pgprot:
> > +*
> > +* Tweak pgprot as needed, typically used to set cache bits.
> > +*
> > +* This callback is optional.
> > +*
> > +* If unset drm_gem_pgprot_wc() will be used.
> > +*/
> > + pgprot_t (*pgprot)(struct drm_gem_object *obj, pgprot
Hi,
> btw on why udl does this: Imported bo are usually rendered by real hw, and
> reading it uncached/wc is the more defensive setting. It would be kinda
> nice if dma-buf would expose this, but I fear dma-api maintainers would
> murder us if we even just propose that ... so it's a mess right n
Hi
Am 11.12.19 um 13:38 schrieb Daniel Vetter:
> On Wed, Dec 11, 2019 at 01:19:53PM +0100, Gerd Hoffmann wrote:
>> The callback allows drivers and helpers to tweak pgprot for mappings.
>> This is especially helpful when using shmem helpers. It allows drivers
>> to switch mappings from writecombin
On Wed, Dec 11, 2019 at 6:38 AM Steven Price wrote:
>
> On 10/12/2019 23:08, Rob Herring wrote:
> > From: Boris Brezillon
> >
> > With the introduction of per-FD address space, the same BO can be mapped
> > in different address space if the BO is globally visible (GEM_FLINK)
> > and opened in dif
On Wed, 11 Dec 2019, Daniel Vetter wrote:
> globle, goblin, moblin?
>
> It's dead code, we lucked out.
Oh, sad to see it go. The oldest reference to globle_dev I could find
was from 2011.
Acked-by: Jani Nikula
>
> Cc: Ville Syrjälä
> Cc: Jani Nikula
> Signed-off-by: Daniel Vetter
> ---
> d
From: Sean Paul
commit 354c2d310082d1c384213ba76c3757dd3cd8755d upstream.
Since the dirtyfb ioctl doesn't give us any hints as to which plane is
scanning out the fb it's marking as damaged, we need to loop through
planes to find it.
Currently we just reach into plane state and check, but that c
From: Jason Gunthorpe
[ Upstream commit a9ae8731e6e52829a935d81a65d7f925cb95dbac ]
find_vma() must be called under the mmap_sem, reorganize this code to
do the vma check after entering the lock.
Further, fix the unlocked use of struct task_struct's mm, instead use
the mm from hmm_mirror which h
From: Sean Paul
commit 354c2d310082d1c384213ba76c3757dd3cd8755d upstream.
Since the dirtyfb ioctl doesn't give us any hints as to which plane is
scanning out the fb it's marking as damaged, we need to loop through
planes to find it.
Currently we just reach into plane state and check, but that c
On Tue, Dec 10, 2019 at 02:10:48PM -0800, Thomas Anderson wrote:
> CEA-861-G adds modes up to 219, so increase the size of the
> maps in preparation for adding the new modes to drm_edid.c.
>
> Signed-off-by: Thomas Anderson
Thanks. lgtm. Pushed to drm-misc-next.
PS. I do wonder a bit if we shou
On Tue, Dec 03, 2019 at 06:37:36AM -0800, Devarsh Thakkar wrote:
> Add function to derive floating value of vertical
> refresh rate from drm mode using pixel clock,
> horizontal total size and vertical total size.
>
> Use this function to find suitable mode having vrefresh
> value which is matchin
On Wed, Dec 11, 2019 at 10:48:42AM +0100, Johan Korsnes wrote:
> When logging the AVI InfoFrame, clearly indicate whether or not
> attributes are active/"in effect". The specification is given in
> CTA-861-G Section 6.4: Format of Version 2, 3 & 4 AVI InfoFrames.
>
> Attribute BytesReq
On Tue, Dec 10, 2019 at 02:23:49PM +, Colin King wrote:
> From: Colin Ian King
>
> A prior check and return when pointer fb is null makes
> subsequent null checks on fb redundant. Remove the redundant
> null checks.
>
> Addresses-Coverity: ("Logically dead code")
> Signed-off-by: Colin Ian
On Tue, Dec 10, 2019 at 02:45:35PM +, Colin King wrote:
> From: Colin Ian King
>
> Pointer crtc_state is being assigned twice, one of these is redundant
> and can be removed.
>
> Addresses-Coverity: ("Evaluation order violation")
> Signed-off-by: Colin Ian King
> ---
> drivers/gpu/drm/i915
Hi,
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On Tuesday, 10 December 2019 06:10:34 GMT james qian wang (Arm Technology
China) wrote:
> Per HW, d71->num_blocks includes reserved blocks but no PERIPH block,
> correct the block counting accordingly.
> D71 happens to only have one reserved block and periph block, which
> hides this counting erro
Hi Tiannan,
Thanks for the patch.
On Wednesday, 11 December 2019 10:30:09 GMT Tiannan Zhu (Arm Technology China)
wrote:
> Make komeda driver can recongise D77, D77 is arm latest display
> product, compare with D71, D77 support some new features:
> 1. Crossbar: adjust every plane's zorder
> 2. AT
On Tuesday, 10 December 2019 08:48:51 GMT james qian wang (Arm Technology
China) wrote:
> D32 is simple version of D71, the difference is:
> - Only has one pipeline
> - Drop the periph block and merge it to GCU
>
> v2: Rebase.
> v3: Isolate the block counting fix to a new patch
I would've expect
Hi Lee,
On 10-12-2019 09:51, Lee Jones wrote:
On Tue, 19 Nov 2019, Hans de Goede wrote:
At least Bay Trail (BYT) and Cherry Trail (CHT) devices can use 1 of 2
different PWM controllers for controlling the LCD's backlight brightness.
Either the one integrated into the PMIC or the one integrate
Hi All,
Can I get a review or Acked-by from someone for this patch please?
The other patches in this series all have acks and it would be nice if
I can push this to drm-misc-next...
Regards,
Hans
On 18-11-2019 16:51, Hans de Goede wrote:
From: Derek Basehore
Not every platform needs quirk
Hi,
I know these kinda patches are sorta trivial, still I prefer to get an
Acked-by before pushing this to drm-misc-next. Can someone review this please?
Alternative I guess we could agree that pushing patches which just add a dmi
quirk to drm_panel_orientation_quirks.c is ok when the patch has
Hi,
On 11-12-2019 01:24, Linus Walleij wrote:
On Mon, Dec 2, 2019 at 4:49 PM Hans de Goede wrote:
There is only one problem, currently is is not possible to
unregister a mapping added with pinctrl_register_mappings
and the i915 driver is typically a module which can be unloaded
and I believe
On Wed, Dec 11, 2019 at 6:22 AM ggermanres wrote:
>
> Hello.
>
> I have question about MSM Driver.
>
> I using Dragonboard 410 with ili9881 display. This is hobby project. This
> display from xiaomi redmi 3x/4x. I made PCB board for connect them. I changed
> dts, created panel driver (this all o
Drivers that what to allocate VRAM GEM objects with additional fields
can now do this by implementing struct drm_driver.gem_create_object.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_gem_vram_helper.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/dr
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