Hi,
I need the time to dig the ICC framework
to understand them detailed. After that, I'll review this.
Basically, I agree this approach. But, I'm wondering
the existing binding method between 'bus_leftbus' and 'bus_dmc'.
>From before, I thought that devfreq framework need to
enhance the binding
https://bugs.freedesktop.org/show_bug.cgi?id=111811
Bug ID: 111811
Summary: Ryzen7 3700U display hang on resume from suspend
Product: DRI
Version: unspecified
Hardware: Other
OS: All
Status: NEW
Severity:
Hi,
On Wed, 2019-09-25 at 16:03 +0900, Chanwoo Choi wrote:
> Hi,
>
> I need the time to dig the ICC framework
> to understand them detailed. After that, I'll review this.
>
> Basically, I agree this approach. But, I'm wondering
> the existing binding method between 'bus_leftbus' and 'bus_dmc'.
>
Hi Jean,
Thank you for rebasing the set
On 9/18/19 4:57 PM, Jean-Jacques Hiblot wrote:
> If initialization data is available and its fwnode is actually a of_node,
> store this information in the led device's structure. This will allow the
> device to use or provide OF-based API such (devm_xxx).
>
In dcn*_create_resource_pool the allocated memory should be released if
construct pool fails.
Signed-off-by: Navid Emamdoost
---
drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dce112/dce
On 24/09/2019 16:17, Tomi Valkeinen wrote:
> max_tu_symbol was programmed to TU_SIZE_RECOMMENDED - 1, which is not
> what the spec says. The spec says:
>
> roundup ((input active video bandwidth in bytes/output active video
> bandwidth in bytes) * tu_size)
>
> It is not quite clear what the above
Add support 10bit yuv format display for rockchip some socs,
include:
RK3288/RK3228/RK3328/RK3368/RK3399
Signed-off-by: Sandy Huang
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 16
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 +
drivers/gpu/drm/rockchip/rockchip_vop
These new format is supported by some rockchip socs:
DRM_FORMAT_NV12_10/DRM_FORMAT_NV21_10
DRM_FORMAT_NV16_10/DRM_FORMAT_NV61_10
DRM_FORMAT_NV24_10/DRM_FORMAT_NV42_10
Signed-off-by: Sandy Huang
---
drivers/gpu/drm/drm_fourcc.c | 18 ++
include/uapi/drm/drm_fourcc.h | 14 +++
These series patches is to add some new format supported by some rockchip
socs, include:
RK3288/RK3228/RK3328/RK3368/RK3399
these new format layout as following rule:
2 plane YCbCr 10bit
index 0 = Y plane, [9:0] Y
index 1 = Cr:Cb plane, [19:0]
or
index 1 = Cb:Cr plane, [19:
For 10bit yuv format, we need to get format bpp each plane, so we
Add vop_format_get_bpp() to instead of format->cpp[];
Signed-off-by: Sandy Huang
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 26 +++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/drive
On Sat, 31 Mar 2018 at 06:45, Takashi Iwai wrote:
>
> amdgpu driver lacks of modeset module option other drm drivers provide
> for enforcing or disabling the driver load. Interestingly, the
> amdgpu_mode variable declaration is already found in the header file,
> but the actual implementation see
在 2019/9/24 下午6:12, Ayan Halder 写道:
On Tue, Sep 24, 2019 at 02:46:09PM +0800, sandy.huang wrote:
Hi Sandy,
在 2019/9/23 下午9:06, Daniel Vetter 写道:
On Mon, Sep 23, 2019 at 2:40 PM Sandy Huang wrote:
The drm_format_info.cpp[3] unit is BytePerPlane, when we add define
10bit YUV format, here have
Hi Yannick, Markus.
On 23.09.2019 11:05, Yannick FERTRE wrote:
> Reviewed-by: Yannick Fertré
> Tested-by: Yannick Fertré
Yannick, next time could you put your tags after tags of the patch,
otherwise patchwork is confused and creates incorrect patches [1].
[1]: https://patchwork.freedesktop.
Op 25-09-2019 om 10:06 schreef Sandy Huang:
> These new format is supported by some rockchip socs:
>
> DRM_FORMAT_NV12_10/DRM_FORMAT_NV21_10
> DRM_FORMAT_NV16_10/DRM_FORMAT_NV61_10
> DRM_FORMAT_NV24_10/DRM_FORMAT_NV42_10
>
> Signed-off-by: Sandy Huang
> ---
> drivers/gpu/drm/drm_fourcc.c | 18 ++
> From: Jason Wang [mailto:jasow...@redhat.com]
> Sent: Tuesday, September 24, 2019 9:53 PM
>
> Hi all:
>
> There are hardware that can do virtio datapath offloading while having
> its own control path. This path tries to implement a mdev based
> unified API to support using kernel virtio driver
https://bugs.freedesktop.org/show_bug.cgi?id=111808
Andre Klapper changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=111807
--- Comment #1 from Andre Klapper ---
*** Bug 111808 has been marked as a duplicate of this bug. ***
--
You are receiving this mail because:
You are the assignee for the bug.___
dri-devel mailing lis
> From: Jason Wang
> Sent: Tuesday, September 24, 2019 9:53 PM
>
> Mdev bus only supports vfio driver right now, so it doesn't implement
> match method. But in the future, we may add drivers other than vfio,
> the first driver could be virtio-mdev. This means we need to add
> device class id suppo
在 2019/9/25 下午4:17, Maarten Lankhorst 写道:
Op 25-09-2019 om 10:06 schreef Sandy Huang:
These new format is supported by some rockchip socs:
DRM_FORMAT_NV12_10/DRM_FORMAT_NV21_10
DRM_FORMAT_NV16_10/DRM_FORMAT_NV61_10
DRM_FORMAT_NV24_10/DRM_FORMAT_NV42_10
Signed-off-by: Sandy Huang
---
drive
The Xylon LogiCVC is a display controller implemented as programmable
logic in Xilinx FPGAs.
Signed-off-by: Paul Kocialkowski
---
.../display/xylon,logicvc-display.yaml| 314 ++
1 file changed, 314 insertions(+)
create mode 100644
Documentation/devicetree/bindings/displ
This series introduces support for the LogiCVC display controller.
The controller is a bit unusual since it is usually loaded as
programmable logic on Xilinx FPGAs or Zynq-7000 SoCs.
More details are presented on the main commit for the driver.
More information about the controller is available on
Introduces a driver for the LogiCVC display controller, a programmable
logic controller optimized for use in Xilinx Zynq-7000 SoCs and other
Xilinx FPGAs. The controller is mostly configured at logic synthesis
time so only a subset of configuration is left for the driver to
handle.
The following f
> From: Alex Williamson
> Sent: Wednesday, September 25, 2019 7:07 AM
>
> On Tue, 24 Sep 2019 21:53:29 +0800
> Jason Wang wrote:
>
> > Currently, except for the create and remove, the rest of
> > mdev_parent_ops is designed for vfio-mdev driver only and may not help
> > for kernel mdev driver. W
Am 25.09.19 um 10:07 schrieb Dave Airlie:
> On Sat, 31 Mar 2018 at 06:45, Takashi Iwai wrote:
>> amdgpu driver lacks of modeset module option other drm drivers provide
>> for enforcing or disabling the driver load. Interestingly, the
>> amdgpu_mode variable declaration is already found in the hea
> From: Jason Wang [mailto:jasow...@redhat.com]
> Sent: Tuesday, September 24, 2019 9:54 PM
>
> This patch implements basic support for mdev driver that supports
> virtio transport for kernel virtio driver.
>
> Signed-off-by: Jason Wang
> ---
> include/linux/mdev.h| 2 +
> include/lin
https://bugs.freedesktop.org/show_bug.cgi?id=111813
Bug ID: 111813
Summary: Ubuntu 18.04.3 + Mesa 19.3 = Login Loop
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity:
Op 25-09-2019 om 10:32 schreef sandy.huang:
>
> 在 2019/9/25 下午4:17, Maarten Lankhorst 写道:
>> Op 25-09-2019 om 10:06 schreef Sandy Huang:
>>> These new format is supported by some rockchip socs:
>>>
>>> DRM_FORMAT_NV12_10/DRM_FORMAT_NV21_10
>>> DRM_FORMAT_NV16_10/DRM_FORMAT_NV61_10
>>> DRM_FORMAT_NV
On 23/09/2019 18:12, Krzysztof Kozlowski wrote:
> There is no point to print deferred probe (and its failures to get
> resources) as an error. Also there is no need to print regulator errors
> twice.
>
> In case of multiple probe tries this would pollute the dmesg.
>
> Signed-off-by: Krzysztof K
On Mon, Sep 23, 2019 at 05:34:14PM +0200, Andrzej Pietrasiewicz wrote:
> Dear All,
>
> As a result of my mistake I've sent this patch with an incorrect SOB chain.
> Please kindly disregard this patch.
>
> @Neil: thank you for your time you spent reviewing it and answering and I'm
> sorry it's to
On Mon, Sep 23, 2019 at 02:20:13PM +0200, Andrzej Pietrasiewicz wrote:
> From: Ezequiel Garcia
>
> AFBC is a proprietary lossless image compression protocol and format.
> It helps reduce memory bandwidth of the graphics pipeline operations.
> This, in turn, improves power efficiency.
>
> Signed-
Hi Andrzej,
Thanks for the patch, it's nice to see another AFBC implementation
coming in.
For future versions, could you please Cc ayan.hal...@arm.com? It would
have been nice to have someone @arm.com on patches which use/impact
Arm modifiers. Sadly I don't know how to make get_maintainer.pl help
Hi Brian,
W dniu 25.09.2019 o 11:39, Brian Starkey pisze:
Hi Andrzej,
Thanks for the patch, it's nice to see another AFBC implementation
coming in.
I did a false start, though. But the work is in progress. Thanks for the review,
anyway.
For future versions, could you please Cc ayan.hal..
Hi James,
On Tue, Sep 24, 2019 at 02:13:27AM +, james qian wang (Arm Technology
China) wrote:
>
> Hi Brian:
>
> Since one monitor can support mutiple color-formats, this DT property
> supply a way for user to select a specific one from this supported
> color-formats.
Modifying DT is a _rea
https://bugs.freedesktop.org/show_bug.cgi?id=111814
Bug ID: 111814
Summary: hello hello hello
Product: DRI
Version: XOrg git
Hardware: x86-64 (AMD64)
OS: All
Status: NEW
Severity: critical
Priori
Hi Lowry,
On Tue, Sep 24, 2019 at 08:00:44AM +, Lowry Li (Arm Technology China) wrote:
> From: "Lowry Li (Arm Technology China)"
>
> On D71, we are using the global line size. From D32, every
> component have a line size register to indicate the fifo size.
>
> So this patch is to set line s
On Tue, Sep 24, 2019 at 08:00:49AM +, Lowry Li (Arm Technology China) wrote:
> From: "Lowry Li (Arm Technology China)"
>
> Adds maximum line size check according to the AFBC decoder limitation
> and special Line size limitation(2046) for format: YUV420_10BIT and X0L2.
>
> Signed-off-by: Lowr
https://bugs.freedesktop.org/show_bug.cgi?id=111814
Andre Klapper changed:
What|Removed |Added
Group||spam
Component|General
https://bugs.freedesktop.org/show_bug.cgi?id=111815
Andre Klapper changed:
What|Removed |Added
Product|DRI |Spam
Status|NEW
On Tuesday, 2019-09-24 23:09:08 -0700, John Stultz wrote:
> On Tue, Sep 24, 2019 at 4:30 PM John Stultz wrote:
> > On Tue, Sep 24, 2019 at 3:24 PM Rob Herring wrote:
> > > Trying to maintain something that works across more than 3 releases or
> > > so is painful. I don't think android-x86 folks h
The busy BO might actually be already deleted,
so grab only a list reference.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 881cf26d698e..02
As the name says global memory and bo accounting is global. So it doesn't
make to much sense having pointers to global structures all around the code.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 ++--
drivers/
This allows blocking for BOs to become available
in the memory management.
Amdgpu is doing this for quite a while now during CS. Now
apply the new behavior to all drivers using TTM.
Signed-off-by: Christian König
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 ++--
drivers/gpu/drm/amd/a
在 2019/9/25 下午5:23, Maarten Lankhorst 写道:
Op 25-09-2019 om 10:32 schreef sandy.huang:
在 2019/9/25 下午4:17, Maarten Lankhorst 写道:
Op 25-09-2019 om 10:06 schreef Sandy Huang:
These new format is supported by some rockchip socs:
DRM_FORMAT_NV12_10/DRM_FORMAT_NV21_10
DRM_FORMAT_NV16_10/DRM_FORMA
On Wed, Sep 25, 2019 at 11:35 AM Ayan Halder wrote:
>
> On Mon, Sep 23, 2019 at 02:20:13PM +0200, Andrzej Pietrasiewicz wrote:
> > From: Ezequiel Garcia
> >
> > AFBC is a proprietary lossless image compression protocol and format.
> > It helps reduce memory bandwidth of the graphics pipeline oper
On Wed, Sep 25, 2019 at 10:07 AM Sandy Huang wrote:
>
> These new format is supported by some rockchip socs:
>
> DRM_FORMAT_NV12_10/DRM_FORMAT_NV21_10
> DRM_FORMAT_NV16_10/DRM_FORMAT_NV61_10
> DRM_FORMAT_NV24_10/DRM_FORMAT_NV42_10
>
> Signed-off-by: Sandy Huang
Again, please use the block format
On Tue, Sep 24, 2019 at 8:46 AM sandy.huang wrote:
>
>
> 在 2019/9/23 下午9:06, Daniel Vetter 写道:
> > On Mon, Sep 23, 2019 at 2:40 PM Sandy Huang wrote:
> >> The drm_format_info.cpp[3] unit is BytePerPlane, when we add define
> >> 10bit YUV format, here have some problem.
> >> So we change cpp to bp
From: Thierry Reding
Commit Fixes: b9f8b09ce256 ("drm/tegra: Setup shared IOMMU domain after
initialization") changed the initialization order of the IOMMU related
bits but didn't update the cleanup path accordingly. This asymmetry can
cause failures during error recovery.
Fixes: b9f8b09ce256 ("
Ping, could someone review this patch ?
Neil
On 28/08/2019 15:23, Neil Armstrong wrote:
> When calculating the HDMI PLL settings for a DMT mode PHY frequency,
> use the correct max fractional PLL value for G12A VPU.
>
> With this fix, we can finally setup the 1024x768-60 mode.
>
> Fixes: 202b98
On 9/25/19 12:55 PM, Christian König wrote:
The busy BO might actually be already deleted,
so grab only a list reference.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/dri
On 9/25/19 12:55 PM, Christian König wrote:
As the name says global memory and bo accounting is global. So it doesn't
make to much sense having pointers to global structures all around the code.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 2 +-
drivers/gpu/
On 2019/9/24 下午10:04, Alex Williamson wrote:
> On Mon, 23 Sep 2019 12:00:41 -0400
> "Michael S. Tsirkin" wrote:
>
>> On Mon, Sep 23, 2019 at 09:45:59AM -0600, Alex Williamson wrote:
>>> On Mon, 23 Sep 2019 21:03:30 +0800
>>> Jason Wang wrote:
>>>
We want to copy from iov to buf, so the
On 2019/9/25 上午7:06, Alex Williamson wrote:
> On Tue, 24 Sep 2019 21:53:26 +0800
> Jason Wang wrote:
>
>> Mdev bus only supports vfio driver right now, so it doesn't implement
>> match method. But in the future, we may add drivers other than vfio,
>> the first driver could be virtio-mdev. This m
From: Colin Ian King
There is a continue statement that is indented one level too deeply,
remove the extraneous tab.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/pa
https://bugs.freedesktop.org/show_bug.cgi?id=111792
--- Comment #5 from Sylvain BERTRAND ---
got some sleep then I noticed I have the wrong kernel log message. My bad.
The kernel module is crashing in DP code. see the call stack in the about to be
updated kernel log.
--
You are receiving this
https://bugs.freedesktop.org/show_bug.cgi?id=111792
Sylvain BERTRAND changed:
What|Removed |Added
Attachment #145481|0 |1
is obsolete|
On 9/25/19 12:55 PM, Christian König wrote:
This allows blocking for BOs to become available
in the memory management.
Amdgpu is doing this for quite a while now during CS. Now
apply the new behavior to all drivers using TTM.
Signed-off-by: Christian König
Got to test this to see that there
On 2019/9/25 上午7:06, Alex Williamson wrote:
> On Tue, 24 Sep 2019 21:53:29 +0800
> Jason Wang wrote:
>
>> Currently, except for the create and remove, the rest of
>> mdev_parent_ops is designed for vfio-mdev driver only and may not help
>> for kernel mdev driver. With the help of class id, this p
On 2019/9/25 上午7:06, Alex Williamson wrote:
> On Tue, 24 Sep 2019 21:53:30 +0800
> Jason Wang wrote:
>
>> This patch implements basic support for mdev driver that supports
>> virtio transport for kernel virtio driver.
>>
>> Signed-off-by: Jason Wang
>> ---
>> include/linux/mdev.h| 2 +
Am 25.09.19 um 14:06 schrieb Thomas Hellström (VMware):
On 9/25/19 12:55 PM, Christian König wrote:
This allows blocking for BOs to become available
in the memory management.
Amdgpu is doing this for quite a while now during CS. Now
apply the new behavior to all drivers using TTM.
Signed-off-b
On 2019/9/25 下午4:24, Tian, Kevin wrote:
>> From: Jason Wang [mailto:jasow...@redhat.com]
>> Sent: Tuesday, September 24, 2019 9:53 PM
>>
>> Hi all:
>>
>> There are hardware that can do virtio datapath offloading while having
>> its own control path. This path tries to implement a mdev based
>> uni
On 2019/9/25 下午4:28, Tian, Kevin wrote:
>> From: Jason Wang
>> Sent: Tuesday, September 24, 2019 9:53 PM
>>
>> Mdev bus only supports vfio driver right now, so it doesn't implement
>> match method. But in the future, we may add drivers other than vfio,
>> the first driver could be virtio-mdev. Th
Hi Thomas,
this one and patch #3 are still Reviewed-by: Christian König
Any objections that I cherry pick them over into our branch? Upstreaming
that stuff got delayed quite a bit and I want to base a cleanup on this.
Thanks,
Christian.
Am 18.09.19 um 15:20 schrieb Thomas Hellstrom:
Hi,
On 9/25/19 2:30 PM, Christian König wrote:
> Hi Thomas,
>
> this one and patch #3 are still Reviewed-by: Christian König
>
>
> Any objections that I cherry pick them over into our branch? Upstreaming
> that stuff got delayed quite a bit and I want to base a cleanup on this.
>
> Thanks,
> Christi
On 2019/9/25 下午5:09, Tian, Kevin wrote:
From: Jason Wang [mailto:jasow...@redhat.com]
Sent: Tuesday, September 24, 2019 9:54 PM
This patch implements basic support for mdev driver that supports
virtio transport for kernel virtio driver.
Signed-off-by: Jason Wang
---
include/linux/mdev.h
On Wed, Sep 25, 2019 at 3:49 AM Paul Kocialkowski
wrote:
>
> The Xylon LogiCVC is a display controller implemented as programmable
> logic in Xilinx FPGAs.
>
> Signed-off-by: Paul Kocialkowski
> ---
> .../display/xylon,logicvc-display.yaml| 314 ++
> 1 file changed, 314 i
From: Thomas Hellstrom
The explicit typcasts are meaningless, so remove them.
Suggested-by: Matthew Wilcox
Signed-off-by: Thomas Hellstrom
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo_vm.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/
From: Thomas Hellstrom
The default TTM fault handler may not be completely sufficient
(vmwgfx needs to do some bookkeeping, control the write protectionand also
needs to restrict the number of prefaults).
Also make it possible replicate ttm_bo_vm_reserve() functionality for,
for example, mkwrite
Hi,
On Wed 25 Sep 19, 08:07, Rob Herring wrote:
> On Wed, Sep 25, 2019 at 3:49 AM Paul Kocialkowski
> wrote:
> >
> > The Xylon LogiCVC is a display controller implemented as programmable
> > logic in Xilinx FPGAs.
> >
> > Signed-off-by: Paul Kocialkowski
> > ---
> > .../display/xylon,logicvc-di
On Wed, Sep 25, 2019 at 08:45:21PM +0800, Jason Wang wrote:
>
> On 2019/9/25 下午5:09, Tian, Kevin wrote:
> > > From: Jason Wang [mailto:jasow...@redhat.com]
> > > Sent: Tuesday, September 24, 2019 9:54 PM
> > >
> > > This patch implements basic support for mdev driver that supports
> > > virtio tr
Hi all,
These series of patches introduce a feature to support secure buffer object.
The Trusted Memory Zone (TMZ) is a method to protect the contents being written
to and read from memory. We use TMZ hardware memory protection scheme to
implement the secure buffer object support.
TMZ is the page
From: Alex Deucher
Add a flag to the GEM_CREATE ioctl to create encrypted buffers.
Buffers with this flag set will be created with the TMZ bit set
in the PTEs or engines accessing them. This is required in order
to properly access the data from the engines.
Signed-off-by: Alex Deucher
Reviewed
This patch adds tmz parameter to enable/disable the feature in the amdgpu kernel
module. Nomally, by default, it should be auto (rely on the hardware
capability).
But right now, it need to set "off" to avoid breaking other developers'
work because it's not totally completed.
Will set "auto" till
From: Luben Tuikov
Add a flag to the command submission IOCTL
structure which when present indicates that this
command submission should be treated as
secure. The kernel driver uses this flag to
determine whether the engine should be
transitioned to secure or unsecure, or the work
can be submitte
This patch to add amdgpu_tmz structure which stores all tmz related fields.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 6 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_tmz.h | 36 +
2 files changed, 41 insertions(
From: Alex Deucher
Define the TMZ (encryption) bit in the page table entry (PTE) for
Raven and newer asics.
Signed-off-by: Alex Deucher
Reviewed-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm
This patch expands the context control function to support trusted flag while we
want to set command buffer in trusted mode.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.
Mark a job as secure, if and only if the command
submission flag has the secure flag set.
v2: fix the null job pointer while in vmid 0
submission.
v3: Context --> Command submission.
Signed-off-by: Huang Rui
Co-developed-by: Luben Tuikov
Signed-off-by: Luben Tuikov
Reviewed-by: Alex Deucher
-
Add a function to check tmz capability with kernel parameter and ASIC type.
v2: use a per device tmz variable instead of global amdgpu_tmz.
v3: refine the comments for the function. (Luben)
v4: add amdgpu_tmz.c/h for future use.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gp
This patch expands the emit_tmz function to support trusted flag while we want
to set command buffer in trusted mode.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4
From: Alex Deucher
If a buffer object is secure, i.e. created with
AMDGPU_GEM_CREATE_ENCRYPTED, then the TMZ bit of
the PTEs that belong the buffer object should be
set.
v1: design and draft the skeletion of TMZ bits setting on PTEs (Alex)
v2: return failure once create secure BO on non-TMZ plat
This patch adds tmz bit in frame control pm4 packet, and it will used in future.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/nvd.h| 1 +
drivers/gpu/drm/amd/amdgpu/soc15d.h | 1 +
2 files changed, 2 insertions(+)
diff --gi
From: Ville Syrjälä
Remainder of the new CTA-861-G modes. I already pushed the first patch
adding the modes with VIC<128. I did improve the BUILD_BUG_ON()s in the
last patch a bit to make it easier to visually double check the numbers
against VIC comments in the mode arrays.
Ville Syrjälä (4):
From: Ville Syrjälä
Add a second table to the cea modes with VIC >= 193.
Cc: Hans Verkuil
Cc: Shashank Sharma
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_edid.c | 151 -
1 file changed, 149 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/d
On 2019-09-25 12:23 a.m., Navid Emamdoost wrote:
> In dcn*_create_resource_pool the allocated memory should be released if
> construct pool fails.
>
> Signed-off-by: Navid Emamdoost
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c | 1 +
> d
From: Ville Syrjälä
We're going to need two cea mode tables (on for VICs < 128,
another one for VICs >= 193). To that end replace the direct
edid_cea_modes[] lookups with a function call. And we'll rename
the array to edid_cea_modes_0[] to indicathe how it's to be
indexed.
Cc: Hans Verkuil
Cc:
From: Ville Syrjälä
Now that the cea mode handling is not 100% tied to the single
array the dummy VIC 0 mode is pretty much pointles. Throw it
out.
Cc: Hans Verkuil
Cc: Shashank Sharma
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_edid.c | 14 +-
1 file changed, 5 insertio
From: Ville Syrjälä
We depend on a specific relationship between the VIC number and the
index in the CEA mode arrays. Assert that the arrays have the excpected
size to make sure we've not accidentally left holes in them.
v2: Pimp the BUILD_BUG_ON()s
Cc: Hans Verkuil
Cc: Shashank Sharma
Signed
Am 25.09.19 um 15:45 schrieb Huang, Ray:
> Mark a job as secure, if and only if the command
> submission flag has the secure flag set.
>
> v2: fix the null job pointer while in vmid 0
> submission.
> v3: Context --> Command submission.
>
> Signed-off-by: Huang Rui
> Co-developed-by: Luben Tuikov
Hello Christian Gmeiner,
The patch 9e2c2e273012: "drm/etnaviv: add infrastructure to query
perf counter" from Sep 24, 2017, leads to the following static
checker warning:
drivers/gpu/drm/etnaviv/etnaviv_drv.c:449 etnaviv_ioctl_pm_query_dom()
warn: 'args->pipe' is out of bounds '3'
Am 25.09.19 um 15:45 schrieb Huang, Ray:
> From: Alex Deucher
>
> If a buffer object is secure, i.e. created with
> AMDGPU_GEM_CREATE_ENCRYPTED, then the TMZ bit of
> the PTEs that belong the buffer object should be
> set.
>
> v1: design and draft the skeletion of TMZ bits setting on PTEs (Alex)
>
https://bugs.freedesktop.org/show_bug.cgi?id=111792
--- Comment #7 from Alex Deucher ---
You need this patch:
https://cgit.freedesktop.org/drm/drm-misc/commit/?h=drm-misc-next-fixes&id=e0f32f78e51b9989ee89f608fd0dd10e9c230652
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On 24/09/2019 10:55, Koenig, Christian wrote:
> Sorry for the delayed response, have been busy on other stuff last week.
>
> Am 17.09.19 um 14:46 schrieb Steven Price:
>> On 17/09/2019 09:42, Koenig, Christian wrote:
>>> Hi Steven,
>>>
>>> thought about that issue a bit more and I think I came up
Am 25.09.19 um 16:06 schrieb Steven Price:
> On 24/09/2019 10:55, Koenig, Christian wrote:
>> Sorry for the delayed response, have been busy on other stuff last week.
>>
>> Am 17.09.19 um 14:46 schrieb Steven Price:
>>> On 17/09/2019 09:42, Koenig, Christian wrote:
Hi Steven,
thought
Dear Philipp,
Can you reply to my issue below?
It will be of great help!
Regards,
Pintu
On Mon, Sep 23, 2019 at 1:28 PM Pintu Agarwal wrote:
>
> Dear Philipp,
>
> I have a iMX6dl custom board with custom Linux Kernel 4.8.
> I have both LCD and HDMI connected to the board.
> And we are using wes
From: Ville Syrjälä
Make drm_dp_get_vc_payload() tolerate arbitrary DP_LINK_BW_*
values, just like drm_dp_bw_code_to_link_rate() does since commit
57a1b0893782 ("drm: Make the bw/link rate calculations more forgiving").
Cc: Lyude Paul
Cc: Sean Paul
Signed-off-by: Ville Syrjälä
---
drivers/gp
From: Ville Syrjälä
Replace the nested ifs with a single if and a logical AND.
Cc: Lyude Paul
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_dp_mst_topology.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/
From: Ville Syrjälä
Get rid of the drm_fixp_from_fraction() usage and just do the
straightforward calculation directly.
Cc: Lyude Paul
Cc: Harry Wentland
Cc: Alex Deucher
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_dp_mst_topology.c | 18 ++
1 file changed, 2 insert
https://bugs.freedesktop.org/show_bug.cgi?id=107296
--- Comment #19 from frido.ferdin...@gmail.com ---
Same problem, initially installed arch with an nvidia 970 card, later switched
to internal vega graphics on displayport with 144hz monitor now blank
(flickering) screen on boot. Details:
5.3.1-a
https://bugs.freedesktop.org/show_bug.cgi?id=107296
--- Comment #20 from frido.ferdin...@gmail.com ---
Created attachment 145514
--> https://bugs.freedesktop.org/attachment.cgi?id=145514&action=edit
dmesg.txt blank screen on boot
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Mark a job as secure, if and only if the command
submission flag has the secure flag set.
v2: fix the null job pointer while in vmid 0
submission.
v3: Context --> Command submission.
v4: filling cs parser with cs->in.flags
Signed-off-by: Huang Rui
Co-developed-by: Luben Tuikov
Signed-off-by: Lu
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