Userspace requested command buffer allocations could be too large
to make as a contiguous allocation. Use vmalloc if necessary to
satisfy those allocations.
Signed-off-by: David Riley
---
drivers/gpu/drm/virtio/virtgpu_ioctl.c | 4 +-
drivers/gpu/drm/virtio/virtgpu_vq.c| 78 +++
https://bugs.freedesktop.org/show_bug.cgi?id=111077
--- Comment #37 from Matt Turner ---
(In reply to rol...@rptd.ch from comment #36)
> # mkdir -p /etc/portage/patches/media-libs/mesa/
> # cd /etc/portage/patches/media-libs/mesa/
> wget 'https://gitlab.freedesktop.org/mesa/mesa/merge_requests/18
https://bugs.freedesktop.org/show_bug.cgi?id=109628
--- Comment #17 from peter m ---
updated to kernel 5.2.13-200.fc30.x86_64
dmesg prints no more WARNING messages, but screen still black after login
screen
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On Wed, Sep 11, 2019 at 10:56:02AM -0700, José Roberto de Souza wrote:
> This 3 non-atomic drivers all have the same function getting the
> only encoder available in the connector, also atomic drivers have
> this fallback. So moving it a common place and sharing between atomic
> and non-atomic driv
Hi
Am 11.09.19 um 17:21 schrieb Ville Syrjälä:
> On Wed, Sep 11, 2019 at 05:08:45PM +0200, Thomas Zimmermann wrote:
>> Hi
>>
>> Am 10.09.19 um 16:01 schrieb Ville Syrjälä:
>>> On Mon, Sep 09, 2019 at 04:06:33PM +0200, Thomas Zimmermann wrote:
Support for vblank requires VSYNC to signal an int
From: Dhinakaran Pandiyan
Currently we restrict the number of encoders that can be linked to
a connector to 3, increase it to match the maximum number of encoders
that can be initialized(32).
To more effiently do that lets switch from an array of encoder ids to
bitmask.
v2: Fixing missed return
This 3 non-atomic drivers all have the same function getting the
only encoder available in the connector, also atomic drivers have
this fallback. So moving it a common place and sharing between atomic
and non-atomic drivers.
While at it I also removed the mention of
drm_atomic_helper_best_encoder(
https://bugs.freedesktop.org/show_bug.cgi?id=111077
--- Comment #36 from rol...@rptd.ch ---
# mkdir -p /etc/portage/patches/media-libs/mesa/
# cd /etc/portage/patches/media-libs/mesa/
wget 'https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1852.patch'
--2019-09-11 18:35:51--
https://gitlab
Add self tests for HMM.
Signed-off-by: Ralph Campbell
---
MAINTAINERS|3 +
drivers/char/Kconfig | 11 +
drivers/char/Makefile |1 +
drivers/char/hmm_dmirror.c | 1504
include/Kbuild
https://bugs.freedesktop.org/show_bug.cgi?id=111591
--- Comment #17 from Shmerl ---
(In reply to Timothy Arceri from comment #14)
> Are you sure it is hanging? There is a huge amount of stuttering due to the
> game compiling shaders in-game. Its really bad the first time I run the
> apitrace but
https://bugs.freedesktop.org/show_bug.cgi?id=111459
--- Comment #6 from peter m ---
(In reply to tajgaividra from comment #5)
> Hi,
>
> Have you tried reverting the xorg amdgpu package to an older version? Of
> course that is just a workaround.
only kernel driver is used
dnf list available |
Stefan Wahren writes:
> Since release of the new BCM2835 PM driver there has been several reports
> of V3D probing issues. This is caused by timeouts during powering-up the
> GRAFX PM domain:
>
> bcm2835-power: Timeout waiting for grafx power OK
>
> I was able to reproduce this reliable on my R
When BT.2020 Colorimetry output is used for DP, we should program BT.2020
Colorimetry to MSA and VSC SDP. It adds output_colorspace to
intel_crtc_state struct as a place holder of pipe's output colorspace.
In order to distinguish needed colorimetry for VSC SDP, it adds
intel_dp_needs_vsc_sdp functi
Hi Dave and Daniel,
Here goes drm-intel-next-fixes-2019-09-11:
Few fixes on GGTT and PPGTT around pin, locks, fence and vgpu.
This also includes GVT fixes with two recent fixes:
one for recent guest hang regression and another for guest reset fix.
Thanks,
Rodrigo.
The following changes since c
On Wed, Sep 11, 2019 at 08:01:55PM +, Souza, Jose wrote:
> On Wed, 2019-09-11 at 21:10 +0300, Ville Syrjälä wrote:
> > On Wed, Sep 11, 2019 at 10:56:02AM -0700, José Roberto de Souza
> > wrote:
> > > This 3 non-atomic drivers all have the same function getting the
> > > only encoder available i
Allow hmm_range_fault() to return success (0) when the CPU pagetable
entry points to the special shared zero page.
The caller can then handle the zero page by possibly clearing device
private memory instead of DMAing a zero page.
Signed-off-by: Ralph Campbell
Cc: "Jérôme Glisse"
Cc: Jason Guntho
https://bugs.freedesktop.org/show_bug.cgi?id=111591
--- Comment #18 from Shmerl ---
Just for the reference, I'm using firmware from here:
https://people.freedesktop.org/~agd5f/radeon_ucode/navi10/
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Function intel_dp_setup_hdr_metadata_infoframe_sdp handles Infoframe SDP
header and data block setup for HDR Static Metadata. It enables writing of
HDR metadata infoframe SDP to panel. Support for HDR video was introduced
in DisplayPort 1.4. It implements the CTA-861-G standard for transport of
sta
On Wed, 2019-09-11 at 21:10 +0300, Ville Syrjälä wrote:
> On Wed, Sep 11, 2019 at 10:56:02AM -0700, José Roberto de Souza
> wrote:
> > This 3 non-atomic drivers all have the same function getting the
> > only encoder available in the connector, also atomic drivers have
> > this fallback. So moving
hmm_range_fault() calls find_vma() and walk_page_range() in a loop.
This is unnecessary duplication since walk_page_range() calls find_vma()
in a loop already.
Simplify hmm_range_fault() by defining a walk_test() callback function
to filter unhandled vmas.
This also fixes a bug where hmm_range_faul
It attaches the colorspace connector property to a DisplayPort connector.
Based on colorspace change, modeset will be triggered to switch to a new
colorspace.
Based on colorspace property value create a VSC SDP packet with appropriate
colorspace. This would help to enable wider color gamut like BT
Becasue between HDMI and DP have different colorspaces, it renames
drm_mode_create_colorspace_property() function to
drm_mode_create_hdmi_colorspace_property() function for HDMI connector.
And it adds drm_mode_create_dp_colorspace_property() function for creating
of DP colorspace property.
In order
Adding a couple AMD guys.
I know this is already merged but I have a few questions after some
internal discussions.
On 2019-05-07 12:27 p.m., Ramalingam C wrote:
> On every hdcp revocation check request SRM is read from fw file
> /lib/firmware/display_hdcp_srm.bin
>
According to section 5 of th
Allow hmm_range_fault() to return success (0) when the range has no access
(!(vma->vm_flags & VM_READ)). The range->pfns[] array will be filled with
range->values[HMM_PFN_NONE] in this case.
This allows the caller to get a snapshot of a range without having to
lookup the vma before calling hmm_rang
These changes are based on Jason's latest hmm branch.
Patch 1 was previously posted here [1] but was dropped from the orginal
series. Hopefully, the tests will reduce concerns about edge conditions.
I'm sure more tests could be usefully added but I thought this was a good
starting point.
[1] https
> -Original Message-
> From: Wentland, Harry
> Sent: Wednesday, September 11, 2019 8:16 PM
> To: Ramalingam C ; intel-
> g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
> daniel.vet...@intel.com
> Cc: gwan-gyeong@intel.com; Kumar, Ranjeet
> ; Deucher, Alexander
> ; Lakha,
Support for HDR10 video was introduced in DisplayPort 1.4.
On GLK+ platform, in order to use DisplayPort HDR10, we need to support
BT.2020 colorimetry and HDR Static metadata.
It implements the CTA-861-G standard for transport of static HDR metadata.
It enables writing of HDR metadata infoframe SDP
It refactors and renames a function which handled vsc sdp header and data
block setup for supporting colorimetry format.
Function intel_dp_setup_vsc_sdp handles vsc sdp header and data block
setup for pixel encoding / colorimetry format.
In order to use colorspace information of a connector, it add
https://bugzilla.kernel.org/show_bug.cgi?id=204817
Bug ID: 204817
Summary: IP resume fail after changing dpm states rapidly
Product: Drivers
Version: 2.5
Kernel Version: 5.3.0-050300rc8-generic
Hardware: x86-64
OS: Linux
According to Bspec, GEN11 and prior GEN11 have different register size for
HDR Metadata Infoframe SDP packet. It adds new VIDEO_DIP_GMP_DATA_SIZE for
GEN11. And it makes handle different register size for
HDMI_PACKET_TYPE_GAMUT_METADATA on hsw_dip_data_size() for each GEN
platforms. It addresses Um
It attaches HDR metadata property to DP connector on GLK+.
It enables HDR metadata infoframe sdp on GLK+ to be used to send
HDR metadata to DP sink.
v2: Minor style fix
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_dp.c | 5 +
1 file changed
Register constants are upper case. Fix MGAREG_Status accordingly.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 6 +++---
drivers/gpu/drm/mgag200/mgag200_reg.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_
There's no VBLANK interrupt on Matrox chipsets. The workaround that is
being used here and in other free Matrox drivers is to program
to the value of and enable the VLINE interrupt. This triggers
an interrupt at the time when VBLANK begins.
VLINE uses separate registers for enabling and clearing
A full-screen memcpy() moves the console's shadow buffer to hardware; with
possibly significant runtime overhead. [1]
The console's dirty worker now waits for the vblank to rate limit the
output frequency. Screen output can pile up while waiting and there's a
chance that multiple screen updates ca
Before updating the display from the console's shadow buffer, the dirty
worker now waits for vblank. This allows several screen updates to pile
up and acts as a rate limiter.
v2:
* don't hold helper->lock while waiting for vblank
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_
https://bugs.freedesktop.org/show_bug.cgi?id=103769
--- Comment #17 from DillanWatsica ---
This is the main thing that if we want to get education then we should do
everything for this. I can say that of you are willing to get education then
you can go beyond https://assignment-helpers.co.uk/assi
Hi,
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Gwan-gyeong Mun
> Sent: torstai 12. syyskuuta 2019 6.25
> To: intel-...@lists.freedesktop.org
> Cc: imir...@alum.mit.edu; dri-devel@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH
On 2019-09-12 at 00:15:32 +, Harry Wentland wrote:
> Adding a couple AMD guys.
>
> I know this is already merged but I have a few questions after some
> internal discussions.
>
> On 2019-05-07 12:27 p.m., Ramalingam C wrote:
> > On every hdcp revocation check request SRM is read from fw file
Hi Ville,
On Mon, 2 Sep 2019 16:15:46 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Let's make cea_db_offsets() a bit more convenient to use by
> setting the start/end offsets to zero whenever the data block
> collection isn't present. This makes it safe for the caller
> to blindly iter
On Tue, 10 Sep 2019 12:48:42 +0300, Ville Syrjälä wrote:
> On Tue, Sep 10, 2019 at 11:46:20AM +0200, Jean Delvare wrote:
> > Hi Ville,
> >
> > On Mon, 2 Sep 2019 16:15:46 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Let's make cea_db_offsets() a bit more convenient to use
Tested-by: Gabriel Francisco
On 9/1/19 11:40 PM, Brian Masney wrote:
> Hi Rob C / Sean P,
>
> On Fri, Aug 23, 2019 at 05:16:30AM -0700, Brian Masney wrote:
>> This patch series adds support for Qualcomm's On Chip MEMory (OCMEM)
>> that is needed in order to support some a3xx and a4xx-based GPUs
>
Tested-by: Gabriel Francisco
On 9/1/19 11:40 PM, Brian Masney wrote:
> Hi Rob C / Sean P,
>
> On Fri, Aug 23, 2019 at 05:16:30AM -0700, Brian Masney wrote:
>> This patch series adds support for Qualcomm's On Chip MEMory (OCMEM)
>> that is needed in order to support some a3xx and a4xx-based GPUs
>
Hi Ville,
On Mon, 2 Sep 2019 16:15:45 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> CEA ext block revisions 1 and 2 do not contain the data block
> collection. Instead that section of the extension block is
> marked as reserved for 8 byte timing descriptors. Revision 3
> changed it to c
https://bugs.freedesktop.org/show_bug.cgi?id=111634
Michel Dänzer changed:
What|Removed |Added
Attachment #145327|text/x-log |text/plain
mime type|
On Tue, 10 Sep 2019 11:20:16 +
Simon Ser wrote:
> On Tuesday, September 10, 2019 1:38 PM, Pekka Paalanen
> wrote:
>
> > On Tue, 10 Sep 2019 10:09:55 +
> > Simon Ser cont...@emersion.fr wrote:
> >
> > > Currently the property docs don't specify whether it's okay for two
> > > planes
This series attempts to add support for software nodes to gpiolib, using
software node references that were introduced recently. This allows us
to convert more drivers to the generic device properties and drop
support for custom platform data:
static const struct software_node gpio_bank_b_node = {
https://bugs.freedesktop.org/show_bug.cgi?id=111635
Michel Dänzer changed:
What|Removed |Added
Attachment #145328|text/x-log |text/plain
mime type|
From: Yakir Yang
When transmitting IEC60985 linear PCM audio, we configure the
Aduio Sample Channel Status information in the IEC60958 frame.
The status bit is already available in iec.status of hdmi_codec_params.
This fix the issue that audio does not come out on some monitors
(e.g. LG 22CV241)
https://bugzilla.kernel.org/show_bug.cgi?id=201957
Ungureanu Alexandru (ungu...@yahoo.com) changed:
What|Removed |Added
CC||ungu...@yahoo.co
Remove always false comparisons due to limited range of nfl_bpg_offset
and scale_increment_interval fields.
Warnings detected when compiling with W=1.
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/drm_dsc.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/dr
On 2019-09-10 11:36 a.m., Hans de Goede wrote:
> On 9/10/19 9:50 AM, Michel Dänzer wrote:
>> On 2019-09-07 10:32 p.m., Hans de Goede wrote:
>>> Bail from the pci_driver probe function instead of from the drm_driver
>>> load function.
>>>
>>> This avoid /dev/dri/card0 temporarily getting registered
From: Colin Ian King
There is a spelling mistake in a literal string, fix it.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/selftests/test-drm_framebuffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/selftests/test-drm_framebuffer.c
b/drivers/gpu/d
https://bugs.freedesktop.org/show_bug.cgi?id=107877
Brett P. Gardner changed:
What|Removed |Added
Status|RESOLVED|CLOSED
URL|
https://bugs.freedesktop.org/show_bug.cgi?id=107877
Michel Dänzer changed:
What|Removed |Added
URL|https://routerlognnet.us/ |
Status|CLOSED
Op 08-07-2019 om 14:53 schreef Ville Syrjala:
> From: Ville Syrjälä
>
> Bspec says that glk+ max downscale factor is <3.0 for all pixel formats.
> Older platforms had a max of <2.0 for NV12. Update the code to deal with
> this.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/displa
On Tue, Sep 10, 2019 at 11:29:08PM +0200, Andreas Kemnade wrote:
> add enable-gpios to describe HWEN pin
>
> Signed-off-by: Andreas Kemnade
Acked-by: Daniel Thompson
> ---
> changes in v2: add example
> .../bindings/leds/backlight/lm3630a-backlight.yaml | 5 +
> 1 file changed,
removing people that are probably not interested from CC
adding dri-devel
On 9/11/19 11:08 AM, Koenig, Christian wrote:
Am 10.09.19 um 21:26 schrieb Thomas Hellström (VMware):
On 9/10/19 6:11 PM, Andy Lutomirski wrote:
On Sep 5, 2019, at 8:24 AM, Christoph Hellwig
wrote:
On Thu, Sep 05, 201
On Tue, Sep 10, 2019 at 11:29:09PM +0200, Andreas Kemnade wrote:
> For now just enable it in the probe function to allow i2c
> access. Disabling also means resetting the register values
> to default and according to the datasheet does not give
> power savings
>
> Tested on Kobo Clara HD.
>
> Sign
On Wed, Sep 11, 2019 at 11:53:54AM +0200, Maarten Lankhorst wrote:
> Op 08-07-2019 om 14:53 schreef Ville Syrjala:
> > From: Ville Syrjälä
> >
> > Bspec says that glk+ max downscale factor is <3.0 for all pixel formats.
> > Older platforms had a max of <2.0 for NV12. Update the code to deal with
>
The "lvds->backlight" pointer could be NULL in situations where
of_parse_phandle() returns NULL. This code is cleaner if we use the
managed devm_of_find_backlight() so the clean up is automatic.
Fixes: 7c9dff5bd643 ("drm: panels: Add LVDS panel driver")
Signed-off-by: Dan Carpenter
---
v3: Use d
On Tue, Sep 10, 2019 at 05:23:59PM +0200, Andreas Kemnade wrote:
> Devicetree aliases are missing, so that module autoloading
> does not work properly.
>
> Signed-off-by: Andreas Kemnade
Reviewed-by: Daniel Thompson
> ---
> drivers/video/backlight/lm3630a_bl.c | 4 +++-
> 1 file changed, 3 i
Am 03.09.19 um 10:05 schrieb Daniel Vetter:
On Thu, Aug 29, 2019 at 04:29:14PM +0200, Christian König wrote:
This patch is a stripped down version of the locking changes
necessary to support dynamic DMA-buf handling.
For compatibility we cache the DMA-buf mapping as soon as
exporter/importer di
VRAM MM and GEM VRAM buffer objects are only used with each other;
connected via 3 function pointers. Simplify this code by making the
memory manager call the rsp. functions of the BOs directly; and
remove the functions from the BO's public interface.
v2:
* typos in commit message
Signed-
The separation between GEM VRAM objects and the memory manager is
artificial, as they are only used with each other. Copying both
implementations into the same file is a first step to simplifying
the code.
This patch only moves code without functional changes.
v2:
* update for debugfs sup
The init, cleanup and mmap functions of VRAM MM are only used internally.
Remove them from the public interface.
v2:
* update for debugfs support
Signed-off-by: Thomas Zimmermann
Acked-by: Gerd Hoffmann
---
drivers/gpu/drm/drm_gem_vram_helper.c | 38 ---
include
The statement's condition is always true.
Signed-off-by: Thomas Zimmermann
Acked-by: Gerd Hoffmann
---
drivers/gpu/drm/drm_gem_vram_helper.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c
b/drivers/gpu/drm/drm_gem_vram_helper.c
index
VRAM MM and GEM VRAM are only used with each other. This patch set
moves VRAM MM into GEM VRAM source files and cleans up the helper's
public interface.
Version 2 of the patch set doesn't contain functional changes. I'm
reposting due to the rebasing onto the debugfs patches.
v2:
* updated
From: Colin Ian King
There is a spelling mistake in a gvt_dbg_core debug message. Fix it.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/gvt/vgpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
inde
https://bugs.freedesktop.org/show_bug.cgi?id=111659
Bug ID: 111659
Summary: Kernel panic when waking up after screens go to dpms
sleep
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (Al
https://bugs.freedesktop.org/show_bug.cgi?id=111659
--- Comment #1 from Brad Campbell ---
Created attachment 145333
--> https://bugs.freedesktop.org/attachment.cgi?id=145333&action=edit
Complete dmesg
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You are the assignee for the bug.___
https://bugs.freedesktop.org/show_bug.cgi?id=111659
--- Comment #2 from Brad Campbell ---
Created attachment 145334
--> https://bugs.freedesktop.org/attachment.cgi?id=145334&action=edit
Xorg log
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You are receiving this mail because:
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On Tue, 10 Sep 2019 at 08:35, Greg KH wrote:
>
> On Thu, Sep 05, 2019 at 10:17:44AM -0600, Mathieu Poirier wrote:
> > From: Tony Lindgren
> >
> > commit e128310ddd379b0fdd21dc41d176c3b3505a0832 upstream
> >
> > This adds support for get_timings() and check_timings()
> > to get the driver working
Hi all,
These series of patches introduce a feature to support secure buffer object.
The Trusted Memory Zone (TMZ) is a method to protect the contents being written
to and read from memory. We use TMZ hardware memory protection scheme to
implement the secure buffer object support.
TMZ is the page
Add a function to check tmz capability with kernel parameter and ASIC type.
v2: use a per device tmz variable instead of global amdgpu_tmz.
v3: refine the comments for the function. (Luben)
v4: add amdgpu_tmz.c/h for future use.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gp
This patch to add amdgpu_tmz structure which stores all tmz related fields.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 6 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_tmz.h | 36 +
2 files changed, 41 insertions(
This patch is to add a helper to get corresponding buffer object with a pointer
to a struct ttm_mem_reg.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
include/drm/ttm/ttm_bo_driver.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/include/drm/ttm/ttm_bo_driver.h b/in
This patch adds tmz parameter to enable/disable the feature in the amdgpu kernel
module. Nomally, by default, it should be auto (rely on the hardware
capability).
But right now, it need to set "off" to avoid breaking other developers'
work because it's not totally completed.
Will set "auto" till
This patch adds tmz bit in frame control pm4 packet, and it will used in future.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nvd.h| 1 +
drivers/gpu/drm/amd/amdgpu/soc15d.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu
From: Alex Deucher
Add a flag to the GEM_CREATE ioctl to create encrypted buffers.
Buffers with this flag set will be created with the TMZ bit set
in the PTEs or engines accessing them. This is required in order
to properly access the data from the engines.
Signed-off-by: Alex Deucher
Reviewed
From: Alex Deucher
Add a flag for when allocating a context to flag it as
secure. The kernel driver will use this flag to determine
whether a rendering context is secure or not so that the
engine can be transitioned between secure or unsecure
or the work can be submitted to a secure queue depend
The is_secure flag will indicate the current conext is protected or not.
v2: while user mode asks to create a context, but if tmz is disabled, it should
return failure.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 19 +++
driv
From: Alex Deucher
Define the TMZ (encryption) bit in the page table entry (PTE) for
Raven and newer asics.
Signed-off-by: Alex Deucher
Reviewed-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm
amdgpu_ttm_tt_pte_flags will be used for updating tmz bits while the bo is
secure, so we need pass the ttm_mem_reg under a buffer object.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 ++
1 file changed, 10 insertions(+), 8 d
From: Alex Deucher
If one bo is secure (created with AMDGPU_GEM_CREATE_ENCRYPTED), the TMZ bits of
PTEs that belongs that bo should be set. Then psp is able to protect the pages
of this bo to avoid the access from an "untrust" domain such as CPU.
v1: design and draft the skeletion of tmz bits se
While user mode submit a command with secure context, we should set the command
buffer with trusted mode.
v2: fix the null job pointer while in vmid 0 submission.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 1 +
drivers/gpu/drm/amd/amdgpu/am
This patch expands the context control function to support trusted flag while we
want to set command buffer in trusted mode.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 5 +++--
drivers/gpu/dr
This patch expands the emit_tmz function to support trusted flag while we want
to set command buffer in trusted mode.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4 ++--
drivers/gpu/drm/amd/
The VRAM helper's vmap interfaces provide pinning and mapping of BO
memory. This patch replaces the respective code in mgag200 cursor handling.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/mgag200/mgag200_cursor.c | 22 +++---
1 file changed, 7 insertions(+), 15 deletions
The implementation of vmap and vunmap for GEM VRAM helpers is
already in PRIME helpers. The patch moves the operations to separate
functions and exports them for general use.
v3:
* remove v2's obsolete note on ref-counting
v2:
* fix documentation
* add cross references to f
The ast and mgag200 drivers pin() and kmap() cursor buffers; essentially
reimplementing vmap(). We can share some code by using the respective
functionality from GEM VRAM buffer objects.
Thomas Zimmermann (3):
drm/vram: Provide vmap and vunmap operations for GEM VRAM objects
drm/ast: Use drm_g
The VRAM helper's vmap interfaces provide pinning and mapping of BO
memory. This patch replaces the respective code in ast cursor handling.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_mode.c | 21 +++--
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git
FYI this is actually version 3 of the patch set posted at
[1] and [2]
[1] https://lists.freedesktop.org/archives/dri-devel/2019-July/227823.html
[2] https://lists.freedesktop.org/archives/dri-devel/2019-July/228074.html
Am 11.09.19 um 14:03 schrieb Thomas Zimmermann:
> The ast and mgag200 drivers
Patches #1-#4, #8, #9 are Reviewed-by: Christian König
Patches #10, #11 are Acked-by: Christian König
Patches #7 and the resulting workaround in patch #13 are a clear NAK.
The ttm_mem_reg can't be used like this to get back to the ttm_bo object.
Going to reply separately on patch #14 regardi
Am 11.09.19 um 13:50 schrieb Huang, Ray:
> From: Alex Deucher
>
> If one bo is secure (created with AMDGPU_GEM_CREATE_ENCRYPTED), the TMZ bits
> of
> PTEs that belongs that bo should be set. Then psp is able to protect the pages
> of this bo to avoid the access from an "untrust" domain such as CP
https://bugs.freedesktop.org/show_bug.cgi?id=108917
--- Comment #15 from tempel.jul...@gmail.com ---
To clarify: There is no connection to any compositor. You can also reproduce
the issue with any desktop environment where you can disable the compositor.
Instead of using a compositor then, simply
On 2019-09-11 4:47 a.m., Benjamin Gaignard wrote:
> Remove always false comparisons due to limited range of nfl_bpg_offset
> and scale_increment_interval fields.
> Warnings detected when compiling with W=1.
>
> Signed-off-by: Benjamin Gaignard
Reviewed-by: Harry Wentland
Harry
> ---
> driver
On Tue, 10 Sep 2019 at 08:36, Greg KH wrote:
>
> On Thu, Sep 05, 2019 at 10:17:45AM -0600, Mathieu Poirier wrote:
> > From: Roger Quadros
> >
> > commit 42bf02ec6e420e541af9a47437d0bdf961ca2972 upstream
> >
> > Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble
> > with the metastabi
Am 11.09.19 um 12:10 schrieb Thomas Hellström (VMware):
[SNIP]
>>> The problem seen in TTM is that we want to be able to change the
>>> vm_page_prot from the fault handler, but it's problematic since we
>>> have the mmap_sem typically only in read mode. Hence the fake vma
>>> hack. From what I can
https://bugs.freedesktop.org/show_bug.cgi?id=111659
Michel Dänzer changed:
What|Removed |Added
Attachment #145334|text/x-log |text/plain
mime type|
Hi Dave & Daniel -
A couple more fixes for v5.3, both cc: stable.
drm-intel-fixes-2019-09-11:
Final drm/i915 fixes for v5.3:
- Fox DP MST high color depth regression
- Fix GPU hangs on Vulkan compute workloads
BR,
Jani.
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