Michael Ellerman writes:
> Christophe Leroy writes:
>
>> Set PAGE_KERNEL directly in the caller and do not rely on a
>> hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
>>
>> As already done for PPC64, use pgprot_cache() helpers instead of
>> _PAGE_XXX flags in PPC32 ioremap() derive
LEROY Christophe a écrit :
Michael Ellerman a écrit :
Christophe Leroy writes:
Set PAGE_KERNEL directly in the caller and do not rely on a
hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
As already done for PPC64, use pgprot_cache() helpers instead of
_PAGE_XXX flags in PPC3
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Notice that in this particular case, I replaced "Pass through." with
"Fall through.", which is what GCC is expecting to find.
Addresses-Coverity-ID: 114734 ("Missing break in switch")
Addr
This patch avoids that building the bridge/analogix source code with
smatch triggers complaints about inconsistent indenting.
Signed-off-by: Enric Balletbo i Serra
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --g
'encoder' is deferenced before it is null sanity checked, hence we
potentially have a null pointer dereference bug. Instead, initialise
drm_drv from encoder->dev->dev_private after we are sure 'encoder' is
not null.
Fixes: 5182c1a556d7f ("drm/rockchip: add an common abstracted PSR driver")
Signed-
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Addresses-Coverity-ID: 1357317 ("Missing break in switch")
Signed-off-by: Gustavo A. R. Silva
---
drivers/gpu/drm/radeon/r420.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers
On Sunday 07 October 2018 03:08 PM, Jernej Skrabec wrote:
Video PLL factors can be set in a way that final PLL rate is outside
stable range. H6 user manual specifically says that N factor should not
be below 12. While it doesn't says anything about maximum stable rate, it
Manual says "In applic
Michael Ellerman a écrit :
Michael Ellerman writes:
Christophe Leroy writes:
Set PAGE_KERNEL directly in the caller and do not rely on a
hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
As already done for PPC64, use pgprot_cache() helpers instead of
_PAGE_XXX flags in PPC32
On 10/12/18 7:29 PM, Alex Deucher wrote:
> This and the r420 patch applied. Thanks!
>
Thanks, Alex. :)
--
Gustavo
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On Fri, 12 Oct 2018, Laura Abbott wrote:
> On 10/10/2018 04:33 PM, John Stultz wrote:
> > Since 4.12, much later narrowed down to commit 2a55e7b5e544
> > ("staging: android: ion: Call dma_map_sg for syncing and mapping"),
> > we have seen graphics performance issues on the HiKey960.
> >
> > This
Hi David:
Could you review and apply these 2 patches?
Regards,
Aaron
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On Tue, 2018-10-09 at 13:51:33 UTC, Christophe Leroy wrote:
> Other arches have ioremap_wt() to map IO areas write-through.
> Implement it on PPC as well in order to avoid drivers using
> __ioremap(_PAGE_WRITETHRU)
>
> Also implement ioremap_coherent() to avoid drivers using
> __ioremap(_PAGE_COHE
Michael Ellerman a écrit :
Christophe Leroy writes:
Set PAGE_KERNEL directly in the caller and do not rely on a
hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
As already done for PPC64, use pgprot_cache() helpers instead of
_PAGE_XXX flags in PPC32 ioremap() derived functions.
Christophe Leroy writes:
> Set PAGE_KERNEL directly in the caller and do not rely on a
> hack adding PAGE_KERNEL flags when _PAGE_PRESENT is not set.
>
> As already done for PPC64, use pgprot_cache() helpers instead of
> _PAGE_XXX flags in PPC32 ioremap() derived functions.
>
> Signed-off-by: Chr
> Now amdgpu switched over
Well exactly that's the point. amdgpu has *NOT* switched the order over.
> like i915 did yearsearlier
I actually consider this a problem in i915 which should be fixed sooner
or later.
The locking in the fault handler as exposed by TTM is actually pointing
out a deeper
On Sat, Oct 13, 2018 at 5:17 PM Christoph Hellwig wrote:
>
> The DMA API does its own zone decisions based on the coherent_dma_mask.
>
> Signed-off-by: Christoph Hellwig
Acked-by: Rafael J. Wysocki
> ---
> drivers/cpufreq/tegra186-cpufreq.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion
On 13.10.2018 12:21, Dan Carpenter wrote:
> The of_drm_find_panel() function returns error pointers and never NULL
> but we the driver assumes that ->panel is NULL when it's not present.
>
> Fixes: 6afb7721e2a0 ("drm/exynos: move connector creation to attach callback")
> Signed-off-by: Dan Carpent
On Fri, 2018-10-12 at 11:42 -0700, Radhakrishna Sripada wrote:
> Use the newly added "max bpc" connector property to limit pipe bpp.
>
> V3: Use drm_connector_state to access the "max bpc" property
> V4: Initialize the drm property, add suuport to DP(Ville)
> V5: Use the property in the connector
On Fri, Oct 12, 2018 at 11:46:39AM +0200, Benjamin Gaignard wrote:
> Since drm_atomic_helper_shutdown() rework it is possible to do additional
> clean up in sti driver: custom plane destroy functions become useless and
> clean up encoder is no more needed.
>
> Signed-off-by: Benjamin Gaignard
> -
Hi!
Interesting disscussion. Some comments below.
On 10/15/2018 09:41 AM, Koenig, Christian wrote:
Now amdgpu switched over
Well exactly that's the point. amdgpu has *NOT* switched the order over.
like i915 did yearsearlier
I actually consider this a problem in i915 which should be fixed so
Hi,
On Fri, Oct 12, 2018 at 06:47:13PM +0200, Paul Kocialkowski wrote:
> I'm looking at the sun4i DRM driver these days (especially for
> mainlining the VPU tiled format support through the frontend).
>
> The way things are done currently, all the possibly-supported plane
> formats are listed in
Hi Thomas,
> 1. You need the a lock with the order lock->mmap_sem, cause otherwise
> you run into trouble when drm_vma_node_unmap() needs to be called.
> Why is this? unmap_mapping_range() never takes the mmap_sem. It takes
> a finer-level per-address-space lock.
Well, that is interesting. Where
https://bugs.freedesktop.org/show_bug.cgi?id=108260
Daniel Exner changed:
What|Removed |Added
CC||dex+fdobugzilla@dragonslave
flags can be used by driver to decide whether need to block wait submission.
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
drivers/gpu/drm/drm_syncobj.c | 4 ++--
drivers/gpu/drm/v3d/v3d_gem.c | 4 ++--
drivers/gpu/drm/vc4/vc4_gem.c |
This patch is for VK_KHR_timeline_semaphore extension, semaphore is called
syncobj in kernel side:
This extension introduces a new type of syncobj that has an integer payload
identifying a point in a timeline. Such timeline syncobjs support the
following operations:
* CPU query - A host operati
points array is one-to-one match with syncobjs array.
v2:
add seperate ioctl for timeline point wait, otherwise break uapi.
v3:
userspace can specify two kinds waits::
a. Wait for time point to be completed.
b. and wait for time point to become available
Signed-off-by: Chunming Zhou
---
drivers/
user mode can query timeline payload.
v2: check return value of copy_to_user
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/drm_internal.h | 2 ++
drivers/gpu/drm/drm_ioctl.c| 2 ++
drivers/gpu/drm/drm_syncobj.c | 52 ++
include/uapi/drm/drm.h | 1
syncobj wait/signal operation is appending in command submission.
v2: separate to two kinds in/out_deps functions
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 8 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 111 +
include/uapi/drm/amdgpu_drm.
user space can specify timeline point fence to export/import.
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/drm_internal.h | 4 ++
drivers/gpu/drm/drm_ioctl.c| 4 ++
drivers/gpu/drm/drm_syncobj.c | 76 ++
include/uapi/drm/drm.h | 11 +
4 file
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 6870909da926..58cba492ba55 100644
--- a/drivers/gpu/drm/amd/amdgp
Ping...
Christian, Could I get your RB on the series? And help me to push to drm-misc?
After that I can rebase libdrm header file based on drm-next.
Thanks,
David Zhou
> -Original Message-
> From: amd-gfx On Behalf Of
> Chunming Zhou
> Sent: Monday, October 15, 2018 4:56 PM
> To: dri-dev
I'm on sick leave today.
But I will see what I can do later in the afternoon,
Christian.
Am 15.10.2018 um 11:01 schrieb Zhou, David(ChunMing):
> Ping...
> Christian, Could I get your RB on the series? And help me to push to drm-misc?
> After that I can rebase libdrm header file based on drm-next.
Le sam. 13 oct. 2018 à 17:17, Christoph Hellwig a écrit :
>
> The DMA API does its own zone decisions based on the coherent_dma_mask.
>
> Signed-off-by: Christoph Hellwig
Reviewed-by: Benjamin Gaignard
> ---
> drivers/gpu/drm/sti/sti_gdp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(
Le sam. 13 oct. 2018 à 17:18, Christoph Hellwig a écrit :
>
> The DMA API does its own zone decisions based on the coherent_dma_mask.
>
> Signed-off-by: Christoph Hellwig
Reviewed-by: Benjamin Gaignard
> ---
> drivers/media/platform/sti/bdisp/bdisp-hw.c | 2 +-
> 1 file changed, 1 insertion(+
On 2018-10-13 7:38 p.m., Christian König wrote:
> Am 12.10.2018 um 18:44 schrieb Nicholas Kazlauskas:
>> This patch introduces the 'vrr_enabled' CRTC property to allow
>> dynamic control over variable refresh rate support for a CRTC.
>>
>> This property should be treated like a content hint to the
Am 15.10.2018 um 11:40 schrieb Michel Dänzer:
On 2018-10-13 7:38 p.m., Christian König wrote:
Am 12.10.2018 um 18:44 schrieb Nicholas Kazlauskas:
This patch introduces the 'vrr_enabled' CRTC property to allow
dynamic control over variable refresh rate support for a CRTC.
This property should b
On 2018-10-15 11:47 a.m., Christian König wrote:
> Am 15.10.2018 um 11:40 schrieb Michel Dänzer:
>> On 2018-10-13 7:38 p.m., Christian König wrote:
>>> Am 12.10.2018 um 18:44 schrieb Nicholas Kazlauskas:
This patch introduces the 'vrr_enabled' CRTC property to allow
dynamic control over v
https://bugs.freedesktop.org/show_bug.cgi?id=108356
--- Comment #3 from Michel Dänzer ---
FWIW, if drm_hwcomposer uses the vertical blank interrupt for flip completion,
that's a drm_hwcomposer bug. Page flips generate their own events signalling
completion.
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You are receiving this mail becaus
On 10/15/2018 10:43 AM, Koenig, Christian wrote:
Hi Thomas,
1. You need the a lock with the order lock->mmap_sem, cause otherwise
you run into trouble when drm_vma_node_unmap() needs to be called.
Why is this? unmap_mapping_range() never takes the mmap_sem. It takes
a finer-level per-address-sp
Am 15.10.2018 um 12:06 schrieb Michel Dänzer:
> [SNIP]
> Apart from the above, another issue is that this would give direct
> control to the client on whether or not VRR should be used. But we want
> to allow the user to disable VRR even if a client wants to use it, via
> an RandR output property.
Am 15.10.2018 um 12:42 schrieb Thomas Hellstrom:
> On 10/15/2018 10:43 AM, Koenig, Christian wrote:
>> Hi Thomas,
>>
>>> 1. You need the a lock with the order lock->mmap_sem, cause otherwise
>>> you run into trouble when drm_vma_node_unmap() needs to be called.
>>> Why is this? unmap_mapping_range(
On Fri, 05 Oct 2018, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> HDMI Forum VSDB YCBCR420 deep color capability bits are 2:0. Correct
> definitions in the header for the mask to work correctly.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107893
> Signed-off-by: Clint
On Mon, 15 Oct 2018, Jani Nikula wrote:
> On Fri, 05 Oct 2018, clinton.a.tay...@intel.com wrote:
>> From: Clint Taylor
>>
>> HDMI Forum VSDB YCBCR420 deep color capability bits are 2:0. Correct
>> definitions in the header for the mask to work correctly.
>>
>> Bugzilla: https://bugs.freedesktop.o
Le lun. 24 sept. 2018 à 13:59, Yannick Fertré a écrit :
>
> Add missing flags for pixel clock & data enable polarities.
> These flags are similar to other synchronization signals (hsync, vsync...).
>
> Signed-off-by: Yannick Fertré
Reviewed-by: Benjamin Gaignard
> ---
> drivers/gpu/drm/drm_mo
Le lun. 24 sept. 2018 à 14:05, Yannick Fertré a écrit :
>
> Wrong flags used for set the pixel clock & data enable polarities.
> Add trace for polarities of hsync, vsync, data enabled & pixel clock.
>
> Signed-off-by: Yannick Fertré
Reviewed-by: Benjamin Gaignard
> ---
> drivers/gpu/drm/stm/ltd
On 10/15/2018 12:55 PM, Koenig, Christian wrote:
Am 15.10.2018 um 12:42 schrieb Thomas Hellstrom:
On 10/15/2018 10:43 AM, Koenig, Christian wrote:
Hi Thomas,
1. You need the a lock with the order lock->mmap_sem, cause otherwise
you run into trouble when drm_vma_node_unmap() needs to be called
https://bugs.freedesktop.org/show_bug.cgi?id=108322
--- Comment #13 from Nicholas Kazlauskas ---
(In reply to bmilreu from comment #10)
> https://www.phoronix.com/scan.php?page=news_item&px=AMD-V4-Adaptive-VRR-
> FreeSync
> Is this maybe related?
This would be unrelated - those patches are still
On 10/11/2018 02:16 AM, Deepak Rawat wrote:
Update comments to sync with code.
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
b/drivers/gpu/drm/
With some nitpicks sent out previously
Reviewed-by: Thomas Hellstrom
On 10/11/2018 02:16 AM, Deepak Rawat wrote:
From: Lukasz Spintzyk
FB_DAMAGE_CLIPS is an optional plane property to mark damaged regions
on the plane in framebuffer coordinates of the framebuffer attached to
the plane.
The
On 10/11/2018 02:16 AM, Deepak Rawat wrote:
Update the commet to sync with code.
Minor typo above^
Signed-off-by: Deepak Rawat
---
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_std
On 10/11/2018 02:16 AM, Deepak Rawat wrote:
With kernel commit 4f09c77b5c3b7, no need to clear mode::type for
user-space bug.
That commit-id will change as soon as we put the commit on vmwgfx-next.
I'd recomment citing the commit title instead.
/Thomas
Signed-off-by: Deepak Rawat
---
dr
https://bugs.freedesktop.org/show_bug.cgi?id=106175
--- Comment #28 from Nicholas Kazlauskas ---
(In reply to tempel.julian from comment #27)
> Is this commit related to it?
> https://lists.freedesktop.org/archives/amd-gfx/2018-October/027726.html
It shouldn't be. You would likely be experiencin
From: Leo Li
This fixes a general protection fault, caused by accessing the contents
of a flip_done completion object that has already been freed. It occurs
due to the preemption of a non-blocking commit worker thread W by
another commit thread X. X continues to clear its atomic state at the
end,
On Fri, 12 Oct 2018 08:58:23 -0400
"Kazlauskas, Nicholas" wrote:
> On 10/12/2018 07:20 AM, Koenig, Christian wrote:
> > Am 12.10.2018 um 11:21 schrieb Pekka Paalanen:
> >> On Fri, 12 Oct 2018 07:35:57 +
> >> "Koenig, Christian" wrote:
> >>
> >>> Am 12.10.2018 um 09:23 schrieb Pekka Paala
Regards
Shashank
On 10/15/2018 4:39 PM, Jani Nikula wrote:
On Mon, 15 Oct 2018, Jani Nikula wrote:
On Fri, 05 Oct 2018, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
HDMI Forum VSDB YCBCR420 deep color capability bits are 2:0. Correct
definitions in the header for the mask to work
On Mon, Aug 27, 2018 at 09:11:09AM -0600, Jordan Crouse wrote:
> Add the "opp-interconnect-bw" property to specify the
> average and peak bandwidth for an interconnect path for
> a specific operating power point. A separate bandwidth
> pair can be specified for each of the interconnects
> defined f
On Mon, Oct 15, 2018 at 03:33:27PM +0530, Viresh Kumar wrote:
> On 11-10-18, 08:54, Jordan Crouse wrote:
>
> I understand what you are trying to say Jordan and I agree with those
> expectations. But what I am looking for is consistency across Qcom
> code using the same feature. Which enables bette
On Mon, Oct 15, 2018 at 2:30 PM Thomas Hellstrom wrote:
>
> On 10/15/2018 12:55 PM, Koenig, Christian wrote:
> > Am 15.10.2018 um 12:42 schrieb Thomas Hellstrom:
> >> On 10/15/2018 10:43 AM, Koenig, Christian wrote:
> >>> Hi Thomas,
> >>>
> 1. You need the a lock with the order lock->mmap_sem
The leadership of freedesktop.org (fd.o) has recently expressed interest
in having an elected governing body. Given the tight connection between
fd.o and X.Org and the fact that X.Org has such a governing body it
seemed obvious to consider extending X.Org's mandate to fd.o.
Quite a bit of backgrou
On Mon, Oct 15, 2018 at 10:29 AM Maxime Ripard
wrote:
> On Fri, Oct 12, 2018 at 06:47:13PM +0200, Paul Kocialkowski wrote:
> > I'm looking at the sun4i DRM driver these days (especially for
> > mainlining the VPU tiled format support through the frontend).
> >
> > The way things are done currently
On Mon, Oct 15, 2018 at 09:34:20AM -0500, Rob Herring wrote:
> On Mon, Aug 27, 2018 at 09:11:09AM -0600, Jordan Crouse wrote:
> > Add the "opp-interconnect-bw" property to specify the
> > average and peak bandwidth for an interconnect path for
> > a specific operating power point. A separate bandwi
On Fri, 21 Sep 2018 19:08:27 +0100, Fabrizio Castro wrote:
> Document the RZ/G1C (r8a77470) SoC in R-Car DU bindings.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
> ---
> Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewe
On Fri, 21 Sep 2018 19:08:28 +0100, Fabrizio Castro wrote:
> From: Biju Das
>
> Document the RZ/G1N (R8A7744) SoC in the R-Car DU bindings.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
> ---
> Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
> 1 file changed, 2 i
On 10/15/2018 04:47 PM, Daniel Vetter wrote:
On Mon, Oct 15, 2018 at 2:30 PM Thomas Hellstrom wrote:
On 10/15/2018 12:55 PM, Koenig, Christian wrote:
Am 15.10.2018 um 12:42 schrieb Thomas Hellstrom:
On 10/15/2018 10:43 AM, Koenig, Christian wrote:
Hi Thomas,
1. You need the a lock with the
On Mon, Oct 15, 2018 at 5:24 PM Thomas Hellstrom wrote:
> On 10/15/2018 04:47 PM, Daniel Vetter wrote:
> > On Mon, Oct 15, 2018 at 2:30 PM Thomas Hellstrom
> > wrote:
> >> On 10/15/2018 12:55 PM, Koenig, Christian wrote:
> >>> Am 15.10.2018 um 12:42 schrieb Thomas Hellstrom:
> On 10/15/2018
https://bugs.freedesktop.org/show_bug.cgi?id=108098
--- Comment #3 from Antonio Chirizzi ---
Hello,
after a few days without problems, I got a complete freeze today.
The laptop was really stuck, not ssh access was possible.
In the mean time I managed to install the latest LinuxMint 19 Cinnamon,
https://bugs.freedesktop.org/show_bug.cgi?id=108350
--- Comment #2 from Michel Dänzer ---
Can you bisect the kernel?
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ht
On 10/15/2018 09:57 AM, Pekka Paalanen wrote:
On Fri, 12 Oct 2018 08:58:23 -0400
"Kazlauskas, Nicholas" wrote:
On 10/12/2018 07:20 AM, Koenig, Christian wrote:
Am 12.10.2018 um 11:21 schrieb Pekka Paalanen:
On Fri, 12 Oct 2018 07:35:57 +
"Koenig, Christian" wrote:
Am 12.10.2018 um 0
> On Wed, Oct 10, 2018 at 05:16:43PM -0700, Deepak Rawat wrote:
> > Selftest for drm damage helper iterator functions.
> >
> > Cc: ville.syrj...@linux.intel.com
> > Cc: Daniel Vetter
> > Cc: Pekka Paalanen
> > Cc: Daniel Stone
> > Cc: intel-...@lists.freedesktop.org
> > Cc: igt-...@lists.freedes
On Fri, Oct 12, 2018 at 10:51 AM, Laura Abbott wrote:
> On 10/10/2018 04:33 PM, John Stultz wrote:
>>
>> Since 4.12, much later narrowed down to commit 2a55e7b5e544
>> ("staging: android: ion: Call dma_map_sg for syncing and mapping"),
>> we have seen graphics performance issues on the HiKey960.
>
On Sat, Oct 13, 2018 at 11:01 PM, Liam Mark wrote:
> On Fri, 12 Oct 2018, Laura Abbott wrote:
>> I thought there might have been some Qualcomm
>> stuff that did that (Liam? Todd?)
>
> Yes we have a form of "lazy mapping", which clients can opt into using,
> which results in iommu page table mappin
On October 15, 2018 2:50:13 PM UTC, Harry Wentland
wrote:
> The leadership of freedesktop.org (fd.o) has recently expressed
> interest
> in having an elected governing body. Given the tight connection
> between
> fd.o and X.Org and the fact that X.Org has such a governing body it
> seemed obvious
For historical reason, the function drm_wait_vblank_ioctl always return
-EINVAL if something gets wrong. This scenario limits the flexibility
for the userspace make detailed verification of the problem and take
some action. In particular, the validation of “if (!dev->irq_enabled)”
in the drm_wait_v
https://bugs.freedesktop.org/show_bug.cgi?id=107261
--- Comment #8 from Vedran Miletić ---
I get these errors on Ryzen 7 2700U
03:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc.
[AMD/ATI] Raven Ridge [Radeon Vega Series / Radeon Vega Mobile Series]
[1002:15dd] (rev c3) (prog-
Userspace hasn't used submit cmds with submit_offset != 0 for a while,
but this starts cropping up again with cmdstream sub-buffer-allocation
in libdrm_freedreno.
Doesn't do much good to increment the buf ptr before assigning it.
Fixes: 78b8e5b847b4 drm/msm: dump a rd GPUADDR header for all buffe
https://bugs.freedesktop.org/show_bug.cgi?id=107823
--- Comment #6 from Drexler ---
Hi,
was wondering if you can share the EDID of this NEC EA223WM monitor?
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On Mon, Oct 15, 2018 at 12:52 AM Jonathan Gray wrote:
>
> Commit b24413180f5600bcb3bb70fbed5cf186b60864bd
> 'License cleanup: add SPDX GPL-2.0 license identifier to files with no
> license'
> incorrectly added "SPDX-License-Identifier: GPL-2.0" to a file with MIT
> license text. Change the SPDX
On Mon, Oct 15, 2018 at 12:53 AM Jonathan Gray wrote:
>
> Commit b24413180f5600bcb3bb70fbed5cf186b60864bd added
> "SPDX-License-Identifier: GPL-2.0" to files which previously had no
> license, change this to MIT for radeon matching the license text of the
> other radeon files.
>
> Signed-off-by: J
Five tests:
1) Check for non-null function pointers
2) Check for in-range time domains
3) Check monotonic domains for correct values
4) Check correlation between monotonic and device domains
5) Check to make sure times in device domain match queue times
Signed-off-by: Keith Packard
---
Mak
We're using MRs for crucible. Please create one and make sure you check
the "Allow commits from members who can merge to the target branch" so it
can be rebased through the UI by someone other than yourself.
--Jason
On Mon, Oct 15, 2018 at 4:15 PM Keith Packard wrote:
> Five tests:
>
> 1) Che
Offers three clocks, device, clock monotonic and clock monotonic
raw. Could use some kernel support to reduce the deviation between
clock values.
v2:
Ensure deviation is at least as big as the GPU time interval.
Signed-off-by: Keith Packard
---
src/amd/vulkan/radv_device.c | 84 ++
Jason Ekstrand writes:
> We're using MRs for crucible. Please create one and make sure you check
> the "Allow commits from members who can merge to the target branch" so it
> can be rebased through the UI by someone other than yourself.
OOo. Shiny!
--
-keith
signature.asc
Description: PGP s
If a command buffer doesn't have any relocs assigned to it there then
is no need to map it in the kernel address space.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/msm_gem_submit.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c
b/drivers/gpu
On Mon, Oct 15, 2018 at 4:22 PM Keith Packard wrote:
> Offers three clocks, device, clock monotonic and clock monotonic
> raw. Could use some kernel support to reduce the deviation between
> clock values.
>
> v2:
> Ensure deviation is at least as big as the GPU time interval.
>
> Signed-o
On 15/10/2018 22:22, Keith Packard wrote:
+#define TIMESTAMP 0x2358
+
+VkResult radv_GetCalibratedTimestampsEXT(
Heh, I think you copied that define over from Anv ;)
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https://bugs.freedesktop.org/show_bug.cgi?id=108317
--- Comment #8 from John Galt ---
I've found evidence of Polaris users without this issue on llvm 6 + mesa mild.
However, my attempts at downgrading and building with llvm 6 and current mesa
haven't gone well yet.
At least we know this is proba
On Wed, Oct 10, 2018 at 05:16:41PM -0700, Deepak Rawat wrote:
> This helper function makes sure that damage from plane state is
> discarded for full modeset cycle. For some reason, which makes damage
> irrelevant, driver might want to do a full plane update for e.g. full
> modeset. Such cases must
Hi Fabrizio,
Thank you for the patch.
On Friday, 21 September 2018 21:08:27 EEST Fabrizio Castro wrote:
> Document the RZ/G1C (r8a77470) SoC in R-Car DU bindings.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
Reviewed-by: Laurent Pinchart
and taken in my tree.
> ---
> Documen
Hi Fabrizio,
Thank you for the patch.
On Friday, 21 September 2018 21:08:28 EEST Fabrizio Castro wrote:
> From: Biju Das
>
> Document the RZ/G1N (R8A7744) SoC in the R-Car DU bindings.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Laurent Pinchart
and taken in my
Hi Fabrizio,
Thank you for the patch.
On Friday, 21 September 2018 21:08:29 EEST Fabrizio Castro wrote:
> Add RZ/G1C (a.k.a. r8a77470) support to the R-Car DU driver.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
> ---
> drivers/gpu/drm/rcar-du/rcar_du_drv.c | 26
Hi Fabrizio,
Thank you for the patch.
On Friday, 21 September 2018 21:08:30 EEST Fabrizio Castro wrote:
> From: Biju Das
>
> Add support for the R8A7744 DU (which is very similar to the R8A7743 DU);
> it has 1 DPAD (RGB) output and 1 LVDS output.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fa
Offers three clocks, device, clock monotonic and clock monotonic
raw. Could use some kernel support to reduce the deviation between
clock values.
v2:
Ensure deviation is at least as big as the GPU time interval.
v3:
Set device->lost when returning DEVICE_LOST.
Use MAX2 and
Hi Enric,
Thank you for the patch.
On Saturday, 13 October 2018 14:18:44 EEST Enric Balletbo i Serra wrote:
> This patch avoids that building the bridge/analogix source code with
> smatch triggers complaints about inconsistent indenting.
>
> Signed-off-by: Enric Balletbo i Serra
> ---
>
> dri
LANG=C sort -u .gitignore | sponge .gitignore
This way it's easier to keep track of the entries.
Signed-off-by: Lucas De Marchi
---
.gitignore | 56 +++---
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/.gitignore b/.gitignore
ind
This is the directory used by meson/autotools (at least in the
.gitlab-ci configuration) so ignore the whole dir.
Signed-off-by: Lucas De Marchi
---
.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/.gitignore b/.gitignore
index 49cced50..54365c7c 100644
--- a/.gitignore
+++ b/.giti
On Mon, Oct 15, 2018 at 6:05 PM Keith Packard wrote:
> Offers three clocks, device, clock monotonic and clock monotonic
> raw. Could use some kernel support to reduce the deviation between
> clock values.
>
> v2:
> Ensure deviation is at least as big as the GPU time interval.
>
> v3:
>
Hi Imre/Ville,
This patch adds the power domain as per our discussion and feedback
on previous patch set.
Could you please take a look at this?
Manasi
On Fri, Oct 05, 2018 at 04:22:57PM -0700, Manasi Navare wrote:
> On Icelake, a separate power well PG2 is created for
> VDSC engine used for eDP
Hi Ville,
This adds a helper function to get the power well as per
the transcoder as per your suggestion.
Could you please review this one?
Regards
Manasi
On Fri, Oct 05, 2018 at 04:23:04PM -0700, Manasi Navare wrote:
> A separate power well 2 (PG2) is required for VDSC on eDP transcoder
> where
Hi Jani,
This patch adds the cpu_to_be16 macro and removes the bitfields and
uses macros instead for packing the infoframe as per your feedback
on the previous version of the patch.
Could you please review this patch?
Regards
Manasi
On Fri, Oct 05, 2018 at 04:22:49PM -0700, Manasi Navare wrote:
Hi Jani,
This patch has a verbal ACK from you when we went over the patch together,
This is rebased on top of edp fast/narrow optimized config like we discussed.
could you please review this?
Regards
Manasi
On Fri, Oct 05, 2018 at 04:22:51PM -0700, Manasi Navare wrote:
> DSC params like the enab
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