Dne sobota, 22. september 2018 ob 15:47:03 CEST je Chen-Yu Tsai napisal(a):
> On Sat, Sep 22, 2018 at 9:23 PM Chen-Yu Tsai wrote:
> > On Sun, Sep 2, 2018 at 3:27 PM Jernej Skrabec
wrote:
> > > Mixer 0 has 1 VI and 3 UI planes, scaler on all planes and can output
> > > 4K image @60Hz. It also sup
Dne sobota, 22. september 2018 ob 15:19:12 CEST je Chen-Yu Tsai napisal(a):
> On Sun, Sep 2, 2018 at 3:27 PM Jernej Skrabec
wrote:
> > Display Engine 3 is an upgrade of DE2 with new features like support for
> > 10 bit color formats and support for AFBC.
> >
> > Most of DE2 code works with DE3,
Dne sobota, 22. september 2018 ob 17:55:35 CEST je Chen-Yu Tsai napisal(a):
> On Sun, Sep 2, 2018 at 3:28 PM Jernej Skrabec
wrote:
> > H6 has Synopsys DWC HDMI 2.0 TX PHY.
> >
> > mpll settings were calculated from specifications of similar Synopsys
> > HDMI PHY found in i.MX6. Other PHY setting
Dne sobota, 22. september 2018 ob 14:32:30 CEST je Chen-Yu Tsai napisal(a):
> Hi,
>
> On Sun, Sep 2, 2018 at 3:27 PM Jernej Skrabec
wrote:
> > Most, if not all, registers found in DE2 still exists in DE3. However,
> > units are on different base addresses.
> >
> > To prepare for addition of DE3
https://bugs.freedesktop.org/show_bug.cgi?id=108037
Michel Dänzer changed:
What|Removed |Added
Product|xorg|DRI
Assignee|xorg-driver-...@
Hi Maxime, Daniel,
On 22/09/2018 10:56, Daniel Vetter wrote:
> On Fri, Sep 21, 2018 at 04:07:40PM +0200, Maxime Ripard wrote:
>> Hi,
>>
>> On Thu, Sep 20, 2018 at 03:04:12PM +0200, Neil Armstrong wrote:
>>> Since "drm/fb: Stop leaking physical address", the default behaviour of
>>> the DRM fbdev e
https://bugs.freedesktop.org/show_bug.cgi?id=108020
Michel Dänzer changed:
What|Removed |Added
CC||harry.wentl...@amd.com,
https://bugs.freedesktop.org/show_bug.cgi?id=108019
--- Comment #1 from Michel Dänzer ---
Can you try Mesa 18.2.1? It sounds like
https://gitlab.freedesktop.org/mesa/mesa/commit/e4b667224d6ddd5d42a1349729337ce68a1afca9
might help.
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https://bugs.freedesktop.org/show_bug.cgi?id=107940
Michel Dänzer changed:
What|Removed |Added
CC||ckoenig.leichtzumerken@gmai
https://bugs.freedesktop.org/show_bug.cgi?id=107940
--- Comment #7 from Christian König ---
(In reply to Michel Dänzer from comment #6)
> Christian, any idea how the commit below could cause this?
-EBADF means the file descriptor number is already closed.
So maybe the application is trying to o
Hi,
On Mon, Sep 24, 2018 at 02:18:35PM +0530, Kishon Vijay Abraham I wrote:
> On Wednesday 19 September 2018 05:44 PM, Maxime Ripard wrote:
> > Hi,
> >
> > On Fri, Sep 14, 2018 at 02:18:37PM +0530, Kishon Vijay Abraham I wrote:
> >>> +/**
> >>> + * phy_validate() - Checks the phy paramete
https://bugs.freedesktop.org/show_bug.cgi?id=108036
--- Comment #1 from Christian König ---
The problem is neither the driver nor the application, but rather the design of
VA-API.
The hardware supports some high profile features (like CABAC), but
unfortunately not all of them (like B-frames or M
https://bugs.freedesktop.org/show_bug.cgi?id=108019
--- Comment #2 from supercoolem...@seznam.cz ---
(In reply to Michel Dänzer from comment #1)
> Can you try Mesa 18.2.1? It sounds like
> https://gitlab.freedesktop.org/mesa/mesa/commit/
> e4b667224d6ddd5d42a1349729337ce68a1afca9 might help.
It i
Am 20.09.2018 um 13:03 schrieb Chunming Zhou:
user mode can query timeline payload.
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/drm_internal.h | 2 ++
drivers/gpu/drm/drm_ioctl.c| 2 ++
drivers/gpu/drm/drm_syncobj.c | 53 ++
include/uapi/drm/drm.
https://bugs.freedesktop.org/show_bug.cgi?id=108019
Michel Dänzer changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Am 20.09.2018 um 13:03 schrieb Chunming Zhou:
syncobj wait/signal operation is appending in command submission.
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 8 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 114 +++--
include/uapi/drm/amdgpu_d
Hi Laurent,
On 14/09/18 10:10, Laurent Pinchart wrote:
> DSYSR is a DU channel register that also contains group fields. It is
> thus written to by both the group and CRTC code, using read-update-write
> sequences. As the register isn't initialized explicitly at startup time,
> this can lead to in
Hi Laurent,
On 14/09/18 10:10, Laurent Pinchart wrote:
> The official way to stop the display is to clear the display enable
> (DEN) bit in the DSYSR register, but that operates at a group level and
> affects the two channels in the group. To disable channels selectively,
> the driver uses TV sync
Hi Laurent,
On 14/09/18 10:10, Laurent Pinchart wrote:
> The E3 (r8a77990) supports two LVDS channels. Extend the binding to
> support them.
This commit message sounds rather like we are modifying the bindings,
rather than just adding a compatible string. I went looking for extra
changes - but I
Hi Laurent, Uli,
On 14/09/18 10:10, Laurent Pinchart wrote:
> From: Ulrich Hecht
>
> Add support for the R-Car D3 (R8A77995) and E3 (R8A77990) SoCs to the
> R-Car DU driver. The two SoCs instantiate compatible DUs, so a single
> information structure is enough.
>
> Signed-off-by: Ulrich Hecht
On Sat, Sep 22, 2018 at 03:15:04PM +0300, Laurent Pinchart wrote:
> The DRM_BUS_FLAG_PIXDATA_(POS|NEG)EDGE flags are deprecated in favour of
> the new DRM_BUS_FLAG_PIXDATA_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags. Replace
> them through the code.
>
> Signed-off-by: Laurent Pinchart
> ---
> drivers/gpu
Commit 4eb085e42fde ("drm/vmwgfx: Convert to new IDA API") introduced
an incorrect return value from the function vmw_gmrid_man_get_node(),
when we run out of integer ids. Instead of returning 0 (meaning
non-fatal error) we forward the ida_simple_get error code -ENOSPC.
This causes TTM not to retry
On 22.09.2018 14:15, Laurent Pinchart wrote:
> Hello,
>
> This patch series attemps at clarifying usage of the
> DRM_BUS_FLAG_PIXDATA_(POS|NEG)EDGE flags. It results from a discussion
> on the mailing list available at [1].
>
> The problem being discussed was confusion around how the
> DRM_BUS_FL
The reservation object shared slot function only allowed to reserve one slot at
a time.
Improve that and allow to reserve multiple slots to support atomically
submission to multiple engines.
Please comment and review,
Christian.
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dri-devel mailing
It is perfectly possible that the BO list is created before the BO is
exported. While at it cleanup setting shared to one instead of true.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 13 ++---
2 file
Let's support simultaneous submissions to multiple engines.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_execbuf_util.c | 6 --
include/drm/ttm/ttm_execbuf_util.h | 2 +-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_execbuf_util.c
No need for that any more. Just replace the list when there isn't enough
room any more for the additional fence.
Signed-off-by: Christian König
---
drivers/dma-buf/reservation.c | 178 ++
include/linux/reservation.h | 4 -
2 files changed, 58 insertion
Let's support simultaneous submissions to multiple engines.
Signed-off-by: Christian König
---
drivers/dma-buf/reservation.c| 13 -
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +-
drivers/gpu/drm/amd/amdgpu/a
And drop the now superflous extra reservations.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 14 +-
2 files changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
The driver is now responsible to allocate enough shared slots.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 27 ++-
1 file changed, 6 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 461b31
This allows us to drop the extra reserve in TTM.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
b/drivers/g
On Fri, Sep 21, 2018 at 02:42:41PM +0300, Dmitry Osipenko wrote:
> Some of definitions in the code changed the meaning, unfortunately one
> place missed the change.
>
> Fixes: 0751bb5c44fe ("drm/tegra: dpaux: Add pinctrl support")
> Cc: # v4.8+
> Signed-off-by: Dmitry Osipenko
> ---
>
> I don't
Version 1:
- Initial commit
This serie contains all patchsets needed for control the pixel clock & data
enable polarities by the display controller driver.
Yannick Fertré (2):
drm: Add missing flags for pixel clock & data enable
drm/stm: ltdc: Solve issue on pixel clock & data enable polarit
Add missing flags for pixel clock & data enable polarities.
These flags are similar to other synchronization signals (hsync, vsync...).
Signed-off-by: Yannick Fertré
---
drivers/gpu/drm/drm_modes.c | 19 ++-
include/uapi/drm/drm_mode.h | 6 ++
2 files changed, 24 insertions(
On 24.09.2018 13:48, Thierry Reding wrote:
> On Sat, Sep 22, 2018 at 03:15:04PM +0300, Laurent Pinchart wrote:
>> The DRM_BUS_FLAG_PIXDATA_(POS|NEG)EDGE flags are deprecated in favour of
>> the new DRM_BUS_FLAG_PIXDATA_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags. Replace
>> them through the code.
>>
>> Sign
Wrong flags used for set the pixel clock & data enable polarities.
Add trace for polarities of hsync, vsync, data enabled & pixel clock.
Signed-off-by: Yannick Fertré
---
drivers/gpu/drm/stm/ltdc.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drive
On Mon, Sep 24, 2018 at 01:59:25PM +0200, Stefan Agner wrote:
> On 24.09.2018 13:48, Thierry Reding wrote:
> > On Sat, Sep 22, 2018 at 03:15:04PM +0300, Laurent Pinchart wrote:
> >> The DRM_BUS_FLAG_PIXDATA_(POS|NEG)EDGE flags are deprecated in favour of
> >> the new DRM_BUS_FLAG_PIXDATA_(DRIVE|SAM
Hi!
(stripping the mail a bit)
On Mon, Sep 24, 2018 at 05:25:26PM +0530, Kishon Vijay Abraham I wrote:
> > This integration will prevent us to use some clock rates on the first
> > SoC, while the second one would be totally fine with it.
>
> If there's a clock that is fed to the
Hi Damian,
Am Montag, 24. September 2018, 13:40:03 CEST schrieb Damian Kos:
> > Am Donnerstag, 20. September 2018, 16:54:40 CEST schrieb Damian Kos:
> > > From: Quentin Schulz
> > >
> > > This adds basic support for Cadence MHDP DPI to DP bridge.
> > >
> > > Basically, it takes a DPI stream as
On 24/09/18 12:59, Thierry Reding wrote:
> On Fri, Sep 21, 2018 at 02:42:41PM +0300, Dmitry Osipenko wrote:
>> Some of definitions in the code changed the meaning, unfortunately one
>> place missed the change.
>>
>> Fixes: 0751bb5c44fe ("drm/tegra: dpaux: Add pinctrl support")
>> Cc: # v4.8+
>> S
On 24.09.2018 14:13, Thierry Reding wrote:
> On Mon, Sep 24, 2018 at 01:59:25PM +0200, Stefan Agner wrote:
>> On 24.09.2018 13:48, Thierry Reding wrote:
>> > On Sat, Sep 22, 2018 at 03:15:04PM +0300, Laurent Pinchart wrote:
>> >> The DRM_BUS_FLAG_PIXDATA_(POS|NEG)EDGE flags are deprecated in favour
https://bugzilla.kernel.org/show_bug.cgi?id=199139
--- Comment #16 from Nicholas Kazlauskas (nicholas.kazlaus...@amd.com) ---
The logs are sufficient in case to understand what issue you're experiencing.
However, I'm surprised that this is occurring with xf86-video-amdgpu. Another
user with a sim
https://bugs.freedesktop.org/show_bug.cgi?id=108030
--- Comment #1 from Alex Deucher ---
Please attach your xorg log (if using X) and dmesg output.
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https://bugs.freedesktop.org/show_bug.cgi?id=108020
--- Comment #2 from Nicholas Kazlauskas ---
This is likely fixed. It may be worth testing the amd-staging-drm-next kernel
from:
https://cgit.freedesktop.org/~agd5f/linux/
or applying the proposed patch from the bug report at:
https://bugzilla
On 19.09.2018 22:39, Sean Paul wrote:
> From: Sean Paul
>
> Another "small driver" moving into drm-misc. Stefan has also offered to
> co-maintain it.
>
> Cc: Marek Vasut
> Cc: Stefan Agner
> Cc: David Airlie
> Cc: Gustavo Padovan
> Cc: Maarten Lankhorst
> Signed-off-by: Sean Paul
Marek, I
On Mon, Sep 24, 2018 at 01:32:41PM +0100, Jon Hunter wrote:
>
> On 24/09/18 12:59, Thierry Reding wrote:
> > On Fri, Sep 21, 2018 at 02:42:41PM +0300, Dmitry Osipenko wrote:
> >> Some of definitions in the code changed the meaning, unfortunately one
> >> place missed the change.
> >>
> >> Fixes: 0
https://bugs.freedesktop.org/show_bug.cgi?id=108033
--- Comment #1 from Alex Deucher ---
Other than the warnings in the log, is there any actual problem?
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On Mon, Sep 24, 2018 at 03:40:35PM +0300, Dmitry Osipenko wrote:
> On 9/24/18 3:32 PM, Jon Hunter wrote:
> >
> > On 24/09/18 12:59, Thierry Reding wrote:
> > > On Fri, Sep 21, 2018 at 02:42:41PM +0300, Dmitry Osipenko wrote:
> > > > Some of definitions in the code changed the meaning, unfortunatel
https://bugs.freedesktop.org/show_bug.cgi?id=108033
--- Comment #2 from lae...@pm.me ---
yea, kernel crashing and not responding after that, i have to reboot my PC. i'm
not sure how can i retrieve more information to make this clearer.
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On Mon, Sep 24, 2018 at 03:36:29PM +0200, Thierry Reding wrote:
> On Mon, Sep 24, 2018 at 03:40:35PM +0300, Dmitry Osipenko wrote:
> > On 9/24/18 3:32 PM, Jon Hunter wrote:
> > >
> > > On 24/09/18 12:59, Thierry Reding wrote:
> > > > On Fri, Sep 21, 2018 at 02:42:41PM +0300, Dmitry Osipenko wrote:
The shortlog should say "allow reserving more than one shared fence
slot", same as patch 2.
On 2018-09-24 1:58 p.m., Christian König wrote:
> Let's support simultaneous submissions to multiple engines.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/ttm/ttm_execbuf_util.c | 6 -
On 2018-09-24 1:58 p.m., Christian König wrote:
> And drop the now superflous extra reservations.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 14 +-
> 2 files changed, 5 insertions(+), 13 dele
On Mon, Sep 24, 2018 at 04:56:28PM +0300, Dmitry Osipenko wrote:
> On 9/24/18 4:36 PM, Thierry Reding wrote:
> > On Mon, Sep 24, 2018 at 03:40:35PM +0300, Dmitry Osipenko wrote:
> > > On 9/24/18 3:32 PM, Jon Hunter wrote:
> > > >
> > > > On 24/09/18 12:59, Thierry Reding wrote:
> > > > > On Fri, S
https://bugs.freedesktop.org/show_bug.cgi?id=108037
--- Comment #2 from Alex Deucher ---
When you say turn them off/on, do you mean via software (e.g., dpms) or via the
switch on the monitor?
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https://bugs.freedesktop.org/show_bug.cgi?id=108020
--- Comment #3 from Arek Tumas ---
Created attachment 141710
--> https://bugs.freedesktop.org/attachment.cgi?id=141710&action=edit
dmesg
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https://bugs.freedesktop.org/show_bug.cgi?id=108020
--- Comment #4 from Arek Tumas ---
Yes it is probably the same bug. It's a right-most vertical interlaced line.
I'm currently experiencing this bug in the newest ubuntu mainline kernel
(4.19-rc5). [It's not an issue on 4.18.8 kernel] I'm relativ
Hi Liviu,
On Fri, Sep 21, 2018 at 03:33:53PM +0100, Liviu Dudau wrote:
> From: Ayan Kumar Halder
>
> Add support for compressed framebuffers that are described using
> the framebuffer's modifier field. Mali DP uses the rotation memory for
> the decompressor of the format, so we need to check for
https://bugs.freedesktop.org/show_bug.cgi?id=108030
--- Comment #2 from Илья Индиго ---
Created attachment 141711
--> https://bugs.freedesktop.org/attachment.cgi?id=141711&action=edit
dmesg
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https://bugs.freedesktop.org/show_bug.cgi?id=108030
--- Comment #3 from Илья Индиго ---
Created attachment 141712
--> https://bugs.freedesktop.org/attachment.cgi?id=141712&action=edit
xorg.log
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On Mon, Sep 24, 2018 at 10:44:05AM +0200, Neil Armstrong wrote:
> Hi Maxime, Daniel,
>
> On 22/09/2018 10:56, Daniel Vetter wrote:
> > On Fri, Sep 21, 2018 at 04:07:40PM +0200, Maxime Ripard wrote:
> >> Hi,
> >>
> >> On Thu, Sep 20, 2018 at 03:04:12PM +0200, Neil Armstrong wrote:
> >>> Since "drm/
https://bugs.freedesktop.org/show_bug.cgi?id=108030
--- Comment #4 from Илья Индиго ---
Created attachment 141713
--> https://bugs.freedesktop.org/attachment.cgi?id=141713&action=edit
xsessions-errors
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On Sat, Sep 22, 2018 at 05:58:30PM +0200, Noralf Trønnes wrote:
>
> Den 22.09.2018 12.10, skrev Daniel Vetter:
> > On Fri, Sep 21, 2018 at 06:42:28PM +0200, Noralf Trønnes wrote:
> > > The majority of drivers use drm_gem_prime_export() and
> > > drm_gem_prime_import() for these callbacks so let's
On Sat, Sep 22, 2018 at 06:01:55PM +0200, Noralf Trønnes wrote:
>
> Den 22.09.2018 12.41, skrev Daniel Vetter:
> > On Fri, Sep 21, 2018 at 06:42:29PM +0200, Noralf Trønnes wrote:
> > > This adds an optional function table on GEM objects.
> > > The main benefit is for drivers that support more than
https://bugs.freedesktop.org/show_bug.cgi?id=108014
--- Comment #1 from Jerry Zuo ---
The MST is working in the first modeset, and afterwards it stops working. Does
it mean that each mode change after first modeset doesn't work?
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On Sat, Sep 22, 2018 at 04:34:03PM +0300, Troll Berserker wrote:
> On 22/09/18 11:45, Daniel Vetter wrote:
> > Hi,
> >
> > On Sat, Sep 22, 2018 at 05:55:00AM +0300, Troll Berserker wrote:
> > > Goal: simplify multiseat support.
> >
> > Sounds like a neat idea to use leases for this.
> > > A new p
https://bugs.freedesktop.org/show_bug.cgi?id=107607
--- Comment #7 from Nicholas Kazlauskas ---
Can you clarify the problem you're observing?
Do all the displays go blank after switching inputs?
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On Mon, Sep 24, 2018 at 03:40:15PM +0100, Ayan Halder wrote:
> Hi Liviu,
Hi Ayan,
>
> On Fri, Sep 21, 2018 at 03:33:53PM +0100, Liviu Dudau wrote:
> > From: Ayan Kumar Halder
> >
> > Add support for compressed framebuffers that are described using
> > the framebuffer's modifier field. Mali DP
On Mon, Sep 24, 2018 at 01:58:12PM +0200, Christian König wrote:
> The reservation object shared slot function only allowed to reserve one slot
> at a time.
>
> Improve that and allow to reserve multiple slots to support atomically
> submission to multiple engines.
I think you can do this alrea
Am 24.09.2018 um 17:03 schrieb Daniel Vetter:
On Mon, Sep 24, 2018 at 01:58:12PM +0200, Christian König wrote:
The reservation object shared slot function only allowed to reserve one slot at
a time.
Improve that and allow to reserve multiple slots to support atomically
submission to multiple
On Friday, 2018-09-21 17:30:42 +0200, Guido Günther wrote:
> We support that value so it should work as expected. This does not make
> 'auto' the default since the API is still marked as experimental.
> ---
> meson.build | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a
On Mon, Sep 24, 2018 at 05:16:50PM +0200, Christian König wrote:
> Am 24.09.2018 um 17:03 schrieb Daniel Vetter:
> > On Mon, Sep 24, 2018 at 01:58:12PM +0200, Christian König wrote:
> > > The reservation object shared slot function only allowed to reserve one
> > > slot at a time.
> > >
> > > Imp
https://bugs.freedesktop.org/show_bug.cgi?id=108036
--- Comment #2 from Kurt Kartaltepe ---
The VA-API implementation correctly reports b-frames are unavailable and in
this test they were not used.
The implemention also provided a decodable stream on main profile. So if the
the firmware issue yo
On Thu, Sep 20, 2018 at 09:51:38PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We want to start tracking which infoframes are enabled, so let's replace
> the boolean flag with a bitmask.
>
> We'll abstract the bitmask so that it's not platform dependent. That
> will allow us to examine
On Thu, Sep 20, 2018 at 09:51:39PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Store the mask of enabled infoframes in the crtc state. We'll start
> with just the readout for HDMI encoder, and we'll expand this
> to compute the bitmask in .compute_config() later. SDVO will also
> follow
On Thu, Sep 20, 2018 at 09:51:40PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Store the infoframes in the crtc state and precompute them in
> .compute_config(). While precomputing we'll also fill out the
> inforames.enable bitmask appropriately.
>
> Signed-off-by: Ville Syrjälä
> ---
On Thu, Sep 20, 2018 at 09:51:41PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add code to read the infoframes from the video DIP and unpack them into
> the crtc state.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 17
> drivers/gpu/drm/i915/intel
https://bugs.freedesktop.org/show_bug.cgi?id=108036
--- Comment #3 from Kurt Kartaltepe ---
> The hardware supports some high profile features (like CABAC), but
> unfortunately not all of them (like B-frames or MBAFF).
>
> Now the profile selects what the decoder needs to be able to do to handl
On Thu, Sep 20, 2018 at 09:51:43PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Read the HDMI infoframes from the hbuf and unpack them into
> the crtc state.
>
> Well, actually just AVI infoframe for now but let's write the
> infoframe readout code in a more generic fashion in case we
>
On Thu, Sep 20, 2018 at 09:51:44PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Check the infoframes and infoframe enable state when comparing two
> crtc states.
>
> We'll use the infoframe logging functions from video/hdmi.c to
> show the infoframes as part of the state dump.
>
> TODO
On Thu, Sep 20, 2018 at 09:51:45PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Dump out the infoframes in the normal crtc state dump.
>
> TODO: Try to better integrate the infoframe dumps with
> drm state dumps
>
> Signed-off-by: Ville Syrjälä
Going to make dmesg with state de
On Mon, Sep 24, 2018 at 05:51:16PM +0200, Daniel Vetter wrote:
> On Thu, Sep 20, 2018 at 09:51:38PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > We want to start tracking which infoframes are enabled, so let's replace
> > the boolean flag with a bitmask.
> >
> > We'll abstract the
On Mon, Sep 24, 2018 at 05:58:25PM +0200, Daniel Vetter wrote:
> On Thu, Sep 20, 2018 at 09:51:40PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Store the infoframes in the crtc state and precompute them in
> > .compute_config(). While precomputing we'll also fill out the
> > infor
https://bugs.freedesktop.org/show_bug.cgi?id=108037
--- Comment #3 from Öyvind Saether ---
(In reply to Michel Dänzer from comment #1)
> Can you bisect?
> P.S. FYI, this is what's called an oops, not a panic.
oops, then. yes I now know how to bisect. I can.
(In reply to Alex Deucher from commen
https://bugs.freedesktop.org/show_bug.cgi?id=108037
--- Comment #4 from Öyvind Saether ---
Created attachment 141716
--> https://bugs.freedesktop.org/attachment.cgi?id=141716&action=edit
Found that 4.18.9 has the same problem.
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On Mon, Sep 24, 2018 at 06:08:09PM +0200, Daniel Vetter wrote:
> On Thu, Sep 20, 2018 at 09:51:41PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Add code to read the infoframes from the video DIP and unpack them into
> > the crtc state.
> >
> > Signed-off-by: Ville Syrjälä
> > --
On Mon, Sep 24, 2018 at 06:10:14PM +0200, Daniel Vetter wrote:
> On Thu, Sep 20, 2018 at 09:51:43PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Read the HDMI infoframes from the hbuf and unpack them into
> > the crtc state.
> >
> > Well, actually just AVI infoframe for now but le
https://bugs.freedesktop.org/show_bug.cgi?id=107428
Isaac Curtis changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
These patches are part of a proposed new interface for supporting variable
refresh rate via DRM properties.
=== Changes from v1 ===
For drm:
* The variable_refresh_capable property is now flagged as
DRM_MODE_PROP_IMMUTABLE
For drm/gpu/amd/display:
* Patches no longer pull in IOCTL/FreeSync r
Modern display hardware is capable of supporting variable refresh rates
and adaptive sync technologies. The properties for querying and
controlling these features should be exposed on the DRM connector.
This patch introduces two new properties for variable refresh rate
support:
- variable_refresh
Variable refresh rate algorithms have typically been enabled only
when the display is covered by a single source of content.
This patch introduces a new default CRTC property that helps
hint to the driver when the CRTC composition is suitable for variable
refresh rate algorithms. Userspace can set
The AMDGPU specific FreeSync properties and IOCTLs are dropped
from amdgpu_dm in favor of the DRM variable refresh properties.
The AMDGPU connector properties freesync_capable and freesync_enabled
are mostly direct mappings to the DRM variable_refresh_capable and
variable_refresh_enabled.
The AMD
On Mon, Sep 24, 2018 at 02:15:35PM -0400, Nicholas Kazlauskas wrote:
> Modern display hardware is capable of supporting variable refresh rates
> and adaptive sync technologies. The properties for querying and
> controlling these features should be exposed on the DRM connector.
>
> This patch intro
On Mon, Sep 24, 2018 at 02:15:36PM -0400, Nicholas Kazlauskas wrote:
> Variable refresh rate algorithms have typically been enabled only
> when the display is covered by a single source of content.
>
> This patch introduces a new default CRTC property that helps
> hint to the driver when the CRTC
Hi Laurent,
Thank you for the patch,
On 14/09/18 10:10, Laurent Pinchart wrote:
> On the D3 and E3 SoCs, the LVDS encoder can derive its internal pixel
> clock from an externally supplied clock, either through the EXTAL pin or
> through one of the DU_DOTCLKINx pins. Add corresponding clocks to th
On 09/24/2018 02:38 PM, Ville Syrjälä wrote:
On Mon, Sep 24, 2018 at 02:15:36PM -0400, Nicholas Kazlauskas wrote:
Variable refresh rate algorithms have typically been enabled only
when the display is covered by a single source of content.
This patch introduces a new default CRTC property that h
Hi Corentin,
On 24/09/2018 21:04, Corentin Labbe wrote:
> This patch convert meson DRM driver to use all xxxsetbits32 functions.
>
> Signed-off-by: Corentin Labbe
> ---
> drivers/gpu/drm/meson/meson_crtc.c | 14 ---
> drivers/gpu/drm/meson/meson_dw_hdmi.c | 33 +
> dr
On 24/09/2018 21:04, Corentin Labbe wrote:
> This patch convert meson stmmac glue driver to use all xxxsetbits32 functions.
>
> Signed-off-by: Corentin Labbe
> ---
> .../net/ethernet/stmicro/stmmac/dwmac-meson8b.c| 56
> +-
> 1 file changed, 22 insertions(+), 34 deletion
https://bugs.freedesktop.org/show_bug.cgi?id=106671
--- Comment #21 from Alan W. Irwin ---
Created attachment 141724
--> https://bugs.freedesktop.org/attachment.cgi?id=141724&action=edit
tarball containing kern.log, syslog, and dmesg output
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https://bugs.freedesktop.org/show_bug.cgi?id=108049
--- Comment #1 from Gediminas Jakutis ---
Created attachment 141726
--> https://bugs.freedesktop.org/attachment.cgi?id=141726&action=edit
log for dce_mi_allocate_dmif line:599
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https://bugs.freedesktop.org/show_bug.cgi?id=108049
Bug ID: 108049
Summary: [vega10] amdgpu fails to either wake up the GPU or
while putting it to sleep
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
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