Thank you, Andrzej! I was a bit afraid that our patches are a bit too messy and
thus ignored 😊
Anyway, this patch (1/5) should be the last one that will cause such chaos in
the DRM area.
Regards,
Damian
-Original Message-
From: Andrzej Hajda
Sent: Thursday, September 13, 2018 12:01
To
On Thu, Sep 13, 2018 at 06:52:43PM +0200, Thomas Hellstrom wrote:
> On 09/13/2018 05:28 PM, Matthew Wilcox wrote:
> > On Thu, Sep 13, 2018 at 04:56:53PM +0200, Thomas Hellstrom wrote:
> > > On 09/13/2018 04:10 PM, Matthew Wilcox wrote:
> > > > I think this could be better though ... if ida_alloc()
On 9/12/2018 6:25 AM, Manasi Navare wrote:
This patch adds helpers for calculating the maximum compressed BPP
supported with small joiner.
This also adds a helper for calculating the slice count in case
of small joiner.
These are inside intel_dp since they take into account hardware
limitations
On Wed, 12 Sep 2018 20:06:43 +0200 Takashi Iwai wrote:
> On Wed, 12 Sep 2018 19:46:58 +0200,
> Ville Syrjälä wrote:
> >
> > On Tue, Sep 11, 2018 at 03:50:13PM +0200, Bruno Prémont wrote:
> > > Hi,
> > >
> > > I have a system with multiple monitors and would like to send
> > > notification sound
On Fri, Sep 7, 2018 at 8:02 PM, John Hubbard wrote:
> On 8/2/18 12:51 PM, Gustavo A. R. Silva wrote:
>> Hi all,
>>
>> Friendly ping! Who can take this?
>>
>> Thanks
>> --
>> Gustavo
>>
>> On 07/24/2018 08:27 AM, Gustavo A. R. Silva wrote:
>>> In case memory resources for *bl_desc* were allocated,
tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-4.20-wip
head: 271430fdbed22d33094fdd50e62c9c15f95ebe38
commit: 59aa9b9f0eb219479f7415fb49560de7b4aab048 [321/331] drm/amdgpu: use leaf
iterator for allocating PD/PT
config: i386-allmodconfig (attached as .config)
compiler: gcc-7 (De
tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head: bc29281af131ae8c02e05322e7fc72829ec555f0
commit: 515a2ce300ff1d64a52d813673c27ac885502c98 [326/336] drm/amdgpu: use dfs
iterator to free PDs/PTs
reproduce: make htmldocs
All warnings (new ones prefixed by >>):
On 9/12/2018 6:25 AM, Manasi Navare wrote:
This patch adds helpers for calculating the maximum compressed BPP
supported with small joiner.
This also adds a helper for calculating the slice count in case
of small joiner.
These are inside intel_dp since they take into account hardware
limitations
tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-4.20-wip
head: 271430fdbed22d33094fdd50e62c9c15f95ebe38
commit: 59aa9b9f0eb219479f7415fb49560de7b4aab048 [321/331] drm/amdgpu: use leaf
iterator for allocating PD/PT
config: i386-randconfig-x0-09140443 (attached as .config)
compiler:
On Wed, Sep 12, 2018 at 11:44 PM Gerd Hoffmann wrote:
>
> On Wed, Sep 12, 2018 at 08:24:00PM -0700, Gurchetan Singh wrote:
> > On Wed, Sep 12, 2018 at 12:03 AM Yann Droneaud wrote:
> > >
> > > Hi,
> > >
> > > Le lundi 27 août 2018 à 11:34 +0200, Gerd Hoffmann a écrit :
> > > > A driver to let use
On 2018年09月14日 11:14, zhoucm1 wrote:
On 2018年09月13日 18:22, Christian König wrote:
Am 13.09.2018 um 11:35 schrieb Zhou, David(ChunMing):
-Original Message-
From: Koenig, Christian
Sent: Thursday, September 13, 2018 5:20 PM
To: Zhou, David(ChunMing) ; dri-
de...@lists.freedesktop.or
On Thu, Sep 13, 2018 at 01:58:37PM +0200, Thomas Hellstrom wrote:
> Commit 4eb085e42fde ("drm/vmwgfx: Convert to new IDA API") indroduced
> an incorrect return value from the function vmw_gmrid_man_get_node(),
> when we run out if integer ids. Instead of returning 0 (meaning
> non-fatal error) we f
On Thu, Sep 13, 2018 at 01:22:07PM +0200, Christian König wrote:
> Move all entries between @first and including @last before @head.
>
> This is useful for LRU lists where a whole block of entries should be
> moved to the end of an list.
>
> Signed-off-by: Christian König
Bulk move helper is us
Commit 19be55701071 ("drm/ttm: add operation ctx to ttm_bo_validate v2")
introduced a regression where the vmwgfx driver refused to evict a
buffer that was still busy instead of waiting for it to become idle.
Fix this.
Cc: Christian König
Signed-off-by: Thomas Hellstrom
---
drivers/gpu/drm/vmw
The shortlog prefix of this patch should be amdgpu: instead of libkms:.
With that fixed, this patch and the radeon patch are
Reviewed-by: Michel Dänzer
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X de
On 2018年09月13日 18:22, Christian König wrote:
Am 13.09.2018 um 11:35 schrieb Zhou, David(ChunMing):
-Original Message-
From: Koenig, Christian
Sent: Thursday, September 13, 2018 5:20 PM
To: Zhou, David(ChunMing) ; dri-
de...@lists.freedesktop.org
Cc: Dave Airlie ; Rakos, Daniel
; amd-
/commits/Ville-Syrjala/drm-nouveau-Disable-atomic-support-on-a-per-device-basis/20180914-111059
config: i386-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones
Quoting José Roberto de Souza (2018-09-13 23:13:41)
> All DRM_CLIENT capabilities are tied to KMS support, so returning
> -ENOTSUPP when KMS is not supported.
The posix errno is ENOTSUP (ENOTSUPP is internal). Now since we have no
ENOTSUP in the uapi, I've switched to using EOPNOTSUP as that is
do
https://bugzilla.kernel.org/show_bug.cgi?id=199139
mista...@gmail.com changed:
What|Removed |Added
CC||mista...@gmail.com
--- Comment #9 fr
tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head: bc29281af131ae8c02e05322e7fc72829ec555f0
commit: df744ae533131fcb53c15eac7bb3933925eb22b3 [329/336] drm/amdgpu: meld
together VM fragment and huge page handling
reproduce: make htmldocs
All warnings (new ones prefi
Hi Laurent,
On Tue, Sep 04, 2018 at 03:10:14PM +0300, Laurent Pinchart wrote:
> On the D3 and E3 SoCs, the LVDS encoder can derive its internal pixel
> clock from an externally supplied clock, either through the EXTAL pin or
> through one of the DU_DOTCLKINx pins. Add corresponding clocks to the D
Hi Laurent,
On Fri, Sep 14, 2018 at 11:24:32AM +0300, Laurent Pinchart wrote:
> Hi Jacopo,
>
> On Friday, 14 September 2018 11:00:46 EEST jacopo mondi wrote:
> > On Tue, Sep 04, 2018 at 03:10:14PM +0300, Laurent Pinchart wrote:
> > > On the D3 and E3 SoCs, the LVDS encoder can derive its internal
On 9/12/2018 6:25 AM, Manasi Navare wrote:
When DSC is supported we need to validate the modes based on the
maximum supported compressed BPP and maximum supported slice count.
This allows us to allow the modes with pixel clock greater than the
available link BW as long as it meets the compresse
Am 14.09.2018 um 05:59 schrieb zhoucm1:
On 2018年09月14日 11:14, zhoucm1 wrote:
On 2018年09月13日 18:22, Christian König wrote:
Am 13.09.2018 um 11:35 schrieb Zhou, David(ChunMing):
-Original Message-
From: Koenig, Christian
Sent: Thursday, September 13, 2018 5:20 PM
To: Zhou, David(Ch
We accidentally forgot to set "ret" on this error path so it means we
return NULL instead of an error pointer. The caller checks for NULL and
changes it to an error pointer so it doesn't cause an issue at run time.
Signed-off-by: Dan Carpenter
diff --git a/drivers/dma-buf/udmabuf.c b/drivers/dm
https://bugs.freedesktop.org/show_bug.cgi?id=107927
Bug ID: 107927
Summary: Errors on wake up from hibernation
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severit
On Wed, Sep 12, 2018 at 8:32 PM Stefan Agner wrote:
> @Linus Walleij, Laurent Pinchart: Since you have been involved in
> the initial bus timings discussion, I would like to have your Ack
> on at least patch 2/3... If we want to keep the setup/hold timings,
> the patchset should also work without
On Fri, Sep 14, 2018 at 10:23 AM, Neil Armstrong
wrote:
> Hi Daniel,
>
> On 13/09/2018 16:55, Daniel Vetter wrote:
>> On Thu, Sep 13, 2018 at 04:26:53PM +0200, Neil Armstrong wrote:
>>> Hi Daniel,
>>>
>>> On 13/09/2018 15:21, Daniel Vetter wrote:
On Wed, Sep 12, 2018 at 01:06:07PM +0200, Nora
Hi Laurent,
On Tue, Sep 04, 2018 at 03:10:13PM +0300, Laurent Pinchart wrote:
> The E3 (r8a77990) supports two LVDS channels. Extend the binding to
> support them.
>
> Signed-off-by: Laurent Pinchart
> ---
> Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
> 1 file change
Hi Daniel,
On 13/09/2018 16:55, Daniel Vetter wrote:
> On Thu, Sep 13, 2018 at 04:26:53PM +0200, Neil Armstrong wrote:
>> Hi Daniel,
>>
>> On 13/09/2018 15:21, Daniel Vetter wrote:
>>> On Wed, Sep 12, 2018 at 01:06:07PM +0200, Noralf Trønnes wrote:
Den 12.09.2018 12.57, skrev Noralf Trøn
On Thu, Sep 13, 2018 at 11:02 PM, Lyude Paul wrote:
> Hm, one nitpick here. Since /sys/kernel/debug/dri/*/state creation depends on
> the driver supporting atomic, maybe it would be good to make it so that we set
> DRIVER_ATOMIC in the driver_stub structure, then disable it per-device
> depending
On Fri, 14 Sep 2018 at 07:35, Kees Cook wrote:
>
> On Fri, Sep 7, 2018 at 8:02 PM, John Hubbard wrote:
> > On 8/2/18 12:51 PM, Gustavo A. R. Silva wrote:
> >> Hi all,
> >>
> >> Friendly ping! Who can take this?
> >>
> >> Thanks
> >> --
> >> Gustavo
> >>
> >> On 07/24/2018 08:27 AM, Gustavo A. R.
On Wed, 12 Sep 2018 at 20:59, Takashi Iwai wrote:
>
> When a fan is controlled via linear fallback without cstate, we
> shouldn't stop polling. Otherwise it won't be adjusted again and
> keeps running at an initial crazy pace.
Martin,
Any thoughts on this?
Ben.
>
> Fixes: 800efb4c2857 ("drm/no
Hi,
> > Well, no. This is *not* about 3D, it's about software rendering, for
> > example cairo doing its work for gtk apps. So the workflow would be
> > along these lines:
> >
> > (1) guest app allocates dumb drm buffer from virtio-gpu, renders to it.
> > (2) guest app passes the buffer to way
tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next-pco
head: bbab57a341c90ed6e32de8edf4e89dc5c55cddac
commit: 5c777a51926dd6bbbf82dc5bddd980a408f0f618 [299/339] drm/amdgpu/gmc9:
Adjust GART and AGP location with xgmi offset
smatch warnings:
drivers/gpu/drm/amd/amdgpu/gfx
The CTA-861 standards have been updated to refer to opRGB instead
of AdobeRGB. The official standard is in fact named opRGB, so
switch to that.
The two old defines referring to ADOBERGB in the public API are
put under #ifndef __KERNEL__ and a comment mentions that they are
deprecated.
Signed-off-
In the case where preemption is not enabled, this patch simply skips
preemption related initialization in hardware init sequence.
Signed-off-by: Sharat Masetty
---
drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu
The R8A77990 (E3) platform has one RGB output and two LVDS outputs
connected to the DU. Add the DT nodes for the DU, LVDS encoders and
supporting VSP and FCP.
Signed-off-by: Laurent Pinchart
Tested-by: Jacopo Mondi
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 167
https://bugs.freedesktop.org/show_bug.cgi?id=107898
--- Comment #8 from Marvin Damschen ---
KFD initializes without errors using "iommu=pt". I will see whether I can get
ROCm running on top of that.
Unfortunately, the BIOS has been terrible so far on the raven-based Lenovo
laptops. I am happy t
The LVDS encoders in the D3 and E3 SoCs differ significantly from those
in the other R-Car Gen3 family members:
- The LVDS PLL architecture is more complex and requires computing PLL
parameters manually.
- The PLL uses external clocks as inputs, which need to be retrieved
from DT.
- In additio
From: Takeshi Kihara
Add device nodes for I2C ch{0,1,2,3,4,5,6,7} to R-Car E3 R8A77990 device
tree.
Signed-off-by: Takeshi Kihara
Signed-off-by: Jacopo Mondi
Tested-by: Jacopo Mondi
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 123 ++
1 file changed, 123 insert
The THC63LVD1024 is restricted to a pixel clock frequency in the range
of 8 to 135 MHz. Implement the bridge .mode_valid() operation
accordingly.
Signed-off-by: Laurent Pinchart
Reviewed-by: Andrzej Hajda
Tested-by: Jacopo Mondi
---
drivers/gpu/drm/bridge/thc63lvd1024.c | 18 ++
https://bugs.freedesktop.org/show_bug.cgi?id=107572
--- Comment #22 from Andrew Cook ---
Installed this:
https://copr.fedorainfracloud.org/coprs/jerbear64/mesa_dxvk/
Which is mesa 18.2 and the obduction crash seems to have disappeared
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Hi Laurent,
On Tue, Sep 04, 2018 at 03:10:12PM +0300, Laurent Pinchart wrote:
> Document the E3 (r8a77990) SoC in the R-Car DU bindings.
>
> Signed-off-by: Laurent Pinchart
> ---
> Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a
The official way to stop the display is to clear the display enable
(DEN) bit in the DSYSR register, but that operates at a group level and
affects the two channels in the group. To disable channels selectively,
the driver uses TV sync mode that stops display operation on the channel
and turns outp
https://bugs.freedesktop.org/show_bug.cgi?id=107927
--- Comment #1 from tomas.v...@showmax.com ---
PS: Sleep works fine, only issue is hibernation (and therefor also hybrid-sleep
which is what I usually do)
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You are the assignee for the bug.
On Thu, Sep 13, 2018 at 04:56:53PM +0200, Thomas Hellstrom wrote:
> Hi,
>
> On 09/13/2018 04:10 PM, Matthew Wilcox wrote:
> > On Thu, Sep 13, 2018 at 01:58:37PM +0200, Thomas Hellstrom wrote:
> > > Commit 4eb085e42fde ("drm/vmwgfx: Convert to new IDA API") indroduced
> > > an incorrect return valu
> -Original Message-
> From: Koenig, Christian
> Sent: Friday, September 14, 2018 3:27 PM
> To: Zhou, David(ChunMing) ; Zhou,
> David(ChunMing) ; dri-
> de...@lists.freedesktop.org
> Cc: Dave Airlie ; Rakos, Daniel
> ; amd-...@lists.freedesktop.org; Daniel Vetter
>
> Subject: Re: [PATCH
tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next-pco
head: bbab57a341c90ed6e32de8edf4e89dc5c55cddac
commit: 42b0cb5d6f8d3c641098454aabfa4eeeb935ccd2 [272/339] drm/amd/display:
Build stream update and plane updates in dm
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../di
From: Ulrich Hecht
Add support for the R-Car D3 (R8A77995) and E3 (R8A77990) SoCs to the
R-Car DU driver. The two SoCs instantiate compatible DUs, so a single
information structure is enough.
Signed-off-by: Ulrich Hecht
[Add support for R8A77990]
Signed-off-by: Laurent Pinchart
Tested-by: Jaco
The rcar_du_crtc_get() function is always immediately followed by a call
to rcar_du_crtc_setup(). Call the later from the former to simplify the
code, and add a comment to explain how the get and put calls are
balanced.
Signed-off-by: Laurent Pinchart
Tested-by: Jacopo Mondi
---
drivers/gpu/drm
From: Kieran Bingham
The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
Signed-off-by: Kieran Bingham
[uli: moved lvds* into the soc node, added PM domains, resets]
Signed-off-by: Ulrich Hecht
Reviewed-by: Laurent Pinchart
Tested-by: Jacopo Mondi
---
arch/arm64/boot/dts/renes
Hello everybody,
This patch series adds display support for the D3 and E3 SoCs, and in
particular the Draak and Ebisu boards.
The code is based on Ulrich's "[PROTO][PATCH 00/10] R-Car D3 LVDS/HDMI support
(with PLL)" series previously posted to the dri-devel and linux-renesas-soc
mailing lists. I
Add the LVDS decoder, HDMI encoder, VGA encoder and HDMI and VGA
connectors, and wire up the display-related nodes with clocks, pinmux
and regulators.
The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
EXTAL externals clocks. Two of them are provided to the SoC on the Ebisu
bo
Am 14.09.2018 um 09:46 schrieb Zhou, David(ChunMing):
-Original Message-
From: Koenig, Christian
Sent: Friday, September 14, 2018 3:27 PM
To: Zhou, David(ChunMing) ; Zhou,
David(ChunMing) ; dri-
de...@lists.freedesktop.org
Cc: Dave Airlie ; Rakos, Daniel
; amd-...@lists.freedesktop.org;
DSYSR is a DU channel register that also contains group fields. It is
thus written to by both the group and CRTC code, using read-update-write
sequences. As the register isn't initialized explicitly at startup time,
this can lead to invalid or otherwise unexpected values being written to
some of th
All Gen3 SoCs supported so far have a fixed association between DPAD0
and DU channels, which led to hardcoding that association when writing
the corresponding hardware register. The D3 and E3 will break that
mechanism as DPAD0 can be dynamically connected to either DU0 or DU1.
Make DPAD0 routing d
https://bugs.freedesktop.org/show_bug.cgi?id=107880
--- Comment #12 from Marvin Damschen ---
rocm-dkms
(http://repo.radeon.com/rocm/apt/debian/pool/main/r/rock-dkms/rock-dkms_1.8-199_all.deb)
currently still contains the old firmware. I will open an issue on ROCm's
GitHub repo.
Best regards
Marv
On the D3 and E3 SoCs, the LVDS encoder can derive its internal pixel
clock from an externally supplied clock, either through the EXTAL pin or
through one of the DU_DOTCLKINx pins. Add corresponding clocks to the DT
bindings.
To retain backward compatibility with DT that don't specify the
clock-na
Am 14.09.2018 um 09:35 schrieb Thomas Hellstrom:
Commit 19be55701071 ("drm/ttm: add operation ctx to ttm_bo_validate v2")
introduced a regression where the vmwgfx driver refused to evict a
buffer that was still busy instead of waiting for it to become idle.
Fix this.
Cc: Christian König
Signed
The E3 (r8a77990) supports two LVDS channels. Extend the binding to
support them.
Signed-off-by: Laurent Pinchart
Reviewed-by: Jacopo Mondi
---
Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings
Hi Jacopo,
On Friday, 14 September 2018 11:00:46 EEST jacopo mondi wrote:
> On Tue, Sep 04, 2018 at 03:10:14PM +0300, Laurent Pinchart wrote:
> > On the D3 and E3 SoCs, the LVDS encoder can derive its internal pixel
> > clock from an externally supplied clock, either through the EXTAL pin or
> > t
On selected SoCs, the DU can use the clock output by the LVDS encoder
PLL as its input dot clock. This feature is optional, but on the D3 and
E3 SoC it is often the only way to obtain a precise dot clock frequency,
as the other available clocks (CPG-generated clock and external clock)
usually have
Hi Russell,
On Thu, Sep 13, 2018 at 3:48 PM, Russell King - ARM Linux
wrote:
> On Thu, Sep 13, 2018 at 03:33:20PM +0200, Hans Verkuil wrote:
>> On 09/13/18 15:16, Daniel Vetter wrote:
>> > On Thu, Sep 13, 2018 at 10:33:35AM +0100, Russell King - ARM Linux wrote:
>> >> Hi Hans,
>> >>
>> >> I'll pi
Document the E3 (r8a77990) SoC in the R-Car DU bindings.
Signed-off-by: Laurent Pinchart
Reviewed-by: Jacopo Mondi
---
Documentation/devicetree/bindings/display/renesas,du.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt
b/Docum
From: Ulrich Hecht
Adds LVDS decoder, HDMI encoder and connector for the Draak board.
The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
EXTAL externals clocks. Two of them are provided to the SoC on the Draak
board, hook them up in DT.
Signed-off-by: Ulrich Hecht
Signed-o
Hi Stefan,
Thankk you for the patch.
On Wednesday, 12 September 2018 21:32:15 EEST Stefan Agner wrote:
> The DRM bus flags conveys additional information on pixel data on
> the bus. All currently available bus flags might be of interest for
> a bridge. In the case at hand a dumb VGA bridge needs
The etnaviv device is a virtual device backing the DRM device, which may
drive multiple hardware GPU core devies. As most of the dma-mapping handling
is done through the virtual device, we need to make sure that a proper DMA
setup is in place. The easiest way to get a reasonable configuration is
to
On Thursday, 2018-09-13 16:57:11 -0700, Lucas De Marchi wrote:
> Rely on -fvisibility=hidden to hide the symbols. Previous version of
> this series applying only to drm_intel.so is
>
> Reviewed-by: Eric Engestrom
>
> but it's not included here since I changed the approach for the build
> s
Hi Stefan,
On Wednesday, 12 September 2018 21:32:17 EEST Stefan Agner wrote:
> Bridges are typically connected to a parallel display signal with
> pixel clock, sync signals and data lines. Parallel display signals
> are also used in lower-end embedded display panels. For parallel
> display panels
Hello,
On Friday, 14 September 2018 12:07:03 EEST Linus Walleij wrote:
> On Wed, Sep 12, 2018 at 8:32 PM Stefan Agner wrote:
> > @Linus Walleij, Laurent Pinchart: Since you have been involved in
> > the initial bus timings discussion, I would like to have your Ack
> > on at least patch 2/3... If
https://bugs.freedesktop.org/show_bug.cgi?id=107928
Bug ID: 107928
Summary: Screen regularly turns black, reboot needed
Product: DRI
Version: XOrg git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
S
On Fri, Sep 14, 2018 at 09:56:15AM +0300, Dan Carpenter wrote:
> We accidentally forgot to set "ret" on this error path so it means we
> return NULL instead of an error pointer. The caller checks for NULL and
> changes it to an error pointer so it doesn't cause an issue at run time.
Pushed to drm
Hi Stefan,
On Thursday, 6 September 2018 23:25:56 EEST Stefan Agner wrote:
> On 06.09.2018 04:07, Linus Walleij wrote:
> > On Wed, Sep 5, 2018 at 8:32 PM Stefan Agner wrote:
> >> On 05.09.2018 00:44, Laurent Pinchart wrote:
> >>
> >> Good point! I actually really don't like that we use the same
https://bugs.freedesktop.org/show_bug.cgi?id=107928
Michel Dänzer changed:
What|Removed |Added
CC||harry.wentl...@amd.com,
Hi Stefan,
On Friday, 7 September 2018 21:25:40 EEST Stefan Agner wrote:
> On 07.09.2018 00:10, Linus Walleij wrote:
> > On Thu, Sep 6, 2018 at 10:25 PM Stefan Agner wrote:
> >> Ok, I read a bit up on the history of bridge timing, especially:
> >> https://www.spinics.net/lists/dri-devel/msg155618
On Friday, 14 September 2018 12:49:40 EEST Laurent Pinchart wrote:
> Hi Stefan,
>
> On Thursday, 6 September 2018 23:25:56 EEST Stefan Agner wrote:
> > On 06.09.2018 04:07, Linus Walleij wrote:
> > > On Wed, Sep 5, 2018 at 8:32 PM Stefan Agner wrote:
> > >> On 05.09.2018 00:44, Laurent Pinchart w
Hi Stefan,
Thank you for the patch.
On Wednesday, 12 September 2018 21:32:20 EEST Stefan Agner wrote:
> A bridge might require specific settings for the pixel data on
> the bus. Copy the bus flags from the bridge timings if a bridge
> is in use.
>
> Signed-off-by: Stefan Agner
> ---
> drivers/
https://bugs.freedesktop.org/show_bug.cgi?id=107928
--- Comment #2 from Vik-T ---
Created attachment 141560
--> https://bugs.freedesktop.org/attachment.cgi?id=141560&action=edit
Dmesg Output
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drm_fourcc.h file Generated using make headers_install.
Generated from
tree - git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git
branch - master
commit - ce6058039bca7f1f11f1723549eec1bc069dcb28
Removed the 'SAND modifiers' part to commit only the AFBC specific
code in drm_fourcc.h
On Wednesday, 2018-09-12 20:33:32 -0500, David Lechner wrote:
> On 09/11/2018 07:43 AM, Noralf Trønnes wrote:
> > This adds a library for shmem backed GEM objects with the necessary
> > drm_driver callbacks.
> >
> > Signed-off-by: Noralf Trønnes
> > ---
> >
>
> ...
>
> > +static int drm_gem_sh
Hi Kieran,
Thank you for the patch.
On Monday, 6 August 2018 17:39:01 EEST Kieran Bingham wrote:
> From: Kieran Bingham
>
> Add myself as a co-maintainer for the Renesas DRM drivers.
>
> Signed-off-by: Kieran Bingham
Acked-by: Laurent Pinchart
and applied to my tree.
Thank you for your he
Hi Jacopo,
On Thursday, 13 September 2018 12:37:00 EEST jacopo mondi wrote:
> Hi Kieran, Laurent
>
> On Mon, Aug 06, 2018 at 03:39:01PM +0100, Kieran Bingham wrote:
> > From: Kieran Bingham
> >
> > Add myself as a co-maintainer for the Renesas DRM drivers.
> >
> > Signed-off-by: Kieran Bingham
https://bugs.freedesktop.org/show_bug.cgi?id=107929
Michel Dänzer changed:
What|Removed |Added
CC||harry.wentl...@amd.com,
https://bugs.freedesktop.org/show_bug.cgi?id=106111
--- Comment #7 from Andrew Sheldon ---
Another workaround that has worked for me with a Vega 56 is to suspend-to-ram
the host system before trying to start the guest again.
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This patch is for VK_KHR_timeline_semaphore extension, semaphore is called
syncobj in kernel side:
This extension introduces a new type of syncobj that has an integer payload
identifying a point in a timeline. Such timeline syncobjs support the
following operations:
* CPU query - A host operati
Am 14.09.2018 um 12:37 schrieb Chunming Zhou:
This patch is for VK_KHR_timeline_semaphore extension, semaphore is called
syncobj in kernel side:
This extension introduces a new type of syncobj that has an integer payload
identifying a point in a timeline. Such timeline syncobjs support the
follo
On Tue, Sep 11, 2018 at 05:56:01PM -0700, Manasi Navare wrote:
> On Icelake, a separate power well PG2 is created for
> VDSC engine used for eDP/MIPI DSI. This patch adds a new
> display power domain for Power well 2.
>
> Cc: Rodrigo Vivi
> Cc: Imre Deak
> Signed-off-by: Manasi Navare
> ---
>
Hi Kieran,
Thank you for the patch.
On Friday, 31 August 2018 21:12:57 EEST Kieran Bingham wrote:
> The R-Car Gen3 DU utilises the VSP1 hardware for memory access. The
> limits on the RPF and WPF in this pipeline are 8190x8190.
>
> Update the supported maximum sizes accordingly.
>
> Signed-off-
Hi Kieran,
Thank you for the patch.
How about renaming the subject line to "Add support for missing pixel formats"
?
On Friday, 31 August 2018 21:12:58 EEST Kieran Bingham wrote:
> From: Koji Matsuoka
>
> This patch supports pixel format of RGB332, ARGB, XRGB,
> BGR888, RGB888, BGRA88
Hi Kieran,
On Friday, 31 August 2018 21:12:58 EEST Kieran Bingham wrote:
> From: Koji Matsuoka
>
> This patch supports pixel format of RGB332, ARGB, XRGB,
> BGR888, RGB888, BGRA, BGRX and YVYU.
> VYUY pixel format is not supported by H/W specification.
Should VYUY be removed fro
Hi Noralf,
On Sat, 2018-09-08 at 15:46 +0200, Noralf Trønnes wrote:
> The CMA helper is already using the drm_fb_helper_generic_probe part of
> the generic fbdev emulation. This patch makes full use of the generic
> fbdev emulation by using its drm_client callbacks. This means that
> drm_mode_conf
On 14/09/2018 10:28, Ben Skeggs wrote:
> On Wed, 12 Sep 2018 at 20:59, Takashi Iwai wrote:
>>
>> When a fan is controlled via linear fallback without cstate, we
>> shouldn't stop polling. Otherwise it won't be adjusted again and
>> keeps running at an initial crazy pace.
> Martin,
>
> Any though
On 09/14/2018 08:37 AM, Gerd Hoffmann wrote:
Hi,
Well, no. This is *not* about 3D, it's about software rendering, for
example cairo doing its work for gtk apps. So the workflow would be
along these lines:
(1) guest app allocates dumb drm buffer from virtio-gpu, renders to it.
Why not le
This makes it simple to test if all cache types are mappable.
Signed-off-by: Guido Günther
---
Prompted by
https://lists.freedesktop.org/archives/etnaviv/2018-September/001946.html
tests/etnaviv/etnaviv_bo_cache_test.c | 26 ++
1 file changed, 26 insertions(+)
diff
Hi,
On Fri, Sep 14, 2018 at 11:24:38AM +0200, Lucas Stach wrote:
> The etnaviv device is a virtual device backing the DRM device, which may
> drive multiple hardware GPU core devies. As most of the dma-mapping handling
> is done through the virtual device, we need to make sure that a proper DMA
> s
On Fri, Sep 14, 2018 at 02:00:30PM +0200, Tomeu Vizoso wrote:
> On 09/14/2018 08:37 AM, Gerd Hoffmann wrote:
> >Hi,
> >
> > > > Well, no. This is *not* about 3D, it's about software rendering, for
> > > > example cairo doing its work for gtk apps. So the workflow would be
> > > > along these
https://bugs.freedesktop.org/show_bug.cgi?id=107095
--- Comment #5 from Andrew Dorney ---
This is still occurring as of today using:
linux 4.18.6.arch1-1
mesa 18.2.0-1
xf86-video-amdgpu 18.0.1-2
xorg-server 1.20.1-1
Same error messages in dmesg.
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Hi Laurent,
On 14/09/18 12:11, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> How about renaming the subject line to "Add support for missing pixel
> formats"
> ?
>
Ack.
> On Friday, 31 August 2018 21:12:58 EEST Kieran Bingham wrote:
>> From: Koji Matsuoka
>>
>> This
https://bugzilla.kernel.org/show_bug.cgi?id=199139
Nicholas Kazlauskas (nicholas.kazlaus...@amd.com) changed:
What|Removed |Added
CC||nichol
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