On Thu, Sep 6, 2018 at 10:25 PM Stefan Agner wrote:
> Ok, I read a bit up on the history of bridge timing, especially:
> https://www.spinics.net/lists/dri-devel/msg155618.html
>
> IMHO, this got overengineered. For displays we do not need all that
> setup/sample delay timing information, and much
On 2018/08/27 16:41, Christian König wrote:
> Am 26.08.2018 um 10:40 schrieb Tetsuo Handa:
>> I'm not following. Why don't we need to do like below (given that
>> nobody except amdgpu_mn_read_lock() holds ->read_lock) because e.g.
>> drm_sched_fence_create() from drm_sched_job_init() from amdgpu_cs
Hi,
On Wednesday 05 September 2018 02:46 PM, Maxime Ripard wrote:
> The phy framework is only allowing to configure the power state of the PHY
> using the init and power_on hooks, and their power_off and exit
> counterparts.
>
> While it works for most, simple, PHYs supported so far, some more ad
+to maintainer.
On 2018/8/17 10:24, zhong jiang wrote:
> for_each_available_child_of_node will get and put the node properly,
> the following of_node_put will lead to the double put. So just
> remove it.
>
> Signed-off-by: zhong jiang gg
> ---
> drivers/gpu/drm/zte/zx_drm_drv.c | 4 +---
> 1 file
On Wed, Sep 5, 2018 at 1:20 PM, Maxime Ripard wrote:
> On Tue, Sep 04, 2018 at 12:40:50PM +0800, Icenowy Zheng wrote:
>> + hdmi_phy: hdmi-phy@1ef {
>> + compatible = "allwinner,sun8i-h3-hdmi-phy";
>> + reg = <0x01ef 0x1>;
>> +
On Wed, Sep 05, 2018 at 04:53:26PM +0300, Laurent Pinchart wrote:
> Hi Jacopo,
>
> On Tuesday, 4 September 2018 17:49:53 EEST jacopo mondi wrote:
> > On Tue, Sep 04, 2018 at 04:32:32PM +0200, Geert Uytterhoeven wrote:
> > > On Tue, Sep 4, 2018 at 2:10 PM Laurent Pinchart wrote:
> > >> From: Takesh
On Thu, Sep 6, 2018 at 8:11 AM Emil Velikov wrote:
>
> HI all,
>
> On 6 September 2018 at 07:10, Lucas De Marchi
> wrote:
> > On Wed, Sep 5, 2018 at 7:00 PM Rodrigo Vivi wrote:
> >>
> >> well it builds for me.
> >>
> >> but any idea what might be wrong here on gitlab ci?
> >
> FWIW gitlab g
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/virtio/virtgpu_display.c: In function
'virtio_gpu_framebuffer_init':
drivers/gpu/drm/virtio/virtgpu_display.c:78:28: warning:
variable 'bo' set but not used [-Wunused-but-set-variable]
struct virtio_gpu_object *bo;
On Thu, Sep 06, 2018 at 11:39:42PM +0200, Daniel Vetter wrote:
> On Thu, Sep 6, 2018 at 6:01 PM, Steven Rostedt wrote:
> > On Thu, 6 Sep 2018 09:58:04 -0600
> > Jonathan Corbet wrote:
> >
> >> Thanks,
> >>
> >> jon (who is increasingly inclined to apply this patch)
> >
> > As Colin Kaepernick no
Drivers must set the quirk_addfb_prefer_host_byte_order quirk to make
the drm_mode_addfb() compat code work correctly on bigendian machines.
If they don't they interpret pixel_format values incorrectly for bug
compatibility, which in turn implies the ADDFB2 ioctl does not work
correctly then. So
On Fri, Sep 07, 2018 at 02:03:57AM +, YueHaibing wrote:
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/gpu/drm/virtio/virtgpu_display.c: In function
> 'virtio_gpu_framebuffer_init':
> drivers/gpu/drm/virtio/virtgpu_display.c:78:28: warning:
> variable 'bo' set but not used [-Wu
https://bugs.freedesktop.org/show_bug.cgi?id=105018
Michel Dänzer changed:
What|Removed |Added
Resolution|--- |FIXED
Status|REOPENED
https://bugs.freedesktop.org/show_bug.cgi?id=106225
Michel Dänzer changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
/linux/commits/Peter-Wu/bochs-convert-to-drm_fb_helper_fbdev_setup-teardown/20180907-154819
config: i386-randconfig-x006-201835 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All warnings (new
On Fri, Sep 07, 2018 at 09:43:29AM +0530, Jagan Teki wrote:
> On Wed, Sep 5, 2018 at 1:20 PM, Maxime Ripard
> wrote:
> > On Tue, Sep 04, 2018 at 12:40:50PM +0800, Icenowy Zheng wrote:
> >> + hdmi_phy: hdmi-phy@1ef {
> >> + compatible = "allwinner,sun8i-h3-hdmi-
v5: This is YUV444 packed format same as AYUV, but without alpha,
as supported by i915.
v6: Removed unneeded initializer for new XYUV format.
v7: Added is_yuv field initialization according to latest
drm_fourcc format structure initialization changes.
v8: Edited commit message to be more
Introduced new XYUV scan-in format for framebuffer and
added support for it to i915(SkyLake+).
Stanislav Lisovskiy (2):
drm: Introduce new DRM_FORMAT_XYUV
drm/i915: Adding YUV444 packed format support for skl+
drivers/gpu/drm/drm_fourcc.c | 1 +
drivers/gpu/drm/i915/i915_reg.h
PLANE_CTL_FORMAT_AYUV is already supported, according to hardware
specification.
v2: Edited commit message, removed redundant whitespaces.
v3: Fixed fallthrough logic for the format switch cases.
v4: Yet again fixed fallthrough logic, to reuse code from other case
labels.
v5: Started to use
Hi,
On Wed, Sep 05, 2018 at 04:43:57PM +0300, Laurent Pinchart wrote:
> > The current set of parameters should cover all the potential users.
> >
> > Signed-off-by: Maxime Ripard
> > ---
> > include/linux/phy/phy-mipi-dphy.h | 241 +++-
> > include/linux/phy/phy.h
On Thu, Sep 06, 2018 at 06:24:50PM +0200, Andrew Lunn wrote:
> > > > +int phy_configure(struct phy *phy, enum phy_mode mode,
> > > > + union phy_configure_opts *opts)
> > > > +{
> > > > + int ret;
> > > > +
> > > > + if (!phy)
> > > > + return -EINVAL;
> >
https://bugs.freedesktop.org/show_bug.cgi?id=107855
Bug ID: 107855
Summary: [regression] [amdgpu] [drm:vce_v2_0_start [amdgpu]]
*ERROR* VCE not responding, giving up!!!
Product: DRI
Version: unspecified
Hardware: x86-64 (AM
On Thu, Sep 06, 2018 at 07:51:05PM +0300, Laurent Pinchart wrote:
> On Thursday, 6 September 2018 17:48:07 EEST Maxime Ripard wrote:
> > On Wed, Sep 05, 2018 at 04:39:46PM +0300, Laurent Pinchart wrote:
> > > On Wednesday, 5 September 2018 12:16:33 EEST Maxime Ripard wrote:
> > >> The phy framework
https://bugs.freedesktop.org/show_bug.cgi?id=107855
--- Comment #1 from Michel Dänzer ---
Can you a try a 4.19-rc2 or later kernel? Specifically,
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6d39df146ff12fb5c71634ad135144d5423590ec
fixed this for me.
--
You are
On Thu, 6 Sep 2018 21:36:51 +
Deepak Singh Rawat wrote:
> >
> > - Why no input validation on the damage clips against the framebuffer
> > size? Ime not validating just leads to funny driver bugs down the road,
> > so what's the use-case you have in mind here?
>
> My motivation behind
ut in a way that it is reachable by the other modules.
>
> Fixes: 57e23de02f48 ("drm/sun4i: DW HDMI: Expand algorithm for possible
> crtcs")
> Fixes: ef0cf6441fbb ("drm/sun4i: Add support for traversing graph with TCON
> TOP")
> Signed-off-by: Arnd Bergmann
I am se
On Fri, Sep 7, 2018 at 6:51 AM Marek Olšák wrote:
>
> Hopefully this answers some questions.
>
> Other parameters that affect tiling layouts are GB_ADDR_CONFIG (all
> chips) and MC_ARB_RAMCFG (GFX6-8 only), and those vary with each chip.
For GFX6-GFX8:
From GB_ADDR_CONFIG addrlib only uses the pi
https://bugs.freedesktop.org/show_bug.cgi?id=107857
Bug ID: 107857
Summary: [apitrace] GPU hang on VEGA10
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priority:
Hi Dave,
Here's the first batch of changes for v4.20. Nothing too special.
Notable things are more Icelake enabling/fixing patches and PPGTT
enabling for some older platforms. Icelake is still behind
alpha_support flag as we have the code in upstream but extensive
testing is pending hardware avai
On Fri, Sep 07, 2018 at 12:19:42PM +0800, Chen-Yu Tsai wrote:
>
> Hi,
>
> This is v2 of my sun4i-drm LCD color dithering series. v1 was from back
> in April [1]. Most of the driver code is unchanged.
>
> Changes since v1:
>
> - Explicitly list properties from the simple-panel binding that app
rtcs")
> > Fixes: ef0cf6441fbb ("drm/sun4i: Add support for traversing graph with TCON
> > TOP")
> > Signed-off-by: Arnd Bergmann
> I am seeing the following on today's -next (20180907) as well the last
> few -next versions for that matter ...
>
> ERRO
way that it is reachable by the other modules.
> > >
> > > Fixes: 57e23de02f48 ("drm/sun4i: DW HDMI: Expand algorithm for possible
> > > crtcs")
> > > Fixes: ef0cf6441fbb ("drm/sun4i: Add support for traversing graph with
> > > TCON TOP")
&
On Mon, Sep 03, 2018 at 04:07:08PM +0200, Thomas Hellstrom wrote:
> Commit 08295b3b5bee ("Implement an algorithm choice for Wound-Wait
> mutexes") introduced a reference in the documentation to a function
> that was removed in an earlier commit.
>
> It also forgot to remove a call to debug_mutex_a
https://bugs.freedesktop.org/show_bug.cgi?id=107855
--- Comment #2 from Pontus Gråskæg ---
It doesn't appear to solve it. Instead I get a different problem earlier in the
boot sequence, so it does not appear to reach the VCE code - dmesg extract
below.
The effect on me is that I don't get a visi
https://bugs.freedesktop.org/show_bug.cgi?id=107855
--- Comment #3 from Christian König ---
(In reply to Pontus Gråskæg from comment #2)
> This behaviour occurs with *both*
> the kernel command line having amdgpu.dc=1 *AND* amdgpu.dc=0 - in other
> words the old radeon driver is also having probl
https://bugs.freedesktop.org/show_bug.cgi?id=107855
--- Comment #4 from Michel Dänzer ---
(In reply to Pontus Gråskæg from comment #2)
> [2.619673] gfx7: Failed to load firmware "amdgpu/kaveri_pfp.bin"
> [2.619798] [drm:gfx_v7_0_sw_init [amdgpu]] *ERROR* Failed to load gfx
The new kerne
https://bugs.freedesktop.org/show_bug.cgi?id=107855
--- Comment #5 from Pontus Gråskæg ---
Sorry for the confusion.
"The new kernel reads the microcode from /lib/firmware/amdgpu/kaveri_*. Since
you don't have those files yet, you can create symlinks to those in
/lib/firmware/radeon/. Don't forge
Hi Daniel,
On Fri, Aug 31, 2018 at 10:17:30AM +0200, Daniel Vetter wrote:
On Thu, Aug 23, 2018 at 04:23:41PM +0100, Brian Starkey wrote:
Some formats have a non-integer number of bytes per pixel, which can't
be handled with the existing 'cpp' field in drm_format_info. To handle
these formats, a
On Wed, Sep 05, 2018 at 07:08:10PM -0700, Jeykumar Sankaran wrote:
> MISR support is the debug feature present in Snapdragon chipsets.
> At the layer mixer and interfaces, MISR algorithm can generate CRC
> signatures of the pixel data which can be used for validating
> the frames generated. Since t
On Wed, Sep 05, 2018 at 07:08:11PM -0700, Jeykumar Sankaran wrote:
> DPU power handler maintained PRE/POST versions of power
> ENABLE/DISABLE events to accommodate tasks which need be
> handled before/after data bus voting. But since the bus voting
> API's are deprecated and removed from the driver
https://bugs.freedesktop.org/show_bug.cgi?id=107858
Bug ID: 107858
Summary: Screen resolution wrong after turning monitor off and
on
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (All)
https://bugs.freedesktop.org/show_bug.cgi?id=107858
--- Comment #1 from Michel Dänzer ---
(In reply to Lothar Paltins from comment #0)
> [ 11925.963] (II) AMDGPU(0): Allocate new frame buffer 800x600
> [ 11925.963] (II) AMDGPU(0): => pitch 3584 bytes
>
>
> The EDID information is correct, but
On Wed, Sep 05, 2018 at 07:08:28PM -0700, Jeykumar Sankaran wrote:
> RM maintained a redundant definition for display topology
> to identify the no. of hw blocks needed for a display
> and their hardware dependencies. This information can be
> implicitly deduced from the msm_display_topology struct
On Wed, Sep 05, 2018 at 07:08:27PM -0700, Jeykumar Sankaran wrote:
> DPU, being over protective, validates every parameter of a
> module. This change traces the call stack for some of encoder
> functions affected by previous set of clean up patches and
> cleans up unwanted validations.
>
> changes
On Wed, Sep 05, 2018 at 07:08:26PM -0700, Jeykumar Sankaran wrote:
> Connector states were passed around RM to update the custom
> topology connector property with chosen topology data. Now that
> we got rid of both custom properties and topology names, this
> change cleans up the mechanism to pass
On Thu, Sep 06, 2018 at 07:10:06AM +0200, Jernej Škrabec wrote:
> Dne sreda, 05. september 2018 ob 09:03:35 CEST je Maxime Ripard napisal(a):
> > On Tue, Sep 04, 2018 at 10:06:06PM +0530, Jagan Teki wrote:
> > > Allwinner SoC like SUN8I and SUN50I has DE2 CCU so enable them
> > > as default.
> > >
https://bugs.freedesktop.org/show_bug.cgi?id=107855
--- Comment #6 from Pontus Gråskæg ---
Created attachment 141473
--> https://bugs.freedesktop.org/attachment.cgi?id=141473&action=edit
dmesg_4.19.0-041900rc2_dc.eq.1_initrdfixed
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https://bugs.freedesktop.org/show_bug.cgi?id=107855
--- Comment #7 from Pontus Gråskæg ---
OK, symlinks done, initrd rebuilt
Results are:
With amdgpu.dc=0 System boots with normal behaviour. Laptop eDP screen works,
VGA output works. I have no HDMI monitor to check if HDMI output works.
With a
https://bugs.freedesktop.org/show_bug.cgi?id=107855
--- Comment #8 from Pontus Gråskæg ---
Created attachment 141474
--> https://bugs.freedesktop.org/attachment.cgi?id=141474&action=edit
dmesg_4.19.0-041900rc2_dc.eq.0_initrdfixed
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On Wed, Sep 05, 2018 at 04:46:05PM +0300, Laurent Pinchart wrote:
> Hi Maxime,
>
> Thank you for the patch.
>
> On Wednesday, 5 September 2018 12:16:35 EEST Maxime Ripard wrote:
> > The MIPI D-PHY spec defines default values and boundaries for most of the
> > parameters it defines. Introduce help
On Wed, Sep 05, 2018 at 04:48:27PM +0300, Laurent Pinchart wrote:
> Hi Maxime,
>
> Thank you for the patch.
>
> On Wednesday, 5 September 2018 12:16:40 EEST Maxime Ripard wrote:
> > Cadence has designed a D-PHY that can be used by the, currently in tree,
> > DSI bridge (DRM), CSI Transceiver and
On Wed, Sep 05, 2018 at 07:08:09PM -0700, Jeykumar Sankaran wrote:
> Based on the comments received for the patch series[1] and to
> make the review process a bit more easy, spliting up the
> patches for cleanup and resource manager refactor. This series
> cleans up and prepares the DPU for upcom
https://bugs.freedesktop.org/show_bug.cgi?id=103199
Chris Wilson changed:
What|Removed |Added
Status|REOPENED|RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=107693
--- Comment #9 from gloriouseggr...@gmail.com ---
it may have been using 3.3compat or 3.2compat, dont remember which, but that
patch was working with both games
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On Fri, Sep 7, 2018 at 7:54 AM Michal Simek wrote:
>
> Hi Rob,
>
> 2018-09-05 21:37 GMT+02:00 Rob Herring :
>>
>> This series adds an iterator for cpu nodes and converts users over to use
>> it or of_get_cpu_node in some cases. This allows us to remove the
>> dependency on device_type property for
On Thu, Sep 06, 2018 at 10:32:58PM +, Deepak Singh Rawat wrote:
> >
> > On Wed, Sep 05, 2018 at 04:38:48PM -0700, Deepak Rawat wrote:
> > > From: Lukasz Spintzyk
> > >
> > > FB_DAMAGE_CLIPS is an optional plane property to mark damaged regions
> > > on the plane in framebuffer coordinates of
Hi Maxime,
On Friday, 7 September 2018 16:37:39 EEST Maxime Ripard wrote:
> On Wed, Sep 05, 2018 at 04:46:05PM +0300, Laurent Pinchart wrote:
> > On Wednesday, 5 September 2018 12:16:35 EEST Maxime Ripard wrote:
> >> The MIPI D-PHY spec defines default values and boundaries for most of
> >> the pa
Hi Deepak,
On 6 September 2018 at 00:47, Deepak Rawat wrote:
> With drm subsystem using struct drm_rect to manage rectangular area this
> export it to user-space.
>
> Currently used by drm_mode_atomic blob property FB_DAMAGE_CLIPS.
>
> --- a/include/drm/drm_mode.h
> +++ b/include/drm/drm_mode.h
Hi Maxime,
On Friday, 7 September 2018 11:56:23 EEST Maxime Ripard wrote:
> On Wed, Sep 05, 2018 at 04:43:57PM +0300, Laurent Pinchart wrote:
> >> The current set of parameters should cover all the potential users.
> >>
> >> Signed-off-by: Maxime Ripard
> >> ---
> >>
> >> include/linux/phy/phy
Hi Iida-san,
On 2018-09-06 4:10 a.m., Masanari Iida wrote:
> This patch fixes following wornings.
>
> ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3011:
> warning: Excess function parameter 'dev' description
> in 'amdgpu_vm_get_task_info'
>
> ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3012:
> warnin
https://bugs.freedesktop.org/show_bug.cgi?id=103199
Martin Peres changed:
What|Removed |Added
Status|RESOLVED|CLOSED
--- Comment #6 from Martin Peres
https://bugs.freedesktop.org/show_bug.cgi?id=103199
--- Comment #7 from Chris Wilson ---
It should do the trick. My memory of the test says that if we can't open the
file we say the engine mask is 0. However, I do have an update to the igt
pending review in case it doesn't.
We shall see what hap
On 09/07/2018 08:20 AM, jun qian wrote:
The value in the wrong position will cause misunderstanding,
when the debug infomations display in the window.
I think the existing order is okay, it's just not separated
well. It's "$count pages of order $order". I also just acked a
patch to remove all
On Thu, 2018-09-06 at 22:35 -0700, Joe Perches wrote:
> On Thu, 2018-09-06 at 17:43 -0400, Lyude Paul wrote:
> > Since we're about to use this in nouveau_backlight.c. Same thing as
> > DRM_WARN_ONCE, DRM_INFO_ONCE, etc...
>
> Can you redefine this in terms of the patches I submitted
> instead?
>
https://bugs.freedesktop.org/show_bug.cgi?id=106928
Andrés Gómez García changed:
What|Removed |Added
CC||ago...@igalia.com,
Hi Laurent,
On Tue, Sep 04, 2018 at 03:10:17PM +0300, Laurent Pinchart wrote:
> The rcar_du_crtc_get() function is always immediately followed by a call
> to rcar_du_crtc_setup(). Call the later from the former to simplify the
> code, and add a comment to explain how the get and put calls are
> ba
On 07.09.2018 00:10, Linus Walleij wrote:
> On Thu, Sep 6, 2018 at 10:25 PM Stefan Agner wrote:
>
>> Ok, I read a bit up on the history of bridge timing, especially:
>> https://www.spinics.net/lists/dri-devel/msg155618.html
>>
>> IMHO, this got overengineered. For displays we do not need all that
https://bugs.freedesktop.org/show_bug.cgi?id=106928
Roland Scheidegger changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
On Fri, Sep 07, 2018 at 01:45:36PM +0100, Brian Starkey wrote:
> Hi Daniel,
>
> On Fri, Aug 31, 2018 at 10:17:30AM +0200, Daniel Vetter wrote:
> > On Thu, Aug 23, 2018 at 04:23:41PM +0100, Brian Starkey wrote:
> > > Some formats have a non-integer number of bytes per pixel, which can't
> > > be ha
On Thu, Sep 06, 2018 at 09:44:25PM +, Deepak Singh Rawat wrote:
>
> > > #include
> > >
> > > /**
> > > @@ -75,6 +76,11 @@
> > > * While kernel does not error for overlapped damage clips, it is
> > discouraged.
> > > */
> > >
> > > +static int convert_fixed_to_32(int fixed)
> > > +{
> >
On Fri, Sep 07, 2018 at 12:18:10AM +0200, Peter Wu wrote:
> Clarify the relation between drm_fb_helper_fbdev_setup/teardown. Clarify
> requirements for the new generic fbdev emulation API and log some more
> details in case the driver does something wrong. Fix related typos.
>
> Cc: Noralf Trønnes
On Fri, Sep 07, 2018 at 09:32:13AM +0200, Gerd Hoffmann wrote:
> Drivers must set the quirk_addfb_prefer_host_byte_order quirk to make
> the drm_mode_addfb() compat code work correctly on bigendian machines.
>
> If they don't they interpret pixel_format values incorrectly for bug
> compatibility,
On Fri, Sep 07, 2018 at 07:47:08PM +0200, Michał Mirosław wrote:
> As noticed by kbuild test robot ,
> remove_conflicting_pci_framebuffers()'s second argument
> is called res_id not resource_id. Fix this.
>
> Signed-off-by: Michał Mirosław
> ---
> * Against drm-misc-next, as that's where original
https://bugs.freedesktop.org/show_bug.cgi?id=107693
--- Comment #10 from Sven Arvidsson ---
FWIW, the patch doesn't apply cleanly, but still works with Wine 3.15. The game
starts and looks ok with MESA_GLSL_VERSION_OVERRIDE=150
MESA_GL_VERSION_OVERRIDE=3.2COMPAT (both on 18.0.5 without real comp
On 2018-09-06 09:14, Jordan Crouse wrote:
On Wed, Sep 05, 2018 at 07:08:26PM -0700, Jeykumar Sankaran wrote:
Connector states were passed around RM to update the custom
topology connector property with chosen topology data. Now that
we got rid of both custom properties and topology names, this
c
Breaking commit is a merge commit from upstream mainline:
commit 13e091b6dd0e78a518a7d8756607d3acb8215768
Merge: eac341194426 1088c6eef261
Author: Linus Torvalds
Date: Mon Aug 13 18:28:19 2018 -0700
Merge branch 'x86-timers-for-linus' of
git://git.kernel.org/pub/scm/linux/kernel/g
https://bugs.freedesktop.org/show_bug.cgi?id=107784
--- Comment #19 from Sylvain BERTRAND ---
Breaking commit is a merge commit from upstream mainline:
commit 13e091b6dd0e78a518a7d8756607d3acb8215768
Merge: eac341194426 1088c6eef261
Author: Linus Torvalds
Date: Mon Aug 13 18:28:19 201
Hi,
Could you please suggest me on this?
The requirement is to render interlaced alternate buffers. In case of
alternate, top field and bottom field are in two different buffers.
The question is, can we pass existing flags DRM_MODE_PRESENT_TOP_FIELD
and DRM_MODE_PRESENT_TOP_FIELD to DRM_IOCTL_MO
https://bugs.freedesktop.org/show_bug.cgi?id=106671
--- Comment #13 from Alan W. Irwin ---
Well, after 1.5 (successful) days with the remote graphics experiment, I
decided instead it made more sense to go after the quicker acting instability
that I have previously experienced in direct graphics m
On Fri, Sep 7, 2018 at 5:55 AM, Bas Nieuwenhuizen
wrote:
> On Fri, Sep 7, 2018 at 6:51 AM Marek Olšák wrote:
>>
>> Hopefully this answers some questions.
>>
>> Other parameters that affect tiling layouts are GB_ADDR_CONFIG (all
>> chips) and MC_ARB_RAMCFG (GFX6-8 only), and those vary with each c
https://bugs.freedesktop.org/show_bug.cgi?id=107863
Bug ID: 107863
Summary: Kernel panic when external monitors go blank
Product: DRI
Version: XOrg git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=105018
--- Comment #41 from Ainola ---
ecomer, as I suspect we are both experiencing the same issue, here's a new
report you (and anyone else lurking) can follow:
https://bugs.freedesktop.org/show_bug.cgi?id=107863
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https://bugs.freedesktop.org/show_bug.cgi?id=107863
--- Comment #1 from Ainola ---
I should also note that a very similar software (desktop) setup with a Vega 64
card has no such issue with an external displayport monitor.
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https://bugs.freedesktop.org/show_bug.cgi?id=106671
--- Comment #14 from Alan W. Irwin ---
Created attachment 141479
--> https://bugs.freedesktop.org/attachment.cgi?id=141479&action=edit
compressed dmesg output from current direct graphics experiment
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MISR support is the debug feature present in Snapdragon chipsets.
At the layer mixer and interfaces, MISR algorithm can generate CRC
signatures of the pixel data which can be used for validating
the frames generated. Since there are no clients for this feature,
strip down the support from the drive
Avoid querying RM for hw mdp block. Use the one
stored in KMS during initialization.
changes in v4:
- none
changes in v5:
- none
changes in v6:
- none
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 12 +
Mark CRTC get_mixer_width helper API static as it is
not used outside the file.
changes in v4:
- Patch introduced in the series
changes in v5:
- Simplify the inline function (Sean)
changes in v6:
- none
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
---
drivers
resource pool manager utility was introduced to manage
rotator sessions. Removing the support as the rotator
feature doesn't exist.
changes in v4:
- none
changes in v5:
- none
changes in v6:
- none
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
---
drivers/gpu/
Based on the comments received for the patch series[1] and to
make the review process a bit more easy, spliting up the
patches for cleanup and resource manager refactor. This series
cleans up and prepares the DPU for upcoming RM changes.
[1] https://patchwork.freedesktop.org/series/44669/
chang
cleans up left out scalar config definitions from headers
changes in v4:
- none
changes in v5:
- none
changes in v6:
- none
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu
removes left out variables of previous ping pong
split topology cleanup.
changes in v4:
- none
changes in v5:
- none
changes in v6:
- none
Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 3 ---
1 file changed, 3 del
Resource manager assigns hw_intf blocks for the encoder only on
modeset. If queried for hw_intf objects during init, it will be
NULL. Since hw_intf objects are needed only after encoder enable,
defer the query to encoder enable which will be triggered after
modeset.
changes in v4:
- Add de
In virtual encoder modeset, DPU makes RM request to assign hw blocks
for the display. It is also expected in modeset to iterate and
associate the physical encoders with their relevant hw blocks.
Ping pong blocks are already handled here but hw ctl blocks are not.
This change moves the hw_ctl iterat
Identify slave-master encoders during initialization and enable
the encoders explicitly as the current logic has redundant and
ambiguous loops.
changes in v4:
- identify master/slave encoder while adding
adding physical encoders(Sean)
changes in v5:
- get rid of temporary
DPU power handler maintained PRE/POST versions of power
ENABLE/DISABLE events to accommodate tasks which need be
handled before/after data bus voting. But since the bus voting
API's are deprecated and removed from the driver, squash
the events and their clients respective event handlers
to handle o
Rename hw_ctl to lm_ctl to mean the ctl associated
with the hw layer mixer block.
sed -i 's/\([*@.>]\)hw_ctl\([^s]\)/\1lm_ctl\2/g' dpu_crtc.c dpu_crtc.h
changes in v4:
- Specifiy shell command used for renaming (Sean)
changes in v5:
- none
changes in v6:
- none
Signed-off
Prep changes for state based resource management.
Moves all the hw block tracking for the crtc to the state
object.
changes in v4:
- Serialize crtc state access in debugfs handlers (Sean)
- Split the crtc width query as a separate change (Sean)
changes in v5:
- mode set lo
Destination scaling(DS) is a Snapdragon hardware feature to
scale up the display ROI after layer blending. DPU driver doesn't
support programming of DS blocks yet. This change cleans up the
residual code present in catalog and RM for DS block handling.
Support for the same can be added back when th
DPU had the support to LOCK the hw resources in
atomic check and CLEAR the locked resources explicitly
through custom property values. Now that DPU is
stripped off of all the custom properties, the RM
handlers for this feature will be no-op's. This change
gets rid of all its references.
changes in
Encoder H_TILE values are not used for allocating the hw blocks.
no. of hw_intf blocks provides the info.
changes in v4:
- remove irrelevant changes (Sean)
- retain log macros (Sean)
changes in v5:
- none
changes in v6:
- none
Signed-off-by: Jeykumar Sankaran
Revi
DPU, being over protective, validates every parameter of a
module. This change traces the call stack for some of encoder
functions affected by previous set of clean up patches and
cleans up unwanted validations.
changes in v5:
- Introduced in the series
changes in v6:
- none
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