Signed-off-by: Qiang Yu
---
drivers/gpu/drm/lima/lima_object.c | 120 +
drivers/gpu/drm/lima/lima_object.h | 87 +
2 files changed, 207 insertions(+)
create mode 100644 drivers/gpu/drm/lima/lima_object.c
create mode 100644 drivers/gpu/drm/lima/li
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Vasily Khoruzhick
---
drivers/gpu/drm/lima/lima_vm.c | 312 +
drivers/gpu/drm/lima/lima_vm.h | 73
2 files changed, 385 insertions(+)
create mode 100644 drivers/gpu/drm/lima/lima_vm.
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Erico Nunes
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_gem.c | 459
drivers/gpu/drm/lima/lima_gem.h | 41 +++
2 files changed, 500 insertions(+)
create mode 100644 drivers/
On Wed, May 16, 2018 at 08:56:21PM -0300, Rodrigo Siqueira wrote:
> This commit adds the essential infrastructure for around CRTCs which
> is composed of: a new data struct for output data information, a
> function for creating planes, and a simple encoder attached to the
> connector. Finally, due
On 17.05.2018 18:34, Thierry Reding wrote:
> From: Thierry Reding
>
> Rather than storing some identifier derived from the application
> context that can't be used concretely anywhere, store a pointer to the
> client directly so that accesses can be made directly through that
> client object.
>
On 18.05.2018 15:39, Thierry Reding wrote:
> On Fri, May 18, 2018 at 03:21:11PM +0300, Mikko Perttunen wrote:
>> On 05/17/2018 06:34 PM, Thierry Reding wrote:
>>> From: Thierry Reding
>>>
>>> Userspace needs to know the version of the interface implemented by a
>>> client so it can create the prop
This reverts commit 45c3d213a400c952ab7119f394c5293bb6877e6b.
lima driver need preclose to wait all task in the context
created within closing file to finish before free all the
buffer object. Otherwise pending tesk may fail and get
noisy MMU fault message.
Move this wait to each buffer object fr
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Simon Shields
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_device.c | 407 +
drivers/gpu/drm/lima/lima_device.h | 136 ++
2 files changed, 543 insertions(+)
create mode 100
From: Lima Project Developers
PP is a processor used for OpenGL fragment shader
processing.
Signed-off-by: Qiang Yu
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_pp.c | 418 +
drivers/gpu/drm/lima/lima_pp.h | 37 +++
2 files changed, 455 insertio
The DE2 on the A64 is mainly composed of the mixers and tcons,
plus various encoders.
This patch add second mixer and tcon which eventually useful
for testing HDMI. the other part of DE2 will add in future.
Signed-off-by: Jagan Teki
---
Changes for v2:
- Change compatibles and other based on pre
On 19.05.2018 01:24, Thierry Reding wrote:
> On Sat, May 19, 2018 at 01:18:05AM +0300, Dmitry Osipenko wrote:
>> On 19.05.2018 01:13, Thierry Reding wrote:
>>> On Fri, May 18, 2018 at 11:58:19PM +0200, Thierry Reding wrote:
On Sat, May 19, 2018 at 12:42:22AM +0300, Dmitry Osipenko wrote:
>
On 05/18/2018 11:27 AM, Qiang Yu wrote:
Commit message is missing
> Signed-off-by: Qiang Yu
> ---
> include/uapi/drm/lima_drm.h | 195
> 1 file changed, 195 insertions(+)
> create mode 100644 include/uapi/drm/lima_drm.h
>
> diff --git a/include/uapi/drm/li
Allwinner SoC like SUN8I and SUN50I has DE2 CCU so enable them
as default.
Signed-off-by: Jagan Teki
---
Changes for v2:
- Enable for MACH_SUN8I
drivers/clk/sunxi-ng/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index 8
On 17.05.2018 18:34, Thierry Reding wrote:
> From: Thierry Reding
>
> The job submission userspace ABI doesn't support this and there are no
> plans to implement it, so all of this code is dead and can be removed.
>
> Signed-off-by: Thierry Reding
> ---
> drivers/gpu/drm/tegra/drm.c|
Enable HDMI output on Bananpi-m64 board.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
b/arch/arm64/bo
Signed-off-by: Qiang Yu
---
drivers/gpu/drm/lima/lima_ctx.c | 143
drivers/gpu/drm/lima/lima_ctx.h | 51
2 files changed, 194 insertions(+)
create mode 100644 drivers/gpu/drm/lima/lima_ctx.c
create mode 100644 drivers/gpu/drm/lima/lima_ctx.h
diff
Hi,
in order to improve kernelci.org results and avoid false positive cases like
this [1], i suggested to also test for a working VC4 driver. In order to keep
it simple, we should do it from userspace.
My first idea was:
test -d /sys/kernel/debug/dri/0 || echo "Error case"
But maybe you have a
Signed-off-by: Qiang Yu
---
drivers/gpu/drm/lima/lima_ttm.c | 409
drivers/gpu/drm/lima/lima_ttm.h | 44
2 files changed, 453 insertions(+)
create mode 100644 drivers/gpu/drm/lima/lima_ttm.c
create mode 100644 drivers/gpu/drm/lima/lima_ttm.h
diff --git a/
On 17.05.2018 18:34, Thierry Reding wrote:
> From: Thierry Reding
>
> The number of words and the offset in a gather don't need to be
> explicitly sized, so make them unsigned int instead.
>
> Signed-off-by: Thierry Reding
> ---
> drivers/gpu/host1x/job.c | 13 -
> drivers/gpu/host
On 17.05.2018 18:34, Thierry Reding wrote:
> From: Thierry Reding
>
> All other array variables use a plural, and this is the only one using
> the *array suffix. This is confusing, so rename it for consistency.
>
> Signed-off-by: Thierry Reding
> ---
> drivers/gpu/drm/tegra/drm.c | 4 ++--
> d
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_regs.h | 304 +++
1 file changed, 304 insertions(+)
create mode 100644 drivers/gpu/drm/lima/lima_regs.h
diff --git a/drivers/gpu/drm/lima/lima_regs.h
On 17.05.2018 18:34, Thierry Reding wrote:
> From: Thierry Reding
>
> Functions taking a pointer to a host1x syncpoint as an argument don't
> need to specify a pointer to a host1x instance because it can be
> obtained from the syncpoint.
>
> Signed-off-by: Thierry Reding
> ---
> drivers/gpu/ho
From: Jernej Skrabec
PHY is the same as in H3, except it can select between two clock parent.
Signed-off-by: Jernej Skrabec
Signed-off-by: Jagan Teki
---
Changes for v2:
- new patch
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/driver
Allwinner A64 has DE2 pipeline with tcon0 and tcon1 block
which is similar Allwinner A83T.
This patch adds dt-binding documentation for A64 DE2 tcon1 blocks.
Mixer1 has different configuration for A64 so use separate compatible
but tcon1 has similar behaviour with A83T so add fallback compatible.
On 17.05.2018 18:41, Thierry Reding wrote:
> From: Thierry Reding
>
> Set the owner and name of the exported DMA-BUF in addition to the
> already filled-in fields.
>
> Signed-off-by: Thierry Reding
> ---
> drivers/gpu/drm/tegra/gem.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/
Meson mali GPU operate in high clock frequency, need
this value be high to work in a stable state.
Signed-off-by: Qiang Yu
---
arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
b/arch/arm64/boot/dt
Hi,
Dne petek, 18. maj 2018 ob 17:09:40 CEST je Sergey Suloev napisal(a):
> Hi, guys,
>
> On 05/18/2018 05:46 PM, Jernej Škrabec wrote:
> > Hi,
> >
> > Dne petek, 18. maj 2018 ob 12:01:16 CEST je Maxime Ripard napisal(a):
> >> On Fri, May 18, 2018 at 03:15:22PM +0530, Jagan Teki wrote:
> >>> Fro
According to documentation and experience with other similar SoCs, video
PLLs don't work stable if their output frequency is set below 192 MHz.
Because of that, set minimal rate to both A64 video PLLs to 192 MHz.
Signed-off-by: Jagan Teki
---
Changes for v2:
- New patch
drivers/clk/sunxi-ng/cc
On 17.05.2018 18:34, Thierry Reding wrote:
> From: Thierry Reding
>
> Use unsigned int where possible and don't unnecessarily initialize the
> loop variable.
>
> Signed-off-by: Thierry Reding
> ---
> drivers/gpu/host1x/debug.c | 2 +-
> drivers/gpu/host1x/intr.c | 2 +-
> drivers/gpu/host1x
Hi,
Dne petek, 18. maj 2018 ob 12:01:16 CEST je Maxime Ripard napisal(a):
> On Fri, May 18, 2018 at 03:15:22PM +0530, Jagan Teki wrote:
> > From: Jernej Skrabec
> >
> > Some SoCs with DW HDMI have multiple possible clock parents, like A64
> > and R40.
> >
> > Expand HDMI PHY clock driver to sup
Signed-off-by: Qiang Yu
---
drivers/gpu/drm/lima/lima_sched.c | 497 ++
drivers/gpu/drm/lima/lima_sched.h | 126
2 files changed, 623 insertions(+)
create mode 100644 drivers/gpu/drm/lima/lima_sched.c
create mode 100644 drivers/gpu/drm/lima/lima_sched.h
dif
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Neil Armstrong
Signed-off-by: Simon Shields
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/Kconfig | 2 ++
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/lima/Kconfig | 9 +
drivers/gpu/drm/lima/M
DLBU is used to balance load among PPs.
Signed-off-by: Qiang Yu
---
drivers/gpu/drm/lima/lima_dlbu.c | 75
drivers/gpu/drm/lima/lima_dlbu.h | 37
2 files changed, 112 insertions(+)
create mode 100644 drivers/gpu/drm/lima/lima_dlbu.c
create mode
Enable HDMI output on sopine board.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
b/arch/arm64/boo
Map firewall-copied buffers into Host1x's IOVA space, otherwise Host1x
CDMA can't access the command buffers and all submitted jobs fail if IOMMU
and Host1x firewall are enabled in the kernels config.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/host1x/job.c | 58 ++
On Fri, May 18, 2018 at 11:01:55AM -0700, Kees Cook wrote:
> On Tue, Apr 10, 2018 at 6:03 PM, Laura Abbott wrote:
> > There's an ongoing effort to remove VLAs[1] from the kernel to eventually
> > turn on -Wvla. The vla in reg_write_range is based on the length of data
> > passed. The one use of a
Both mixers have similar capabilities as others SoCs with DE2.
First mixer has 1 VI and 3 UI planes and supports HW scaling on all
planes.
Second mixer has 1 VI and 1 UI planes and also supports HW scaling on
all planes.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 2
On Mon, Apr 9, 2018 at 2:06 PM, Laura Abbott wrote:
>
> There's an ongoing effort to remove VLAs[1] from the kernel to eventually
> turn on -Wvla. Switch to a reasonable upper bound for the VLAs in
> the gma500 driver.
>
> [1] https://lkml.org/lkml/2018/3/7/621
>
> Signed-off-by: Laura Abbott
Re
On 18.05.2018 23:33, Thierry Reding wrote:
> From: Thierry Reding
>
> Document the userspace ABI with kerneldoc to provide some information on
> how to use it.
>
> v2:
> - keep GEM object creation flags for ABI compatibility
> - fix typo in struct drm_tegra_syncpt_incr kerneldoc
> - fix typos in
Hi Thierry,
> This commit adds support for KOE's 5.7" display.
>
Thierry, shall I perform some more work on this code, or is it
eligible for applying to your tree?
Best regards,
Łukasz
> Signed-off-by: Lukasz Majewski
> ---
> .../bindings/display/panel/koe,tx14d24vm1bpa.txt | 42
>
Signed-off-by: Qiang Yu
---
drivers/gpu/drm/lima/lima_l2_cache.c | 98
drivers/gpu/drm/lima/lima_l2_cache.h | 32 +
2 files changed, 130 insertions(+)
create mode 100644 drivers/gpu/drm/lima/lima_l2_cache.c
create mode 100644 drivers/gpu/drm/lima/lima_l2_cac
Hi,
Dne nedelja, 20. maj 2018 ob 04:09:52 CEST je Julian Calaby napisal(a):
> Hi Jernej,
>
> On Sun, May 20, 2018 at 11:57 AM, Julian Calaby
wrote:
> > Hi Jernej,
> >
> > On Sun, May 20, 2018 at 4:31 AM, Jernej Skrabec
wrote:
> >> R40 display pipeline has a lot of possible configurations. HD
Hi Thierry,
> This commit adds support for AUO's 7.0" display.
>
Thierry, shall I perform some more work on this code, or is it
eligible for applying to your tree?
Best regards,
Łukasz
> Signed-off-by: Lukasz Majewski
> Reviewed-by: Rob Herring
>
> ---
> Changes for v3:
> - Remove not used
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Marek Vasut
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_mmu.c | 154
drivers/gpu/drm/lima/lima_mmu.h | 34 +++
2 files changed, 188 insertions(+)
create mode 100644 driv
Hi,
Dne petek, 18. maj 2018 ob 17:26:51 CEST je Maxime Ripard napisal(a):
> On Fri, May 18, 2018 at 04:46:41PM +0200, Jernej Škrabec wrote:
> > > And this is a bit sloppy, since if phy_clk_num == 3, you won't try to
> > > lookup pll-2 either.
> >
> > It is highly unlikely this will be higher than
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Erico Nunes
---
drivers/gpu/drm/lima/lima_gem_prime.c | 66 +++
drivers/gpu/drm/lima/lima_gem_prime.h | 31 +
2 files changed, 97 insertions(+)
create mode 100644 drivers/gpu/drm/lima/lima
Enable DRM Support for Allwinner Display Engine, built as a module.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index d25121b087bb..d2db76f296cf
As already described in DT binding, TCON TOP is responsible for
configuring display pipeline. In this initial driver focus is on HDMI
pipeline, so TVE and LCD configuration is not implemented.
Implemented features:
- HDMI source selection
- clock driver (TCON and DSI gating)
- connecting mixers an
According to documentation and experience with other similar SoCs, video
PLLs don't work stable if their output frequency is set below 192 MHz.
Because of that, set minimal rate to both R40 video PLLs to 192 MHz.
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 46 ++
HDMI pipeline on Allwinner A64 has similar behavior like A83T
where tcon1 is connected to HDMI.
Setup the pipeline according to that.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 +
1 file changed, 21 insertions(+)
On 19.05.2018 01:35, Thierry Reding wrote:
> On Sat, May 19, 2018 at 01:28:17AM +0300, Dmitry Osipenko wrote:
>> On 19.05.2018 01:24, Thierry Reding wrote:
>>> On Sat, May 19, 2018 at 01:18:05AM +0300, Dmitry Osipenko wrote:
On 19.05.2018 01:13, Thierry Reding wrote:
> On Fri, May 18, 2018
On 05/17/2018 04:26 AM, Oleksandr Andrushchenko wrote:
> From: Oleksandr Andrushchenko
>
> Signed-off-by: Oleksandr Andrushchenko
> ---
> drivers/xen/grant-table.c | 49 +++
> include/xen/grant_table.h | 7 ++
> 2 files changed, 56 insertions(+)
>
> diff
On Thu, May 10, 2018 at 7:18 PM, Souptick Joarder wrote:
> On Wed, Apr 25, 2018 at 10:29 AM, Souptick Joarder
> wrote:
>> Use new return type vm_fault_t for fault and huge_fault
>> handler. For now, this is just documenting that the
>> function returns a VM_FAULT value rather than an errno.
>> O
Video PLLs need to be referenced in R40 DT as possible HDMI PHY parent.
Export them.
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu-sun8i-r40.h | 8 ++--
include/dt-bindings/clock/sun8i-r40-ccu.h | 4
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/driv
The rockchip use fully packed pixel format variants
for YUV 10bits.
This patch only make the VOP accept this pixel format,
but it doesn't add the converting data path for
the color gamuts that the target display are supported.
Signed-off-by: Randy Li
---
drivers/gpu/drm/rockchip/rockchip_drm_vo
R40 display pipeline has a lot of possible configurations. HDMI can be
connected to 2 different TCONs (out of 4) and mixers can be connected to
any TCON. All this must be configured in TCON TOP.
Along with definition of TCON capabilities also add mux callback, which
can configure this complex pipe
Some DW HDMI PHYs like those found in A64 and R40 SoCs, can select
between two clock parents.
Add code which reads second PLL from DT.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 ++
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 22 --
2 files ch
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Heiko Stuebner
Signed-off-by: Erico Nunes
---
drivers/gpu/drm/lima/lima_drv.c | 466
drivers/gpu/drm/lima/lima_drv.h | 77 ++
2 files changed, 543 insertions(+)
create mode 100644 drive
Kernel DRM driver for ARM Mali 400/450 GPUs.
This implementation mainly take amdgpu DRM driver as reference.
- Mali 4xx GPUs have two kinds of processors GP and PP. GP is for
OpenGL vertex shader processing and PP is for fragment shader
processing. Each processor has its own MMU so prcessors
Hi,
Dne petek, 18. maj 2018 ob 17:26:51 CEST je Maxime Ripard napisal(a):
> On Fri, May 18, 2018 at 04:46:41PM +0200, Jernej Škrabec wrote:
> > > And this is a bit sloppy, since if phy_clk_num == 3, you won't try to
> > > lookup pll-2 either.
> >
> > It is highly unlikely this will be higher than
From: Andrei Paulau <7134...@gmail.com>
Meson mali GPU operate in high clock frequency, need
this value be high to work in a stable state.
Signed-off-by: Andrei Paulau <7134...@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm
On 19.05.2018 02:52, Dmitry Osipenko wrote:
> Map firewall-copied buffers into Host1x's IOVA space, otherwise Host1x
> CDMA can't access the command buffers and all submitted jobs fail if IOMMU
> and Host1x firewall are enabled in the kernels config.
>
> Signed-off-by: Dmitry Osipenko
> ---
> dr
On 17.05.2018 18:41, Thierry Reding wrote:
> From: Thierry Reding
>
> Set the interface version implemented by the VIC module. This allows
> userspace to pass the correct command stream when programming the VIC
> module.
>
> Signed-off-by: Thierry Reding
> ---
> drivers/gpu/drm/tegra/vic.c | 5
Hi Jernej,
On Sun, May 20, 2018 at 11:57 AM, Julian Calaby wrote:
> Hi Jernej,
>
> On Sun, May 20, 2018 at 4:31 AM, Jernej Skrabec
> wrote:
>> R40 display pipeline has a lot of possible configurations. HDMI can be
>> connected to 2 different TCONs (out of 4) and mixers can be connected to
>> an
Enable HDMI output on nanopi-a64 board.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
b/arch/arm64/boot/
HDMI on Allwinner A64 has similar like H3/H5/A83T.
Add compatible a64 and update A83T compatible as fallback.
Signed-off-by: Jagan Teki
---
Changes for v2:
- Add fallback compatible
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
Allwinner A64 has display engine pipeline like other Allwinner SOC's A83T/H3/H5.
A64 behaviour similar to Allwinner A83T where
Mixer0 => TCON0 => LVDS/RGB/MIPI-DSI
Mixer1 => TCON1 => HDMI
as per Display System Block DiagramAllwinner_A64_User_Manual_V1.1.pdf
This is second patch-set followed with
From: Icenowy Zheng
Allwinner SoCs with DWC HDMI controller have a "HVCC" power pin for the
HDMI part, and on some boards it's connected to a dedicated regulator
rather than the main 3.3v.
Add support for optional HVCC regulator. For boards that doesn't use a
dedicated regulator to power it, the
Hi, Jernej,
On 05/18/2018 06:15 PM, Jernej Škrabec wrote:
Hi,
Dne petek, 18. maj 2018 ob 17:09:40 CEST je Sergey Suloev napisal(a):
Hi, guys,
On 05/18/2018 05:46 PM, Jernej Škrabec wrote:
Hi,
Dne petek, 18. maj 2018 ob 12:01:16 CEST je Maxime Ripard napisal(a):
On Fri, May 18, 2018 at 03:1
Enable HDMI output on Orangepi-win board.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
b/arch/arm64/b
On 19.05.2018 01:13, Thierry Reding wrote:
> On Fri, May 18, 2018 at 11:58:19PM +0200, Thierry Reding wrote:
>> On Sat, May 19, 2018 at 12:42:22AM +0300, Dmitry Osipenko wrote:
>>> On 18.05.2018 23:33, Thierry Reding wrote:
From: Thierry Reding
Document the userspace ABI with kernel
On 17.05.2018 18:41, Thierry Reding wrote:
> From: Thierry Reding
>
> Set the interface version implemented by the gr3d module. This allows
> userspace to pass the correct command stream when programming the gr3d
> module.
>
> Signed-off-by: Thierry Reding
> ---
> drivers/gpu/drm/tegra/gr3d.c
Signed-off-by: Qiang Yu
---
Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
index c1f65d1dac1d..062d4bee216a 100
Display related peripherals need precise clocks to operate correctly.
Allow DE2, TCONs and HDMI to set parent clock.
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-s
HDMI on Allwinner A64 has similar behaviour like H3/H5/A83T, so
reuse the same dts node details for A64 with A83T compatible
as fallback.
HDMI PHY on Allwinner A64 has two clock parents so add them
as pll-0 and pll-1 in CCU clock phadles.
Signed-off-by: Jagan Teki
---
Changes for v2:
- Change co
On Tue, Apr 10, 2018 at 6:03 PM, Laura Abbott wrote:
> There's an ongoing effort to remove VLAs[1] from the kernel to eventually
> turn on -Wvla. The vla in reg_write_range is based on the length of data
> passed. The one use of a non-constant size for this range is bounded by
> the size buffer pa
This series adds support for R40 HDMI pipeline. It is a bit special
than other already supported pipelines because it has additional unit
called TCON TOP responsible for relationship configuration between
mixers, TCONs and HDMI. Additionally, it has additional gates for DSI
and TV TCONs, TV encoder
Host1x's CDMA can't access the command buffers if IOMMU and Host1x
firewall are enabled in the kernels config because firewall doesn't map
the copied buffer into IOVA space. Fix this by skipping IOMMU
initialization if firewall is enabled as firewall merges sparse cmdbufs
into a single contiguous b
Expand HDMI PHY clock driver to support second clock parent.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 6 +-
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 29 ++-
drivers/gpu/drm/sun4i/sun8i_hdmi_phy_clk.c | 90 --
3 files changed, 98
Hi, guys,
On 05/18/2018 05:46 PM, Jernej Škrabec wrote:
Hi,
Dne petek, 18. maj 2018 ob 12:01:16 CEST je Maxime Ripard napisal(a):
On Fri, May 18, 2018 at 03:15:22PM +0530, Jagan Teki wrote:
From: Jernej Skrabec
Some SoCs with DW HDMI have multiple possible clock parents, like A64
and R40.
Allwinner SoC like SUN8I and SUN50I are now using DesignWare HDMI
so enable them as default.
Signed-off-by: Jagan Teki
---
Changes for v2:
- Enable for SUN8I
drivers/gpu/drm/sun4i/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/K
From: Simon Shields
v2 (Qiang Yu):
add vender string to exynos4 mali gpu
Based off a similar commit for the Samsung Mali driver by
Tobias Jakobi
Signed-off-by: Simon Shields
Signed-off-by: Qiang Yu
---
arch/arm/boot/dts/exynos4.dtsi | 33 +
1 file changed,
On 5/18/2018 6:42 AM, Robin Murphy wrote:
>
> FWIW, now that I've actually gone and looked, it appears you could simplify
> the whole function quite a bit by getting rid of these and just using the new
> local resource directly, especially since the only actual use of size is an
> open-coded re
Add support to async updates of cursors by using the new atomic
interface for that.
Signed-off-by: Enric Balletbo i Serra
---
I am sending this as RFC because I still don't have a deep knowledge of
the hw and I am not sure if the vop_plane_update function can be reused
in both cases, atomic_updat
Hi Jernej,
On Sun, May 20, 2018 at 4:31 AM, Jernej Skrabec wrote:
> R40 display pipeline has a lot of possible configurations. HDMI can be
> connected to 2 different TCONs (out of 4) and mixers can be connected to
> any TCON. All this must be configured in TCON TOP.
>
> Along with definition of T
From: Jernej Skrabec
Some SoCs with DW HDMI have multiple possible clock parents, like A64
and R40.
Expand HDMI PHY clock driver to support second clock parent.
Signed-off-by: Jernej Skrabec
Signed-off-by: Jagan Teki
---
Changes for v2:
- new patch
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
PHY is the same as in H3, except it can switch between two clock
parents.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
in
DE2 CCU in Allwinner A64 has same like H5, so use the
similar dts details for A64 with fallback compatible.
Signed-off-by: Jagan Teki
---
Changes for v2:
- Add h5 compatible first since A64 came first.
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++
1 file changed, 15 insert
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_pmu.c | 85 +
drivers/gpu/drm/lima/lima_pmu.h | 30
2 files changed, 115 insertions(+)
create mode 100644 drivers/gpu/drm/lima/lima_pm
Allwinner SoC like SUN8I and SUN50I are now using DE2 Mixer
so enable them as default.
Signed-off-by: Jagan Teki
---
Changes for v2:
- Enable for SUN8I
drivers/gpu/drm/sun4i/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/d
Get rid of base and size variables in favor of a struct resource.
The conditional for checking window can be replaced with
resource_contains().
Signed-off-by: Sinan Kaya
---
drivers/video/fbdev/efifb.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers
A host bridge is allowed to remap BAR addresses using _TRA attribute in
_CRS windows.
pci_bus :00: root bus resource [mem 0x8010010-0x8011fff window]
(bus address [0x0010-0x1fff])
pci :02:00.0: reg 0x10: [mem 0x8011e00-0x8011eff]
When a VGA device is behind such a
From: Jernej Skrabec
When TCON set up TCON TOP, it needs to know mixer index. Here we do that
by setting engine ID to number provided in mixer index quirk.
Signed-off-by: Jernej Skrabec
Signed-off-by: Jagan Teki
---
Changes for v2:
- New patch
drivers/gpu/drm/sun4i/sun8i_mixer.c | 4 ++--
dr
Allwinner A64 has DE2 CCU is similar to H3/H5 SoC.
So add compatible for A64 which is fallback compatible
for H5, so update fallback binding.
Signed-off-by: Jagan Teki
Reviewed-by: Rob Herring
---
Changes for v2:
- Add fallback compatible
Documentation/devicetree/bindings/clock/sun8i-de2.txt
On 2018-04-26 14:49, Thierry Reding wrote:
> On Thu, Apr 26, 2018 at 11:06:58AM +0300, Jyri Sarha wrote:
>> I guess the first patch should be mergable. With the second, maybe it
>> is better to wait until we have a full solution including the bridges
>> too. What should I do to get the first patch
Hi Jernej,
On Sun, May 20, 2018 at 4:31 AM, Jernej Skrabec wrote:
> Missing compatibles and descriptions needed to implement R40 HDMI
> pipeline are added.
>
> For mixers only compatibles are added.
>
> TCON description is expanded with R40 TV TCON compatibles. If the SoC
> has TCON TOP unit, pha
Mixers in Allwinner have similar capabilities as others SoCs with DE2.
Mixer1 has 1 VI and 1 UI planes and supports HW scaling on all
planes.
Signed-off-by: Jagan Teki
---
Changes for v2:
- New patch
drivers/gpu/drm/sun4i/sun8i_mixer.c | 13 +
1 file changed, 13 insertions(+)
diff
On 17.05.2018 18:41, Thierry Reding wrote:
> From: Thierry Reding
>
> Set the interface version implemented by the gr2d module. This allows
> userspace to pass the correct command stream when programming the gr2d
> module.
>
> Signed-off-by: Thierry Reding
> ---
> drivers/gpu/drm/tegra/gr2d.c
BCAST is a hardware module to broadcast register
read/write for PPs. It can also merge IRQs from
different PPs into one IRQ.
Signed-off-by: Qiang Yu
---
drivers/gpu/drm/lima/lima_bcast.c | 65 +++
drivers/gpu/drm/lima/lima_bcast.h | 34
2 files change
Missing compatibles and descriptions needed to implement R40 HDMI
pipeline are added.
For mixers only compatibles are added.
TCON description is expanded with R40 TV TCON compatibles. If the SoC
has TCON TOP unit, phandle to that unit has to be specified. Additional
clock has to be specified if S
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