On Tue, Feb 27, 2018 at 11:11:09AM +0100, Linus Walleij wrote:
> This fixes up the .mode_valid() vtable entry documentation
> by copyediting the documentation from the .mode_valid()
> documentation in the drm_modeset_helper_vtables.h file.
>
> Fixes: 40275dc4edb4 ("drm: simple_kms_helper: Add mode
NAK, the newly added fence must always be newer than the existing one.
Christian.
Am 06.03.2018 um 04:09 schrieb Monk Liu:
Change-Id: If6a979ba9fd6c923b82212f35f07a9ff31c86767
Signed-off-by: Monk Liu
---
drivers/dma-buf/reservation.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
https://bugzilla.kernel.org/show_bug.cgi?id=198883
--- Comment #31 from Ricardo Ribalda (ricardo.riba...@gmail.com) ---
Hi Andrey
I mean a stall, sorry about that.
root@qt5122:~# ps aux | grep Xorg
root 520 0.0 0.0 15936 900 ?S07:59 0:00 xinit
/etc/X11/Xsession -- /usr/b
And still a NAK, the prerequisite for adding a shared fence is that it
is later than any existing fence in that context.
In other words reservation_object_add_shared_fence() is always called
with a new fence, never with some old one.
So the whole checking here is completely superfluous,
Chris
https://bugzilla.kernel.org/show_bug.cgi?id=198883
--- Comment #32 from Ricardo Ribalda (ricardo.riba...@gmail.com) ---
Created attachment 274579
--> https://bugzilla.kernel.org/attachment.cgi?id=274579&action=edit
sudo umr -O many,bits -r *.gfx80.mmGRBM_STATUS &> stall sudo umr -O many,bits
On Thu, 2018-02-22 at 21:22 +0200, Baruch Siach wrote:
> Use positive logic for better readability. This also eliminates one
> of_node_put() call, making the code shorter.
>
> Signed-off-by: Baruch Siach
Reviewed-by: Philipp Zabel
Tested-by: Philipp Zabel
regards
Philipp
> ---
> drivers/gpu
https://bugs.freedesktop.org/show_bug.cgi?id=105021
--- Comment #28 from arne_woer...@yahoo.com ---
linux kernel 4.15.7-1-MANJARO
with mesa 17.3.6-1
still does not like 20180119-2 polaris12 firmware...
-arne
--
You are receiving this mail because:
You are the assignee for the bug.___
https://bugzilla.kernel.org/show_bug.cgi?id=198883
--- Comment #33 from Ricardo Ribalda (ricardo.riba...@gmail.com) ---
Last dump belongs to a stall after running dmesg. (similar to yesterdays dump
1).
The next one happens after running Xorg. This time, gdb also stalls when trying
to get a dump:
https://bugzilla.kernel.org/show_bug.cgi?id=198883
--- Comment #34 from Ricardo Ribalda (ricardo.riba...@gmail.com) ---
Created attachment 274581
--> https://bugzilla.kernel.org/attachment.cgi?id=274581&action=edit
Stalled after starting X. Gdb also stalls
sudo umr -O many,bits -r *.gfx80.mmGR
Quoting Monk Liu (2018-03-06 03:53:10)
> v2:
> still check context first to avoid warning from dma_fence_is_later
> apply this fix in add_shared_replace as well
>
> Change-Id: If6a979ba9fd6c923b82212f35f07a9ff31c86767
> Signed-off-by: Monk Liu
> ---
> drivers/dma-buf/reservation.c | 6 --
>
On Thu, Feb 22, 2018 at 09:06:43PM +0100, Noralf Trønnes wrote:
> It only makes sense for userspace clients.
>
> Signed-off-by: Noralf Trønnes
I think we might be able to reuse some of the master stuff to better
handle hand-over between in-kernel clients and userspace masters for kms.
But this d
On Mon, 05 Mar 2018, Harry Wentland wrote:
> make DOCBOOKS="" htmldocs
DOCBOOKS is no more. Simply 'make htmldocs' will do the same.
BR,
Jani.
--
Jani Nikula, Intel Open Source Technology Center
___
dri-devel mailing list
dri-devel@lists.freede
From: "Kristian H. Kristensen"
To improve PSR exit latency, we speculatively start exiting when we
receive input events. Occasionally, this may lead to false positives,
but most of the time we get a head start on coming out of PSR. Depending
on how userspace takes to produce a new frame in respon
From: Sean Paul
Now that the spinlocks and timers are gone, we can remove the psr
worker located in rockchip's analogix driver and do the enable/disable
directly. This should simplify the code and remove races on disable.
Cc: 征增 王
Cc: Stéphane Marchesin
Signed-off-by: Sean Paul
Signed-off-by:
From: Douglas Anderson
The code in analogix_dp_transfer() that was supposed to print out:
AUX CH error happened
Was actually dead code. That's because the previous check (whether
the interrupt status indicated any errors) would have hit for all
errors anyway.
Let's combine the two error check
From: Tomasz Figa
Currently both rockchip_drm_psr_activate() and _deactivate() only set the
boolean "active" flag without actually making sure that hardware state
complies with it.
Since we are going to extend the usage of this API to properly lock PSR
for the duration of atomic commits, we chan
On 03/05/2018 10:52 AM, Daniel Vetter wrote:
On Tue, Feb 20, 2018 at 03:29:07PM +0200, Oleksandr Andrushchenko wrote:
On 02/20/2018 02:53 PM, Oleksandr Andrushchenko wrote:
On 02/20/2018 02:49 PM, Daniel Vetter wrote:
On Tue, Feb 20, 2018 at 02:36:05PM +0200, Oleksandr Andrushchenko wrote:
On
From: zain wang
We would meet a short black screen when exit PSR with the full link
training, In this case, we should use fast link train instead of full
link training.
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: Enric Balletbo i Serra
---
Hi!
Dne ponedeljek, 05. marec 2018 ob 16:27:00 CET je Joonas Kylmälä napisal(a):
> Jernej Skrabec:
> > +&hdmi_out {
> > + hdmi_out_con: endpoint {
> > + remote-endpoint = <&hdmi_con_in>;
> > + };
> > +};
>
> This node is added to all the DTS files you enabled HDMI on. Is it
> someth
From: Lin Huang
We need to enable video before analogix_dp_is_video_stream_on(), so
we can get the right video stream status.
Cc: 征增 王
Cc: Stéphane Marchesin
Signed-off-by: Lin Huang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by: Enric Bal
On 03/05/2018 11:25 AM, Daniel Vetter wrote:
On Wed, Feb 21, 2018 at 10:03:42AM +0200, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
Handle communication with the backend:
- send requests and wait for the responses according
to the displif protocol
- serialize access to
From: Lin Huang
AUX errors are caused by many different reasons. We may not know what
happened in aux channel on failure, so let's reset aux channel if some
errors occurred.
Cc: 征增 王
Cc: Douglas Anderson
Signed-off-by: Lin Huang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Review
From: zain wang
The STRM_VALID bit in register ANALOGIX_DP_SYS_CTL_3 may be unstable,
so we may hit the error log "Timeout of video streamclk ok" since
checked this unstable bit.
In fact, we can go continue and the streamclk is ok if we wait enough time,
it does no effect on display.
Let's change
On Fri, Feb 23, 2018 at 09:05:24AM +0100, Geert Uytterhoeven wrote:
> Hi Frank,
>
> On Fri, Feb 23, 2018 at 3:38 AM, Frank Rowand wrote:
> > I was hoping to be able to convert the .dts files to use sugar syntax
> > instead of hand coding the fragment nodes, but for this specific set
> > of files
From: Douglas Anderson
The current user of the analogix power_off is "analogix_dp-rockchip".
That driver does this:
- deactivate PSR
- turn off a clock
Both of these things (especially deactive PSR) should be done before
we turn the PHY power off and turn off analog power. Let's move the
callba
From: zain wang
There is no register named ANALOGIX_DP_PLL_CTL in Rockchip edp phy reg
list. We should use BIT_4 in ANALOGIX_DP_PD to control the pll power
instead of ANALOGIX_DP_PLL_CTL.
Cc: Douglas Anderson
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
R
On Mon, Mar 05, 2018 at 03:45:55PM +0800, Jeffy Chen wrote:
> The platform_device_register_full() will allocate dma_mask for
> hdmi->audio, so we should free before platform_device_unregister().
>
> Reported by kmemleak:
> unreferenced object 0xffc0ef70ff00 (size 128):
> comm "kworker/4:1",
Hi,
This patchset includes cleanups, improvements, and bug fixes for
Rockchip DRM driver and PSR support.
This new version is the same as before but rebased on top of
drm-misc-next plus the Marek patches that fixes Chromebook2 Peach-Pit [1]
and the latest series of Rockchip rk3399 eDP support [2]
Hi,
This patchset includes cleanups, improvements, and bug fixes for
Rockchip DRM driver and PSR support.
This new version is the same as before but rebased on top of
drm-misc-next plus the Marek patches that fixes Chromebook2 Peach-Pit [1]
and the latest series of Rockchip rk3399 eDP support [2]
From: zain wang
Panel would reset its setting when it powers down. It would forget the last
succeeded link training setting. So we can't use the last successful link
training setting to do fast link training. Let's reset fast_train_enable in
analogix_dp_bridge_disable();
Cc: Stéphane Marchesin
From: Lin Huang
There was a 1ms delay to detect the hpd signal, which is too short to
detect a short pulse. This patch extends this delay to 100ms.
Cc: Stéphane Marchesin
Cc: 征增 王
Signed-off-by: Lin Huang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Si
Jernej Skrabec:
> +&hdmi_out {
> + hdmi_out_con: endpoint {
> + remote-endpoint = <&hdmi_con_in>;
> + };
> +};
This node is added to all the DTS files you enabled HDMI on. Is it
something that could be instead put to the DTSI file?
Joonas
__
From: Sean Paul
Instead of using timer and spinlocks, use delayed_work and
mutexes for rockchip psr. This allows us to make blocking
calls when enabling/disabling psr (which is sort of important
given we're talking over dpcd to the display).
Cc: Caesar Wang
Cc: 征增 王
Cc: Stéphane Marchesin
Sig
From: Yakir Yang
Make sure the request PSR state takes effect in analogix_dp_send_psr_spd()
function, or print the sink PSR error state if we failed to apply the
requested PSR setting.
Cc: 征增 王
Cc: Stéphane Marchesin
Signed-off-by: Yakir Yang
[seanpaul changed timeout loop to a readx poll]
Si
From: Lin Huang
When panel is shut down, we should make sure edp can be disabled to avoid
undefined behavior.
Cc: Stéphane Marchesin
Signed-off-by: Lin Huang
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by: Enric Bal
From: zain wang
When we enable bridge failed, we have to retry it, otherwise we would get
the abnormal display.
Cc: Stéphane Marchesin
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by: Enric Balletbo i Serra
---
dri
From: zain wang
There's a race between when bridge_disable and when vop_crtc_disable
are called. If the flush timer triggers a new psr work between these,
we will operate eDP without power shutdowned by bridge_disable. In this
case, moving activate/deactivate to enable/disable bridge to avoid it.
From: zain wang
It's too early to detect fast link training, if other step after it
failed, we will set fast_link flag to 1, and retry set_bridge again. In
this case we will power down and power up panel power supply, and we
will do fast link training since we have set fast_link flag to 1. In
fac
From: zain wang
Enhanced mode is required by the eDP 1.2 specification, and not doing it
early could result in a period of time where we have a link transmitting
idle packets without it. Since there is no reason to disable it, we just
enable it at the beginning of link training and then keep it o
From: zain wang
We currently wait for the panel to mirror our intended PSR state
before continuing on both PSR enter and PSR exit. This is really
only important to do when we're entering PSR, since we want to
be sure the last frame we pushed is being served from the panel's
internal fb before shu
On Mon, Mar 05, 2018 at 09:18:10AM +0100, Andrzej Hajda wrote:
> On 02.03.2018 14:13, Heikki Krogerus wrote:
> > Hi,
> >
> > On Tue, Feb 27, 2018 at 08:11:29AM +0100, Andrzej Hajda wrote:
> >> +2. USB-C connector attached to CC controller (s2mm005), HS lines routed
> >> +to companion PMIC (max77865
From: zain wang
According to DP spec v1.3 chap 3.5.1.2 Link Training, Link Policy Maker
must first detect that the HPD signal is asserted high by the Downstream
Device before establishing a link with it.
Cc: Stéphane Marchesin
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: T
From: zain wang
There is a race between AUX CH bring-up and enabling bridge which will
cause link training to fail. To avoid hitting it, don't change psr state
while enabling the bridge.
Cc: Tomeu Vizoso
Cc: Sean Paul
Signed-off-by: zain wang
Signed-off-by: Caesar Wang
[seanpaul fixed up the
From: zain wang
If we failed disable psr, it would hang the display until next psr
cycle coming. So we should restore psr->state when it failed.
Cc: Tomasz Figa
Signed-off-by: zain wang
Signed-off-by: Douglas Anderson
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: En
On 05-03-18, 08:28, Jordan Crouse wrote:
> I'm glad you brought this up - I was trying to find a place in the
> documentation
> to put it, but since target specific nodes would be a new trick for OPP I
> didn't
> quite know how to go about doing it. Do we just list them as Optional: or
> should w
Jernej Škrabec:
> I guess that would mean also including connector node (hdmi_con_in) in DTSI,
> since it is referenced inside. However, not all boards have HDMI connector,
> so
> I didn't include it in DTSI.
You're absolutely right on this. I wish there was someway to get rid of
this duplicati
From: zain wang
Add a lock to vop to avoid disabling the crtc while waiting for a line
flag while enabling psr. If we disable in the middle of waiting for the
line flag, we'll end up timing out or worse.
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-o
From: Tomasz Figa
It is not used anymore after last changes and it was not even correct to
begin with as it assumed a 1:1 relation between a CRTC and encoder,
while in fact a CRTC can be attached to multiple encoders.
Signed-off-by: Tomasz Figa
Signed-off-by: Thierry Escande
Signed-off-by: Enr
From: zain wang
Following the correct power up sequence:
dp_pd=ff => dp_pd=7f => wait 10us => dp_pd=00
Cc: Stéphane Marchesin
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: Enric Balletbo i Serra
---
drivers/gpu/drm/bridge/analogix/analogix
From: Lin Huang
We need to check the dpcd write/read return value to see whether the
write/read was successful
Cc: Kristian H. Kristensen
Signed-off-by: Lin Huang
Signed-off-by: zain wang
Signed-off-by: Douglas Anderson
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: A
From: Tomasz Figa
It looks like the driver subsystem detaches devices from power domains
at shutdown without consent of the drivers. This means that we might have
our power domain turned off behind our back and the only way to avoid
problems is to stop doing any hardware programming at some point
From: Tomasz Figa
The first time after we call rockchip_drm_do_flush() after
rockchip_drm_psr_register(), we go from PSR_DISABLE to PSR_FLUSH. The
difference between PSR_DISABLE and PSR_FLUSH is whether or not we have a
delayed work pending - PSR is off in either state. However
psr_set_state() o
From: zain wang
Register ANALOGIX_DP_FUNC_EN_1(offset 0x18), Rockchip is different to
Exynos:
on Exynos edp phy,
BIT 7 MASTER_VID_FUNC_EN_N
BIT 6 reserved
BIT 5 SLAVE_VID_FUNC_EN_N
on Rockchip edp phy,
BIT 7 reserved
BIT 6 RK_VID_CAP_FUNC_EN_N
B
From: Tomasz Figa
If we change the state first and reschedule later, we might have the
work executed according to previous scheduled time and end up with PSR
re-enabled instantly. Let's cancel the work before changing the state.
While at it, consolidate psr_disable_handler() to just call
rockchi
From: Mark Yao
Some encoder have a crc verification check, crc check fail if
input and output data is not equal.
That means encoder input and output need use same color depth,
vop can output 10bit data to encoder, but some panel only support
8bit depth, that would make crc check die.
So pre dit
From: zain wang
There are some different bits between Rockchip and Exynos in register
"AUX_PD". This patch fixes the incorrect operations about it.
Cc: Douglas Anderson
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by:
From: Lin Huang
We should check AUX_EN bit to confirm the AUX CH operation is completed.
Cc: Stéphane Marchesin
Signed-off-by: Lin Huang
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: Enric Balletbo i Serra
---
drivers/gpu/drm/bridge/analo
From: Tomasz Figa
Currently PSR flush is triggered from CRTC's .atomic_begin() callback,
which is executed after modeset disables and enables and before plane
updates are committed. Since PSR flush and re-enable can be triggered
asynchronously by external sources (input event, delayed work), it c
From: Douglas Anderson
Some of the platform-specific stuff in rockchip_dp_poweron() needs to
happen before the generic code. Some needs to happen after. Let's
split the callback in two.
Specifically we can't start doing PSR work until _after_ the whole
controller is up, so don't set the enable
On Thu, Feb 22, 2018 at 09:06:45PM +0100, Noralf Trønnes wrote:
> This is part 2 of making ioctls useable for in-kernel clients.
> Make an ioctl wrapper function that calls a function that can be used by
> in-kernel clients.
>
> It adjusts the signature of the following functions:
> - drm_mode_get
From: Douglas Anderson
The comments in analogix_dp_init_aux() claim that we're disabling aux
channel retries, but then right below it for Rockchip it sets them to
3. If we actually need 3 retries for Rockchip then we could adjust
the comment, but it seems more likely that we want the same retry
From: Tomasz Figa
Driver callbacks, such as system suspend or resume can be called any
time, specifically they can be called before the component bind
callback. Let's use dp->adp pointer as a safeguard and skip calling
Analogix entry points if it is an ERR_PTR().
Signed-off-by: Tomasz Figa
Sign
On Thu, Feb 22, 2018 at 09:06:48PM +0100, Noralf Trønnes wrote:
> Add a way to check if userspace modes are equal. Useful for in-kernel
> clients. Also export drm_mode_convert_umode().
>
> Signed-off-by: Noralf Trønnes
Assuming we don't use the KMS ioctls for in-kernel clients I guess we
don't n
On Thu, Feb 22, 2018 at 09:06:49PM +0100, Noralf Trønnes wrote:
> Add a function so the generic fbdev client can check if the framebuffer
> does flushing. This is needed to set up deferred I/O.
>
> Signed-off-by: Noralf Trønnes
Again I guess not needed if we use drm_framebuffer * internally for
https://bugzilla.kernel.org/show_bug.cgi?id=198985
Christian König (christian.koe...@amd.com) changed:
What|Removed |Added
CC||christian.koe
why? is there a design doc mentioned for this on reservation ?
From: Christian K?nig
Sent: Tuesday, March 6, 2018 4:03:39 PM
To: Liu, Monk; dri-devel@lists.freedesktop.org
Subject: Re: [PATCH] dma-buf/reservation: should keep the new fence in
add_shared_inplace
On Tuesday 06 March 2018 01:46 PM, Philipp Zabel wrote:
On Thu, 2018-02-22 at 21:22 +0200, Baruch Siach wrote:
Use positive logic for better readability. This also eliminates one
of_node_put() call, making the code shorter.
Signed-off-by: Baruch Siach
Reviewed-by: Philipp Zabel
Tested-by:
On Thu, Feb 22, 2018 at 09:06:50PM +0100, Noralf Trønnes wrote:
> This adds an API for writing in-kernel clients.
>
> TODO:
> - Flesh out and complete documentation.
> - Cloned displays is not tested.
> - Complete tiled display support and test it.
> - Test plug/unplug different monitors.
> - A ru
https://bugs.freedesktop.org/show_bug.cgi?id=105353
Michel Dänzer changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |dri-devel@lists.freedesktop
https://bugs.freedesktop.org/show_bug.cgi?id=105352
--- Comment #1 from Michel Dänzer ---
Does it run if you set the environment variable allow_rgb10_configs=false for
it? If so, it's probably a kwin bug, not handling 10 bit per component colour
format configs correctly.
--
You are receiving th
On Thu, Feb 22, 2018 at 09:06:51PM +0100, Noralf Trønnes wrote:
> This adds generic fbdev emulation for drivers that support the
> dumb buffer API. No fbdev code is necessary in the driver.
>
> Differences from drm_fb_helper:
> - The backing buffer is created when the first fd is opened.
> - Suppo
Hi Michel & Thomas,
any more comments on this? Or can I commit it?
Thanks,
Christian.
Am 27.02.2018 um 12:49 schrieb Christian König:
Let's stop mangling everything in a single header and create one header
per object instead.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_tt.c
On Thu, Feb 22, 2018 at 09:06:52PM +0100, Noralf Trønnes wrote:
> Just a hack to test the client API.
>
> Signed-off-by: Noralf Trønnes
Adding the suse folks who submitted the bootsplash a while ago, would be
great if they could pick this up and run with it.
> ---
> drivers/gpu/drm/client/Kcon
On Wed, Feb 28, 2018 at 11:25:59AM +0100, Christian König wrote:
> Am 28.02.2018 um 10:48 schrieb Lucas Stach:
> > Hi Christian,
> >
> > Am Dienstag, den 27.02.2018, 12:49 +0100 schrieb Christian König:
> > > Unpin the GEM object only after freeing the sg table.
> > What is the race that is being
On Tue, Feb 27, 2018 at 01:07:06PM +0100, Christian König wrote:
> Hi guys,
>
> at least on amdgpu and radeon the page array allocated by ttm_dma_tt_init is
> completely unused in the case of DMA-buf sharing. So I'm trying to get rid
> of that by only allocating the DMA address array.
>
> Now the
On Tue, Feb 27, 2018 at 12:49:57PM +0100, Christian König wrote:
> Most of the time we only need the dma addresses.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/drm_prime.c | 20 ++--
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/
https://bugs.freedesktop.org/show_bug.cgi?id=105359
Marta Löfstedt changed:
What|Removed |Added
QA Contact|intel-gfx-bugs@lists.freede |
|sktop.org
Am 06.03.2018 um 10:21 schrieb Daniel Vetter:
On Tue, Feb 27, 2018 at 12:49:57PM +0100, Christian König wrote:
Most of the time we only need the dma addresses.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_prime.c | 20 ++--
1 file changed, 10 insertions(+), 10 dele
On Mon, Mar 05, 2018 at 11:30:35AM +0200, Oleksandr Andrushchenko wrote:
> On 03/05/2018 11:25 AM, Daniel Vetter wrote:
> > On Wed, Feb 21, 2018 at 10:03:42AM +0200, Oleksandr Andrushchenko wrote:
> > > From: Oleksandr Andrushchenko
> > >
> > > Handle communication with the backend:
> > > - sen
https://bugs.freedesktop.org/show_bug.cgi?id=104064
--- Comment #25 from taij...@posteo.de ---
Created attachment 137816
--> https://bugs.freedesktop.org/attachment.cgi?id=137816&action=edit
dmesg with 4.17-wip-7f462340284582c0180384c046ddd6dda03888b1 and dc=1
I have rebuilt with the latest com
Am 06.03.2018 um 10:15 schrieb Daniel Vetter:
On Wed, Feb 28, 2018 at 11:25:59AM +0100, Christian König wrote:
Am 28.02.2018 um 10:48 schrieb Lucas Stach:
Hi Christian,
Am Dienstag, den 27.02.2018, 12:49 +0100 schrieb Christian König:
Unpin the GEM object only after freeing the sg table.
Wha
On Tue, Feb 27, 2018 at 02:57:00PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> edid and display_info are protected by mode_config.mutex. Add lockdep
> asserts to make sure we're not accessing things w/o the lock.
>
> FIXME: pretty sure this will blow up with amdgpu as they seem
> to be
On Tue, Feb 27, 2018 at 02:56:54PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Now that we have split the display info into static and dynamic parts,
> we can just zero out the entire dynamic part with memset(). Previously
> we were just clearing parts of it, leaving stale data in other
https://bugs.freedesktop.org/show_bug.cgi?id=104064
taij...@posteo.de changed:
What|Removed |Added
Attachment #137816|0 |1
is obsolete|
On Tue, Mar 06, 2018 at 10:25:03AM +0100, Christian König wrote:
> Am 06.03.2018 um 10:21 schrieb Daniel Vetter:
> > On Tue, Feb 27, 2018 at 12:49:57PM +0100, Christian König wrote:
> > > Most of the time we only need the dma addresses.
> > >
> > > Signed-off-by: Christian König
> > > ---
> > >
On Tue, Mar 06, 2018 at 10:30:56AM +0100, Christian König wrote:
> Am 06.03.2018 um 10:15 schrieb Daniel Vetter:
> > On Wed, Feb 28, 2018 at 11:25:59AM +0100, Christian König wrote:
> > > Am 28.02.2018 um 10:48 schrieb Lucas Stach:
> > > > Hi Christian,
> > > >
> > > > Am Dienstag, den 27.02.2018,
On Tue, Feb 27, 2018 at 02:56:53PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Currently we have a mix of static and dynamic information stored in
> the display info structure. That makes it rather difficult to repopulate
> the dynamic parts when a new EDID appears. Let's make life easi
On Tue, Mar 06, 2018 at 10:33:31AM +0100, Daniel Vetter wrote:
> On Tue, Feb 27, 2018 at 02:56:54PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Now that we have split the display info into static and dynamic parts,
> > we can just zero out the entire dynamic part with memset(). Pr
Hi Christian & Chris
two question regarding resv:
1) considering below sequence:
call reservation_object_add_shared_fence,
now assume old->shared_count is now 3
call reservation_object_add_shared_fence,
now assume old->shared_count is now 4,
call reservation_object_reserve_shared,
now obj->stag
On 03/06/2018 11:26 AM, Daniel Vetter wrote:
On Mon, Mar 05, 2018 at 11:30:35AM +0200, Oleksandr Andrushchenko wrote:
On 03/05/2018 11:25 AM, Daniel Vetter wrote:
On Wed, Feb 21, 2018 at 10:03:42AM +0200, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
Handle communication with
On Tue, Feb 27, 2018 at 02:56:55PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> drm_mode_connector_update_edid_property() will call
> drm_add_display_info() if an invalid edid is passed in.
> This differs from the behaviour of drm_add_edid_modes() which
> doesn't try to populate the disp
On Tue, Feb 27, 2018 at 02:56:56PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> If we have to backoff there's no point in going over the mode list again
> to mark all the modes as stale. We can defer that until we're ready to
> refresh the mode list. Avoids multiple list walks if we have
On Tue, Mar 06, 2018 at 10:33:31AM +0100, Daniel Vetter wrote:
> On Tue, Feb 27, 2018 at 02:56:54PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Now that we have split the display info into static and dynamic parts,
> > we can just zero out the entire dynamic part with memset(). Pr
Hi Architt,
On 23/02/2018 12:44, Neil Armstrong wrote:
> The Amlogic Meson GX SoCs, embedded the v2.01a controller, has been also
> identified needing this workaround.
> This patch adds the corresponding version to enable a single iteration for
> this specific version.
>
> Fixes: be41fc55f1aa ("d
On Tue, Feb 27, 2018 at 02:56:58PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The edid is protected by mode_config.mutex so extend the locking to
> protect the property readout part as well.
>
> Cc: Keith Packard
> Cc: Daniel Vetter
> Signed-off-by: Ville Syrjälä
Ehrm no, properti
On 2018-03-06 10:13 AM, Christian König wrote:
> Hi Michel & Thomas,
>
> any more comments on this? Or can I commit it?
Acked-by: Michel Dänzer
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
sorry, I have some mistake in previous thread, correct it as followings.
1) considering below sequence:
call reservation_object_add_shared_fence,
now assume old->shared_count is now 3
call reservation_object_add_shared_fence,
now assume old->shared_count is now 4,
call reservation_object_reserv
On Tue, Feb 27, 2018 at 02:56:59PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The edid is protected by mode_config.mutex. Grab the lock when frobbing
> the debugfs edid_override thing.
>
> Cc: Keith Packard
> Cc: Daniel Vetter
> Signed-off-by: Ville Syrjälä
Yup, this looks correct
On Tue, Feb 27, 2018 at 02:56:57PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Wrap the ->fill_modes() call in a small helper that first clears out the
> stale data from connector->display_info. This should guarantee that we
> get consistent display_info whether or not the drivers use t
Acked-by: Thomas Hellstrom
On 03/06/2018 10:13 AM, Christian König wrote:
Hi Michel & Thomas,
any more comments on this? Or can I commit it?
Thanks,
Christian.
Am 27.02.2018 um 12:49 schrieb Christian König:
Let's stop mangling everything in a single header and create one header
per object
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