On Thu, Dec 21, 2017 at 12:22 AM, Kristian Kristensen
wrote:
> On Wed, Dec 20, 2017 at 12:41 PM, Miguel Angel Vico
> wrote:
>>
>> Inline.
>>
>> On Wed, 20 Dec 2017 11:54:10 -0800
>> Kristian Høgsberg wrote:
>>
>> > On Wed, Dec 20, 2017 at 11:51 AM, Daniel Vetter wrote:
>> > > Since this also in
With a suitable commit log, LGTM.
Reviewed-by: Thomas Hellstrom
On 12/20/2017 11:34 AM, Roger He wrote:
Change-Id: I5279b5cd3560c4082b00f822219575a5f9c3808a
Signed-off-by: Roger He
---
drivers/gpu/drm/ttm/ttm_bo.c| 2 +-
drivers/gpu/drm/ttm/ttm_memory.c
On 12/21/2017 07:05 AM, He, Roger wrote:
-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
Sent: Wednesday, December 20, 2017 9:36 PM
To: He, Roger ; amd-...@lists.freedesktop.org;
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 3/7] drm/ttm: use an
Am 21.12.2017 um 08:58 schrieb Thomas Hellstrom:
What about
"Enable recursive locking at swapout time to make it possible to swap
out BOs that share the same reservation object."
Is "per VM BOs" an AMD specific name?
Yes, absolutely. It's even amdgpu specific, radeon uses the same
function
On Wed, Dec 20, 2017 at 10:54:24PM -0800, Keith Packard wrote:
> Patch bd36d3bab2e3d08f80766c86487090dbceed4651 fixed a deadlock in the
> failure path of drm_lease_create. This made the partially initialized
> lease object visible for a short window of time.
>
> To avoid having the lessee state ap
for the NVMe bits,
Acked-by: Sagi Grimberg
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Hi Philipp
I have an i.MX6Q running 4.9 LTS with etnaviv.
We would like to have both the HDMI and LVDS outputs enabled a once.
If I enable hdmi and lvds in the devicetree, we have only output on the
hdmi port.
Probably both LVDS and HDMI are clocked from the video PLL (PLL5). It is
rather unlik
On 20.12.2017 21:01, Thierry Reding wrote:
> On Wed, Dec 20, 2017 at 06:46:11PM +0300, Dmitry Osipenko wrote:
>> Commit 7772fdaef939 ("drm/tegra: Support ARGB and ABGR formats") broke
>> DRM's MODE_ADDFB IOCTL on Tegra20/30, because IOCTL uses XRGB format if
>> requested FB depth is 24bpp. As a res
Older Tegra's do not support RGBA format for the cursor, but instead
overlay plane could be used for it. Since there is no much use for the
overlays on a regular desktop and HW-accelerated cursor is much nicer
than the jerky SW cursor, let's trade one overlay plane for the cursor.
Signed-off-by: D
On Tue, Dec 19, 2017 at 10:15:07AM -0800, Joe Perches wrote:
> Convert DEVICE_ATTR uses to DEVICE_ATTR_RW where possible.
>
...
> diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c
> index 7a54e3083203..79d4dc785e5c 100644
> --- a/sound/soc/omap/mcbsp.c
> +++ b/sound/soc/omap/mcbsp.c
On 20.12.2017 23:16, Thierry Reding wrote:
> On Wed, Dec 20, 2017 at 11:01:49PM +0300, Dmitry Osipenko wrote:
>> On 20.12.2017 21:01, Thierry Reding wrote:
>>> On Wed, Dec 20, 2017 at 06:46:11PM +0300, Dmitry Osipenko wrote:
Commit 7772fdaef939 ("drm/tegra: Support ARGB and ABGR formats") brok
HW reset isn't actually broken on Tegra20, but there is a dependency on
first display controller to be taken out of reset for the second to be
enabled successfully.
Signed-off-by: Dmitry Osipenko
---
Change log:
v2: Got rid of global variable and now use driver_find_device() instead.
driv
"Rafael J. Wysocki" writes:
> On Tuesday, December 19, 2017 7:15:08 PM CET Joe Perches wrote:
>> Convert DEVICE_ATTR uses to DEVICE_ATTR_RO where possible.
>>
>> Done with perl script:
>>
>> $ git grep -w --name-only DEVICE_ATTR | \
>> xargs perl -i -e 'local $/; while (<>) {
>> s/\bDEVICE_A
On 20.12.2017 23:19, Thierry Reding wrote:
> On Wed, Dec 20, 2017 at 06:46:12PM +0300, Dmitry Osipenko wrote:
>> Older Tegra's do not support RGBA format for the cursor, but instead
>> overlay plane could be used for it. Since there is no much use for the
>> overlays on a regular desktop and HW-acc
From: Jan Tuerk
All recent emtrion modules based on i.mx6 make use of the DA0963.
Therefore enable it with the following defaults:
- CONFIG_MFD_DA9063=y
- CONFIG_REGULATOR_DA9063=y
- CONFIG_DA9063_WATCHDOG=m
- CONFIG_RTC_DRV_DA9063=m
MFD and REGULATOR are built-in
On 21.12.2017 01:02, Thierry Reding wrote:
> On Thu, Dec 21, 2017 at 12:05:40AM +0300, Dmitry Osipenko wrote:
>> On 20.12.2017 23:16, Thierry Reding wrote:
>>> On Wed, Dec 20, 2017 at 11:01:49PM +0300, Dmitry Osipenko wrote:
On 20.12.2017 21:01, Thierry Reding wrote:
> On Wed, Dec 20, 2017
From: Sean Paul
Now that the spinlocks and timers are gone, we can remove the psr
worker located in rockchip's analogix driver and do the enable/disable
directly. This should simplify the code and remove races on disable.
Signed-off-by: Sean Paul
Signed-off-by: Enric Balletbo i Serra
---
driv
On Wed, Dec 20, 2017 at 11:22:36AM +, Daniel Stone wrote:
> > Also plymouth grabs the escape character of HPE iLOs, which is a serious
> > no-go.
>
> I'm not entirely sure what this means, but maybe it's best addressed
> as a bug report to the Plymouth developers? One of them is in this
> thre
On Tue, Dec 19, 2017 at 05:16:30PM +0100, Daniel Vetter wrote:
> Ok I've realized that my assumptions about why you need this aren't
> holding up.
>
> So from reading these patches it sounded like you want an in-kernel boot
> splash because that would be on the display faster than a userspace one
From: Jan Tuerk
Adding the label cpu0 allows the adjustment of cpu-parameters
by reference in overlaying dtsi files in the same way as it
is possible for imx6q devices.
Signed-off-by: Jan Tuerk
Reviewed-by: Andreas Färber
---
arch/arm/boot/dts/imx6dl.dtsi | 2 +-
1 file changed, 1 insertion(+
On 21.12.2017 01:23, Dmitry Osipenko wrote:
> On 21.12.2017 01:02, Thierry Reding wrote:
>> On Thu, Dec 21, 2017 at 12:05:40AM +0300, Dmitry Osipenko wrote:
>>> On 20.12.2017 23:16, Thierry Reding wrote:
On Wed, Dec 20, 2017 at 11:01:49PM +0300, Dmitry Osipenko wrote:
> On 20.12.2017 21:01
On 12/20/2017 01:27 AM, Dongwon Kim wrote:
This patch series contains the implementation of a new device driver,
hyper_dmabuf, which provides a method for DMA-BUF sharing across
different OSes running on the same virtual OS platform powered by
a hypervisor.
This is very interesting at least in
Inline.
On Wed, 20 Dec 2017 11:54:10 -0800
Kristian Høgsberg wrote:
> On Wed, Dec 20, 2017 at 11:51 AM, Daniel Vetter wrote:
> > Since this also involves the kernel let's add dri-devel ...
Yeah, I forgot. Thanks Daniel!
> >
> > On Wed, Dec 20, 2017 at 5:51 PM, Miguel Angel Vico
> > wrote:
On Wed, Dec 20, 2017 at 10:32:11AM +0100, Greg Kroah-Hartman wrote:
> On Wed, Dec 20, 2017 at 01:24:44AM -0800, Joe Perches wrote:
> > On Wed, 2017-12-20 at 10:34 +0200, Jarkko Nikula wrote:
> > > On Tue, Dec 19, 2017 at 10:15:07AM -0800, Joe Perches wrote:
> > > > Convert DEVICE_ATTR uses to DEVIC
On Wed, Dec 20, 2017 at 12:41 PM, Miguel Angel Vico
wrote:
> Inline.
>
> On Wed, 20 Dec 2017 11:54:10 -0800
> Kristian Høgsberg wrote:
>
> > On Wed, Dec 20, 2017 at 11:51 AM, Daniel Vetter wrote:
> > > Since this also involves the kernel let's add dri-devel ...
>
> Yeah, I forgot. Thanks Daniel
Hi,
Joe Perches writes:
> drivers/usb/phy/phy-tahvo.c| 2 +-
Acked-by: Felipe Balbi
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From: Jan Tuerk
The following patch-series adds support for emtrion's emCON-MX6 modules
with all their dependencies.
The focus is based on the emtrion standard developer-kit configuration.
It includes a new vendor-prefix, an new simple-panel type,
a small modification of the imx6dl.dtsi,
as
I've aggregated all Tegra DRM patches that I've sent before into a single
series.
What's changed:
- Alpha formats been dropped in addition to restore of opaque formats
on T20/30.
- Reworked the HW cursor patch a tad, since alpha formats have been
dropped from
From: Jan Tuerk
emtrion is a system integrator and manufacturer of embedded systems.
Website: https://www.emtrion.de
Signed-off-by: Jan Tuerk
Reviewed-by: Andreas Färber
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
di
From: Sean Paul
Instead of using timer and spinlocks, use delayed_work and
mutexes for rockchip psr. This allows us to make blocking
calls when enabling/disabling psr (which is sort of important
given we're talking over dpcd to the display).
Signed-off-by: Sean Paul
Signed-off-by: Enric Balletb
On 12/19/2017 07:15 PM, Joe Perches wrote:
> Convert DEVICE_ATTR uses to DEVICE_ATTR_RO where possible.
>
> Done with perl script:
>
> $ git grep -w --name-only DEVICE_ATTR | \
> xargs perl -i -e 'local $/; while (<>) {
> s/\bDEVICE_ATTR\s*\(\s*(\w+)\s*,\s*\(?(?:\s*S_IRUGO\s*|\s*0444\s*)\)?\s*,
Does anyone know how to use Conexant CX20921 to develop our own application. I
cannot find anywhere to download the software and manuals.
Thanks to all
J.D
-Original Message-
From: alsa-devel-boun...@alsa-project.org
[mailto:alsa-devel-boun...@alsa-project.org] On Behalf Of Andy Shevch
Dear all,
After enable the debug option to check sleep inside atomic section I got
lots of messages from the drm/rockchip driver using current 4.15-rc4
BUG: sleeping function called from invalid context at
kernel/locking/mutex.c:238
in_atomic(): 1, irqs_disabled(): 128, pid: 3457, name: Xorg
From: Jan Tuerk
This patch adds support for the emtrion GmbH emCON-MX6 modules.
They are available with imx.6 Solo, Dual-Lite, Dual and Quad
equipped with Memory from 512MB to 2GB (configured by U-Boot).
Our default developer-Kit ships with the Avari baseboard and the
EDT ETM0700G0BDH6 Display (
At least on the Chuwi Vi8 (non pro/plus) the LCD panel will show an image
shifted aprox. 20% to the left (with wraparound) and sometimes also wrong
colors, showing that the panel controller is starting with sampling the
datastream somewhere mid-line. This happens after the first blanking and
re-ini
host1x_syncpt_wait() takes timeout value in jiffies, but DRM passes it in
milliseconds.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/drm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index bb98336fa8d
From: Jan Tuerk
The Emerging Display Technology ETM0700G0BDH6 is exactly
the same display as the ETM0700G0DH6, exept the pixelclock
polarity. Therefore re-use the ETM0700G0DH6 modes. It is
used by default on emtrion Avari based development kits.
Signed-off-by: Jan Tuerk
---
.../bindings/displa
iommu_map_sg() doesn't return a error value, but a size of the requested
IOMMU mapping or zero in case of error.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/gem.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/tegra/gem.c b/driver
Commit 7772fdaef939 ("drm/tegra: Support ARGB and ABGR formats") broke
DRM's MODE_ADDFB IOCTL on Tegra20/30, because IOCTL uses XRGB format if
requested FB depth is 24bpp. As a result, Xorg doesn't work anymore with
both modesetting and opentegra drivers. On older Tegra's each plane has
a blending
Hi Thomas:
Also I wonder what testing is being performed on these changes prior to
submission?
Vulkan CTS test with Per VM BO enabled.
After that, Command submit will not need to provide BO list it will use. It is
helpful for performance to CPU bound games.
The reason why we enable ev
https://bugs.freedesktop.org/show_bug.cgi?id=104347
--- Comment #6 from Michel Dänzer ---
Arthur, can you try if it also happens with Mesa 17.2 (or maybe even older
versions)?
--
You are receiving this mail because:
You are the assignee for the bug.__
forward the operation context to ttm_tt_populate as well,
and the ultimate goal is swapout enablement for per vm BOs.
Change-Id: If8dfa0f500429d1420e0da67eb6901f0bfbca57b
Reviewed-by: Christian König
Signed-off-by: Roger He
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 ---
drivers/g
forward the operation context to ttm_tt_bind as well,
and the ultimate goal is swapout enablement for per vm BOs.
Change-Id: I42a7df8c50e1ce3b527ee9cb78809f8e58136f07
Signed-off-by: Roger He
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
drivers/gpu/drm/nouveau/nouveau_bo.c| 2 +-
drive
extract a function as ttm_bo_evict_swapout_allowable since eviction and
swapout can share same logic
Change-Id: I80a475a93fceed8d66d74a1832c815a0756341ac
Signed-off-by: Roger He
---
drivers/gpu/drm/ttm/ttm_bo.c | 29 +++--
1 file changed, 19 insertions(+), 10 deletions(-)
Hi Joe,
On Tue, Dec 19, 2017 at 10:15:08AM -0800, Joe Perches wrote:
> diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c
> b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c
> index a1c81c12718c..4338b8a1309f 100644
> --- a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c
if the bo shares same reservation object then not lock it again
at swapout time to make it possible to swap out.
Change-Id: I1e87954564f38ad298bf6e4ff88c9f26f291a62d
Signed-off-by: Roger He
---
drivers/gpu/drm/ttm/ttm_bo.c | 15 +++
drivers/gpu/drm/ttm/ttm_memory.c | 12 -
On Wed, Dec 13, 2017 at 08:47:42PM +0100, Max Staudt wrote:
> Dear fbdev and fbcon developers,
>
> Thank you very much for your input for the first patch series.
>
> I've included your feedback into this second roll, and kindly ask for
> your opinion on the new patch series.
>
>
> Changes from
On Thu, Dec 21, 2017 at 11:44:23AM +0530, Archit Taneja wrote:
> Global shared resources (hwpipes, hwmixers and SMP) for MDP5 are
> implemented as a part of atomic state by subclassing drm_atomic_state.
>
> The preferred approach is to use the drm_private_obj infrastructure
> available in the atom
forward the operation context to ttm_mem_global_alloc_page as well,
and the ultimate goal is swapout enablement for per vm BOs.
Per vm BOs refer to all BOs which share same reservation object.
Change-Id: I4104a12e09a374b6477a0dd5a8fce26dce27a746
Signed-off-by: Roger He
---
drivers/gpu/drm/ttm/t
Op 20-12-17 om 11:28 schreef Daniel Vetter:
> On Wed, Dec 20, 2017 at 10:35:45AM +0100, Maarten Lankhorst wrote:
>> From: Ville Syrjälä
>>
>> We don't need any active planes during load detection, so just disable
>> them all. This saves us from having to come up with a suitable
>> framebuffer. And
Am 21.12.2017 um 10:42 schrieb Roger He:
forward the operation context to ttm_mem_global_alloc_page as well,
and the ultimate goal is swapout enablement for per vm BOs.
As Thomas commented as well, better write "reserved BOs" in the commit
message.
The term "per vm BOs" is something complete
On Wed, Dec 20, 2017 at 08:54:33PM +0100, Christian König wrote:
> Am 20.12.2017 um 20:43 schrieb Daniel Vetter:
> > On Wed, Dec 20, 2017 at 6:20 PM, Li, Samuel wrote:
> > > Ping... can someone please review this patch?
> > Might be simpler to implement your own dma-buf backend instead of
> > goin
On Thu, Dec 21, 2017 at 12:00:39AM +, Carroll, Lewis wrote:
> The discussion sounds similar as well - related to load_lut() not being
> called.
>
> Perhaps after the drm-next-4.14 merge, whatever call stack used to cause
> load_lut to always get called is now gone. Even if FB_VISUAL_TRUECOLOR
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: e421f7f2b48c47438cd22d673a2c025562d1f728
commit: d4afdbb09e6b347d3ae084331e8b5d70aa168564 [2/8] Merge remote-tracking
branch 'airlied/drm-next' into drm-tip
config: i386-randconfig-i1-201751 (attached as .config)
compiler: gcc-7 (De
Den 11.12.2017 18.56, skrev Noralf Trønnes:
Den 11.12.2017 18.45, skrev Noralf Trønnes:
Den 11.12.2017 15.58, skrev Meghana Madhyastha:
On Mon, Dec 11, 2017 at 03:12:06PM +0100, Noralf Trønnes wrote:
Den 11.12.2017 14.17, skrev Meghana Madhyastha:
On Sat, Dec 09, 2017 at 03:09:28PM +0100,
The power-supply property is used by a vast majority of panels, including
panel-simple. Let's document it as a common property
Reviewed-by: Rob Herring
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++
Documentation/devicetree/bindings
The A83T has an LVDS bus that can be connected to a panel or a bridge. Add
the pinctrl group for it.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch/a
The A83T has two video pipelines in parallel that looks quite similar to
the other SoCs.
The video planes are handled through a controller called the mixer, and the
video signal is then passed to the timing controller (TCON).
And while there is two instances of the mixers and TCONs, they have a
s
The display pipeline on the A83T is mainly composed of the mixers and
TCONs, plus various encoders.
Let's add the first mixer and TCON to the DTSI since the only board I have
can use only the LVDS output on the first TCON. The other parts will be
added eventually.
Reviewed-by: Chen-Yu Tsai
Signe
Some clocks and resets supposed to drive the LVDS logic in the display
engine have been overlooked when the driver was first introduced.
Add those additional resources to the binding, and we'll deal with the ABI
stability in the code.
Reviewed-by: Chen-Yu Tsai
Reviewed-by: Rob Herring
Signed-of
Hi,
Here is an attempt at supporting the LVDS output in our DRM driver. This
has been tested on the A83T (with DE2), but since everything is basically
in the TCON, it should also be usable on the older SoCs with minor
modifications.
This was the occasion to refactor a bunch of things. The most no
A significant number of panels need to power up a regulator in order to
operate properly. Add support for the power-supply property to enable and
disable such a regulator whenever needed.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/panel/panel-lvds.c | 23
It seems like the mixer can only run properly when clocked at 150MHz. In
order to have something more robust than simply a fire-and-forget
assigned-clocks-rate, let's put that in the code.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 10 ++
Add support for the A83T display pipeline.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +
drivers/gpu/drm/sun4i/sun8i_mixer.c | 11 +++
3 files changed, 17 insertions(+)
diff --git a
The TCON supports the LVDS interface to output to a panel or a bridge.
Let's add support for it.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/Makefile | 1 +-
drivers/gpu/drm/sun4i/sun4i_lvds.c | 177 ++-
drivers/gpu/drm/sun4i/sun4i_
The various outputs the TCON can provide have different constraints on the
dotclock divider. Let's make them configurable by the various mode_set
functions.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 +++---
drivers/gpu/drm/sun4i/s
The A711 has 1024x600 LVDS panel, with a PWM-based backlight. Add it to our
DT.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 61 -
1 file changed, 61 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a7
The A83T has the same PWM block than the H3. Add it to our DT.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch/arm/boot/dts/sun8i-a83t.dtsi
Change-Id: I63dce004f8d3c5dc6a7c71070f1fab0707286ea5
Signed-off-by: Lukasz Spintzyk
---
drivers/gpu/drm/drm_atomic.c | 10 ++
drivers/gpu/drm/drm_mode_config.c | 6 ++
drivers/gpu/drm/drm_plane.c | 1 +
include/drm/drm_mode_config.h | 5 +
include/drm/drm_plane.h
This is a draft of damage interface for drm. Alluding to the topic
"RFC: page-flip with damage?" on dri-devel
https://lists.freedesktop.org/archives/dri-devel/2017-September/153235.html
The following patch is a proof of concept, how we can deliver dirty rectangles
to the drm drivers.
Patc
Hi,
On 21/12/17 07:12, Stephen Rothwell wrote:
Hi all,
Commits
bb5cdf8d1c76 ("drm: omapdrm: Remove filename from header and fix copyright
tag")
d66c36a3ee79 ("drm: omapdrm: Simplify platform registration")
are missing a Signed-off-by from their committer.
Sorry about that, I missed t
Make sure that the primary plane will get normalized_zpos=0 if it's zpos is
set to 0, avoiding other planes to be placed in the background.
If user space wants to move the primary plane forward, it can set the zpos
of the plane.
Signed-off-by: Peter Ujfalusi
---
drivers/gpu/drm/drm_blend.c | 6
Hi,
The following two patch will change the omapdrm to use the normalized_zpos when
configuring the zpos/zorder of the planes.
In OMAP it is possible to move planes between crtcs freely and it is possible to
move even the primary plane from one crtc to another, where it should not be
treated as p
To avoid zpos collision, use the normalized_zpos when configuring the
zorder of the plane.
Signed-off-by: Peter Ujfalusi
---
drivers/gpu/drm/omapdrm/omap_drv.c | 26 +-
drivers/gpu/drm/omapdrm/omap_plane.c | 2 +-
2 files changed, 26 insertions(+), 2 deletions(-)
diff
https://bugs.freedesktop.org/show_bug.cgi?id=104289
--- Comment #5 from Vedran Miletić ---
(In reply to Christian König from comment #4)
> You can restrict that to changes to drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c.
>
> The problem is that we use more dw than expected for clearing the page
> tabl
https://bugs.freedesktop.org/show_bug.cgi?id=104319
--- Comment #3 from Daniel Drake ---
Need to do more testing to be sure, but it appears that this is not
reproducible on the development branch
https://cgit.freedesktop.org/~agd5f/linux/log/?h=amd-staging-drm-next
--
You are receiving this mai
https://bugs.freedesktop.org/show_bug.cgi?id=104281
--- Comment #3 from Daniel Drake ---
Need to do more testing to be sure, but it appears that this is not
reproducible on the development branch
https://cgit.freedesktop.org/~agd5f/linux/log/?h=amd-staging-drm-next
--
You are receiving this mai
https://bugs.freedesktop.org/show_bug.cgi?id=104289
--- Comment #6 from Christian König ---
Created attachment 136340
--> https://bugs.freedesktop.org/attachment.cgi?id=136340&action=edit
Possible fix
Complete shot into the dark, but while double checking the code I've found that
at least this
Hey,
Op 19-12-17 om 06:26 schreef Dhinakaran Pandiyan:
> Convert the power_domains->domain_use_count array that tracks per-domain
> use count to atomic_t type. This is needed to be able to read/write the use
> counts outside of the power domain mutex.
>
> Cc: Daniel Vetter
> Cc: Ville Syrjälä
>
On Thu, Dec 21, 2017 at 12:10:08PM +0100, Lukasz Spintzyk wrote:
> Change-Id: I63dce004f8d3c5dc6a7c71070f1fab0707286ea5
> Signed-off-by: Lukasz Spintzyk
> ---
> drivers/gpu/drm/drm_atomic.c | 10 ++
> drivers/gpu/drm/drm_mode_config.c | 6 ++
> drivers/gpu/drm/drm_plane.c
Hi,
On Thu, Dec 21, 2017 at 10:24:11PM +1100, Jonathan Liu wrote:
> There are several issues in sun4i_tmds_determine_rate:
> - doesn't check if the best match was already set before comparing it
> with the enumerated parameters which could result in integer divide
> by zero
> - doesn't conside
On Thu, Dec 21, 2017 at 02:11:00PM +0200, Peter Ujfalusi wrote:
> Make sure that the primary plane will get normalized_zpos=0 if it's zpos is
> set to 0, avoiding other planes to be placed in the background.
Can you describe the actual "bad" configuration?
Without knowing the details this looks l
Hi Dave,
drm-misc-fixes-2017-12-21:
drm-misc-fixes before holidays:
- fixup for the lease fixup (Keith)
- fb leak in the ww mutex fallback code (Maarten)
- sun4i fixes (Maxime, Hans)
I'll be away for two weeks, but I think Sean and Gustavo are somewhat
around-ish. But there's also not really muc
On Thu, Dec 21, 2017 at 11:52:43AM +0100, Noralf Trønnes wrote:
>
> Den 11.12.2017 18.56, skrev Noralf Trønnes:
> >
> > Den 11.12.2017 18.45, skrev Noralf Trønnes:
> > >
> > > Den 11.12.2017 15.58, skrev Meghana Madhyastha:
> > > > On Mon, Dec 11, 2017 at 03:12:06PM +0100, Noralf Trønnes wrote:
On Thu, Dec 21, 2017 at 01:40:28PM +0200, Tomi Valkeinen wrote:
> Hi,
>
> On 21/12/17 07:12, Stephen Rothwell wrote:
> > Hi all,
> >
> > Commits
> >
> >bb5cdf8d1c76 ("drm: omapdrm: Remove filename from header and fix
> > copyright tag")
> >d66c36a3ee79 ("drm: omapdrm: Simplify platform
On Thu, Dec 21, 2017 at 02:46:55PM +0200, Ville Syrjälä wrote:
> On Thu, Dec 21, 2017 at 12:10:08PM +0100, Lukasz Spintzyk wrote:
> > Change-Id: I63dce004f8d3c5dc6a7c71070f1fab0707286ea5
> > Signed-off-by: Lukasz Spintzyk
> > ---
> > drivers/gpu/drm/drm_atomic.c | 10 ++
> > drivers/
On Thu, Dec 21, 2017 at 02:11:01PM +0200, Peter Ujfalusi wrote:
> To avoid zpos collision, use the normalized_zpos when configuring the
> zorder of the plane.
>
> Signed-off-by: Peter Ujfalusi
> ---
> drivers/gpu/drm/omapdrm/omap_drv.c | 26 +-
> drivers/gpu/drm/omapdrm
Den 21.12.2017 14.05, skrev Daniel Vetter:
On Thu, Dec 21, 2017 at 11:52:43AM +0100, Noralf Trønnes wrote:
Den 11.12.2017 18.56, skrev Noralf Trønnes:
Den 11.12.2017 18.45, skrev Noralf Trønnes:
Den 11.12.2017 15.58, skrev Meghana Madhyastha:
On Mon, Dec 11, 2017 at 03:12:06PM +0100, Noralf
On 21/12/17 14:55, Ville Syrjälä wrote:
On Thu, Dec 21, 2017 at 02:11:00PM +0200, Peter Ujfalusi wrote:
Make sure that the primary plane will get normalized_zpos=0 if it's zpos is
set to 0, avoiding other planes to be placed in the background.
Can you describe the actual "bad" configuration?
Hi,
Thanks for the hard work on AMD DC development! Here are some new test
results - hope they are interesting/useful.
CONTEXT
We have been tracking DC for a while as we work with multiple products
where amdgpu previously was not able to support the HDMI audio output.
We are hoping to ship the
https://bugs.freedesktop.org/show_bug.cgi?id=104289
--- Comment #7 from Michel Dänzer ---
(In reply to Vedran Miletić from comment #5)
> I'm sorry, but I will not be able to bisect this. Checkouts of relevant
> commits don't boot and simple reverts do apply cleanly, but don't compile.
FWIW, you
From: Thierry Reding
This implements alpha blending on legacy display controllers (Tegra20,
Tegra30 and Tegra114). While it's theoretically possible to support the
zpos property to enable userspace to specify the Z-order of each plane
individually, this is not currently supported and the same fix
On Thu, Dec 21, 2017 at 2:44 PM, Noralf Trønnes wrote:
>
> Den 21.12.2017 14.05, skrev Daniel Vetter:
>>
>> On Thu, Dec 21, 2017 at 11:52:43AM +0100, Noralf Trønnes wrote:
>>>
>>> Den 11.12.2017 18.56, skrev Noralf Trønnes:
Den 11.12.2017 18.45, skrev Noralf Trønnes:
>
> Den 11.1
On Thu, Dec 21, 2017 at 01:38:31AM +0300, Dmitry Osipenko wrote:
> On 21.12.2017 01:23, Dmitry Osipenko wrote:
> > On 21.12.2017 01:02, Thierry Reding wrote:
> >> On Thu, Dec 21, 2017 at 12:05:40AM +0300, Dmitry Osipenko wrote:
> >>> On 20.12.2017 23:16, Thierry Reding wrote:
> On Wed, Dec 20,
https://bugs.freedesktop.org/show_bug.cgi?id=104289
--- Comment #8 from Christian König ---
I think I've figured out what is going on here. Give me a moment to provide a
new patch.
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On Fri, Dec 01, 2017 at 05:16:58PM +0100, Linus Walleij wrote:
> This adds support for the Ilitek ILI9322 QVGA (320x240)
> TFT panel driver.
>
> This panel driver supports serial or parallel RGB or
> YUV input and also ITU-T BT.656 input streams.
>
> The controller is combined with a physical pan
On Thu, Dec 21, 2017 at 03:44:56PM +0200, Tomi Valkeinen wrote:
> On 21/12/17 14:55, Ville Syrjälä wrote:
> > On Thu, Dec 21, 2017 at 02:11:00PM +0200, Peter Ujfalusi wrote:
> >> Make sure that the primary plane will get normalized_zpos=0 if it's zpos is
> >> set to 0, avoiding other planes to be p
Here's a quick proof of concept implementation of HDR support
for Wayland/Weston/Mesa.
I'm not posting this as patches right now because I'm not sure
that would do much good given how rough this is. But here are
all the repos/branches:
git://github.com/vsyrjala/wayland.git hdr_poc
git://github.com
On 21/12/17 16:20, Ville Syrjälä wrote:
On Thu, Dec 21, 2017 at 03:44:56PM +0200, Tomi Valkeinen wrote:
On 21/12/17 14:55, Ville Syrjälä wrote:
On Thu, Dec 21, 2017 at 02:11:00PM +0200, Peter Ujfalusi wrote:
Make sure that the primary plane will get normalized_zpos=0 if it's zpos is
set to 0,
https://bugs.freedesktop.org/show_bug.cgi?id=104289
Christian König changed:
What|Removed |Added
Attachment #136340|0 |1
is obsolete|
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