On 01/12/17 00:06, Sebastian Reichel wrote:
How about let's call it a "typo fix" then? :)
>>>
>>> Well, it is not really a typo.
>>
>> Well what if the stable people pick it into earlier stable series
>> based on the word fix in the subject? That has happened before.
>>
>> I suggest you updat
DE2 have many CSC units - channel input CSC, channel output CSC and
mixer output CSC and maybe more.
Fortunately, they have all same register layout, only base offsets
differs.
Add support only for channel output CSC for now.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/Makefile
Hi,
On 2017-11-27 22:30 -0500, Nick Bowler wrote:
> A note about the test setup: I had to remove the test equipment so I
> no longer have any information about the video mode from the sink side
> (like in the photos). Thus, with the current setup, I am using the
> presense or absense of audio to
> Am 30.11.2017 um 16:24 schrieb Tony Lindgren :
>
> * H. Nikolaus Schaller [171128 18:35]:
>> Hi,
>>
>>> Am 28.11.2017 um 17:18 schrieb Tony Lindgren :
>>>
>>> * H. Nikolaus Schaller [171128 16:17]:
Hi Tony,
> Am 28.11.2017 um 17:04 schrieb Tony Lindgren :
>
> * H. Ni
Since current DE2 driver doesn't know how to scale yet, add atomic check
function which checks that.
Nice side effect of that function is that populates clipped coordinates
and checks visibility of the plane. That data will be used in the
future.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/dr
Now that some knowledge of DE2 is gained, rename or add some macros to
make code more readable.
Max channel macro is removed, since it is not used and it is not clear
if it has right value. Structures in BSP driver shows possibility of 5
channels maximum although there is no SoC with such configur
Currently only a few RGB formats are supported by the DE2 driver. Add
support for all formats supported by the HW.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_layer.c | 19 -
drivers/gpu/drm/sun4i/sun8i_mixer.c | 134
drivers/gpu/drm/su
Channel size should be set every time plane is changed, not only when
primary plane changes. Current code works only because only one
(primary) plane is supported at the moment.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 14 ++
1 file changed, 6 insertion
There is no point having code which sets interlace mode of mixer in
channel related function. Interlace mode will only change when CRTC
state will change, so let's move it to the block which is executed only
when primary plane state is changed.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/s
Base addresses of channel output CSC (CCSC) depends whether mixer in
question is first or second and if it is second, if supports VEP or not.
This new property will tell which set of base addresses to take.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 1 +
drivers/gpu/
No all SoCs support scaling on all channels. For example, V3s support
scaling only on VI channels. Because of that, add additional
configuration bitmask which tells which channel support scaler.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 1 +
drivers/gpu/drm/sun4i/s
* Tomi Valkeinen [171130 10:56]:
> On 28/11/17 17:48, H. Nikolaus Schaller wrote:
> > Changes V3:
> > * stay compatible with old DTB files which still use "toppoly" (suggested
> > by Tomi Valkeinen)
> > * replaced MODULE_ALIAS entries by MODULE_DEVICE_TABLE (suggested by Andrew
> > F. Davis)
> >
Scaling is currently supported only for RGB framebuffers
Coefficients and algorithm which coefficients to select are taken
from BSP driver.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/Makefile | 3 +-
drivers/gpu/drm/sun4i/sun8i_mixer.h | 4 -
drivers/gpu/drm/sun4i/
Hi
On Friday, December 01, 2017 10:54 AM, Brian Norris wrote:
One more comment:
On Thu, Nov 30, 2017 at 02:14:40PM +0800, Lin Huang wrote:
Support Innolux P097PFG 9.7" 1536x2048 TFT LCD panel,
it refactor Innolux P079ZCA panel driver, let it support
multi panel, and add support P097PFG panel
The kbuild test bot complained about a new coccinelle warning nearby,
which sparked a discussion about the assignment to 'memory' inside of
the conditional expression. See Link below for the original post.
Fix the assignment to silence the coccinelle warning and also make the
code look a little n
* H. Nikolaus Schaller [171128 18:35]:
> Hi,
>
> > Am 28.11.2017 um 17:18 schrieb Tony Lindgren :
> >
> > * H. Nikolaus Schaller [171128 16:17]:
> >> Hi Tony,
> >>
> >>> Am 28.11.2017 um 17:04 schrieb Tony Lindgren :
> >>>
> >>> * H. Nikolaus Schaller [171128 15:52]:
> We can remove the
Support for multiple UI planes can now be easily enabled just by adding
more planes with different index.
For now, add immutable zpos property.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_layer.c | 38 +
1 file changed, 17 insertions(+), 21
Changes V4:
* removed already accepted panel driver patches
* reworded commit subject to clarify
2017-11-28 16:49:00: Changes V3:
* stay compatible with old DTB files which still use "toppoly" (suggested by
Tomi Valkeinen)
* replaced MODULE_ALIAS entries by MODULE_DEVICE_TABLE (suggested by Andre
Format mask is one bit too short. Fix it.
Fixes: 9d75b8c0b999 (drm/sun4i: add support for Allwinner DE2 mixers)
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h
b/driver
Premultiply and color key control registers are already set to zero by
initialization code few lines above. Furthermore, it seems that
colorkeying doesn't really work. It's not used in BSP driver and
experiments with it all failed.
Just remove the code.
Signed-off-by: Jernej Skrabec
---
drivers
We can remove the unnecessary "omapdss," prefix because
the omapdrm driver takes care of it when matching with
the driver table.
Signed-off-by: H. Nikolaus Schaller
---
arch/arm/boot/dts/omap3-pandora-common.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/d
Current DE2 driver is very basic and uses a lot of magic constants since
there is no documentation and knowledge about it was limited at the time.
With studying BSP source code, deeper knowledge was gained which allows
to improve mainline driver considerably.
At the beginning of this series, some
Official vendor string is now "tpo" and not "toppoly".
Requires patch "omapdrm: panel: fix compatible vendor string for td028ttec1"
so that the driver understands both.
Signed-off-by: H. Nikolaus Schaller
---
arch/arm/boot/dts/omap3-gta04.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
This commit adds basic support for VI planes. They are meant for video
overlay and because of that they support YUV formats too. However, using
YUV format is not straightforward, so only RGB formats are supported for
now.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/Makefile |
Now that we have properly clipped coordinates in plane state structure,
use them.
This also fixes bug where source x and y were adjusted for negative
value, but width and height weren't. It wasn't discovered because
primary plane usually doesn't have negative coordinates.
Signed-off-by: Jernej Sk
The code has an ifdef and uses two functions to either init the bare
spinlock or init it and set a lock-class. It is possible to do the same
thing without an ifdef.
With this patch (in debug case) we first use the "default" lock class
which is later overwritten to the supplied one. Without lockdep
Till now, DE2 driver supported only UI planes. Before we add support for
VI planes, lets split out UI layer specific code from common parts. This
commit does the following:
- renames sun8i_layer.c to sun8i_ui_layer.c
- moves UI channel specific code to sun8i_ui_layer.c
- moves common code from sun8
If we want to support multiple planes in the future, code which enables
pipe has to be moved to appropriate place and it must depend on channel
id instead of being hardcoded.
Side effect of that rework is definition of default Z position. For now,
put first channel at the bottom, second above it a
Since arm64 also has __raw I/O accessors, add __aarch64__ in fb.h.
This is a supplement for commmit
981409b25e2a99409b26daa67293ca1cfd5ea0a0
Signed-off-by: Ji Zhang
---
include/linux/fb.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/linux/fb.h b/include/linux/f
Till now, plane selection was hardcoded to first overlay in first UI
channel and layer parameter is unused.
Rename and add parameters to layer functions so they would represent HW
more accurately and start using then.
It turns out that overlays don't fit well in current DRM design, because
they c
Now that we have all required bits, add support for YUV formats.
DRM subsystem doesn't know YUV411 semi-planar format, so leave that out
for now.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 127 ++---
1 file changed, 102 insertions(+),
Color attribute have same format troughout the whole driver.
Rename macro, add comment with simple explanation and remove redundant
definitions.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 8 +---
drivers/gpu/drm/sun4i/sun8i_mixer.h | 4 ++--
2 files changed, 7 i
Support Innolux P097PFG 9.7" 1536x2048 TFT LCD panel,
it refactor Innolux P079ZCA panel driver, let it support
multi panel, and add support P097PFG panel in this driver.
Signed-off-by: Lin Huang
---
Changes in v2:
- change regulator property name to meet the panel datasheet
drivers/gpu/drm/pan
> Am 01.12.2017 um 02:57 schrieb Rob Herring :
>
> On Tue, Nov 28, 2017 at 04:48:54PM +0100, H. Nikolaus Schaller wrote:
>> The vendor name was "toppoly" but other panels and the vendor list
>> have defined it as "tpo". So let's fix it in driver and bindings.
>>
>> We keep the old definition in
On Thu, Nov 30, 2017 at 08:56:43PM +0100, Daniel Vetter wrote:
> Adding dri-devel, I think a pile of those are in drm.
Yeah, quite a lot! This is a good thing; means you didn't invent your
own custom ID allocator.
> On Thu, Nov 30, 2017 at 6:36 PM, Matthew Wilcox wrote:
> > About 40 of the appr
Current code sets alpha mode to global alpha mode and global alpha
value to 0xff which is totaly opaque. That is not needed for two
reasons:
- only one plane is active and thus it can be blended only with
background, which is black,
- it will hinder proper blending when more than one plane is supp
Basic principle of operation when using YUV framebuffer is that chroma
planes have to be upscaled to same size as luma.
Because of that, expand DE2 scaler library to support that.
BSP driver uses another set of FIR filter coefficients for YUV planes.
Signed-off-by: Jernej Skrabec
---
drivers/g
This commit expands translation of DRM YUV format to HW specific
information.
It doesn't do any functional changes.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c| 136 +
drivers/gpu/drm/sun4i/sun8i_mixer.h| 23 +-
drivers/gpu/
Line width is a property of a framebuffer and it belongs to
sun8i_mixer_update_layer_buffer(). This will became even more obvious
when support for multi-plane formats will be added.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 13 ++---
1 file changed, 6 insert
Current RGB formats macros are actually not specific to UI planes.
Rename it to something more universal and introduce shift macro.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 ---
drivers/gpu/drm/sun4i/sun8i_mixer.h | 8 +---
2 files changed, 9 insertions(+
Debug message would print "Enabling" even when disabling plane.
Fix it.
Fixes: 9d75b8c0b999 (drm/sun4i: add support for Allwinner DE2 mixers)
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/
The Innolux P097PFG panel is 9.7" panel with 1536X2048
resolution, it reuse P079ZCA panel driver, so improve
p079ZCA dt-binding to support P097PFG.
Signed-off-by: Lin Huang
---
.../devicetree/bindings/display/panel/innolux,p079zca.txt | 11 +--
1 file changed, 9 insertions(+), 2 dele
BSP driver always sets blend mode for all channels, no matter if they
are really used or not. Do the same here.
The exact meaning of the value is not exactly known, but BSP driver
mentions "SRC OVER" and by digging through code some more info can be
found.
Signed-off-by: Jernej Skrabec
---
driv
Change zpos of VI plane so it is above primary.
Clearly this works only if mixer supports only one VI plane, but it is
good enough for testing and developing.
Proper solution with zpos property should be developed instead.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c
On 01/12/17 03:57, Rob Herring wrote:
>> diff --git a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
>> b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
>> index 0a38a0e8c925..a0dfa14f4fab 100644
>> --- a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
>> +++ b/drivers/g
Am 01.12.2017 um 01:23 schrieb Lyude Paul:
I haven't gone to see where it started, but as of late a good number of
pretty nasty deadlock issues have appeared with the kernel. Easy
reproduction recipe on a laptop with i915/amdgpu prime with lockdep enabled:
DRI_PRIME=1 glxinfo
Acked-by: Christi
Dear Nickey,
Many thanks for your patch.
I am sorry to say that but you can not add my "Acked-by" to this patch
because this code is different from the "original" one from Brian (which
got my "Acked-by").
Sometimes it is not an issue because differences are not important but
in this particula
On Friday 01 December 2017 01:06 PM, Daniel Vetter wrote:
On Fri, Dec 01, 2017 at 12:53:31PM +0530, Ramalingam C wrote:
Sean,
IMHO, it will good if we can have all generic hdcp1.4 authentication flow in
drm helpers and all interested display drivers to use them.
This Design will make the ext
https://bugs.freedesktop.org/show_bug.cgi?id=104001
--- Comment #1 from Michel Dänzer ---
Does "it occurs on latest staging kernel" mean it doesn't happen with an
earlier staging kernel or with another kernel version? If so, can you provide
more details about what kernels it doesn't happen with?
Hi Philippe,
On 2017年12月01日 16:32, Philippe CORNU wrote:
Dear Nickey,
Many thanks for your patch.
I am sorry to say that but you can not add my "Acked-by" to this patch
because this code is different from the "original" one from Brian (which
got my "Acked-by").
I'm sorry I didn't think much
https://bugs.freedesktop.org/show_bug.cgi?id=104001
--- Comment #2 from mikhail.v.gavri...@gmail.com ---
Earlier kernels don't support GPU Vega. So I can't recheck it with earlier
kernel which works fine with IGPU on same machine.
--
You are receiving this mail because:
You are the assignee for
On 01/12/17 11:48, H. Nikolaus Schaller wrote:
> Just a note: there is no toppoly->tpo change for *this* panel and
> Pandora board. Just omapdss removal.
>
> The GTA04 needs a toppoly->tpo change but no omapdss, removal.
>
> So they solve different problems and are independent of each other.
>
Hi Nickey,
On 12/01/2017 10:11 AM, Nickey Yang wrote:
> Hi Philippe,
>
>
> On 2017年12月01日 16:32, Philippe CORNU wrote:
>> Dear Nickey,
>>
>> Many thanks for your patch.
>>
>> I am sorry to say that but you can not add my "Acked-by" to this patch
>> because this code is different from the "origin
Hi Tomi,
> Am 01.12.2017 um 09:13 schrieb Tomi Valkeinen :
>
> On 01/12/17 00:06, Sebastian Reichel wrote:
>
> How about let's call it a "typo fix" then? :)
Well, it is not really a typo.
>>>
>>> Well what if the stable people pick it into earlier stable series
>>> based on the w
When manipulating the kernel command buffer the GPU mutex must be held, as
otherwise different callers might try to replace the same part of the
buffer, wrecking havok in the GPU execution.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_buffer.c | 12
1 file changed,
Use kzalloc so other code doesn't need to worry about uninitialized members.
Drop the non-standard GFP flags, as we really don't want to fail the submit
when under slight memory pressure. Remove one level of indentation by using
an early return if the allocation failed. Also remove the unused drm d
There is no need to store this in the gpu struct. MMU flushes are triggered
correctly in reaction to MMU maps and unmaps, independent of the current ctx
and required pipe switches can be infered from the current and the desired
GPU exec state.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnav
The object fencing has nothing to do with the actual GPU buffer submit,
so move it to the gem submit path to have a cleaner split.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 21 +
drivers/gpu/drm/etnaviv/etnaviv_gpu.c| 7 ---
2
There is no need to synchronize with oustanding retire jobs if the object
has gone idle. Retire jobs only ever change the object state from active to
idle, not the other way around.
The IOVA put race is uncritical, as the GEM_WAIT ioctl itself is holding
a reference to the GEM object, so the retir
Userptr, prime and shmem buffer objects have different lock ordering
requirements. This is mostly due to the fact that we don't allow to mmap
userptr buffers, so we won't ever end up in our fault handler for those,
so some of the code pathes are never called with the mmap_sem held.
To avoid lockde
Now that the userptr BO handling doesn't rely on the userspace restarting
the submit after object population, there is no need to special case the
-EAGAIN return value anymore.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 8
1 file changed, 8 deletions(-
If the FE is restarted before the sync point event is cleared, the GPU
might trigger a completion IRQ for the next sync point before corrupting
the state of the currently running worker.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 16 ++--
1 file changed, 6
Inserting the END command when suspending the GPU is changing the
command buffer state, which requires the GPU to be held.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
b/drivers/g
The submit object lifetime will get extended to the actual GPU
execution. As multiple users will depend on this, add a kref to
properly control destuction of the object.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gem.h| 3 +++
drivers/gpu/drm/etnaviv/etnaviv_gem_subm
This function has only one caller and it isn't expected that there will
be any more in the future. Folding this function into the caller is
helping the readability.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 26 +-
1 file changed, 5 insertions(
This function never fails, as it does nothing more than adding the GEM
object to the global device list. Making this explicit through the void
return type allows to drop some unnecessary error handling.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 16 -
The acquire_ctx is special in that it needs to be released from the same
thread as has been used to initialize it. This collides with the intention to
extend the submit lifetime beyond the gem_submit function with potentially
other threads doing the final cleanup.
Move the ww_acquire_ctx to the fu
All code paths which populate userptr BOs are fine with the get_pages
function taking the mmap_sem lock. This allows to get rid of the pretty
involved architecture with a worker being scheduled if the mmap_sem
needs to be taken, but instead call GUP directly and allow it to take
the lock if necessa
Flush and prefetch are properly handled in the buffer code, data endianess
would need much wider changes than adding something to this single function.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm
The current userptr page population will defer work to a work item if
needed to avoid ever taking the mmap_sem in the direct call path. With
the more fine-grained locking in etnaviv this isn't needed anymore, so
a future commit will simplify this code.
Add a lockdep annotation to validate the assu
Simplifies the cleanup path and moves fence waiting to a central location.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gem.h| 2 +-
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 28 +---
2 files changed, 14 insertions(+), 16 deletions(-)
diff
Less dynamic allocations and slims down the cmdbuf object to only the
required information, as everything else is already available in the
submit object.
This also simplifies buffer and mappings lifetime management, as they
are now exlusively attached to the submit object and not additionally
to t
The GPU exec state may have changed at the time when the perfmon sampling
is done, as it reflects the state of the last submission, not the current
GPU execution state.
So for proper sampling we must use the submit exec_state.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c
While the etnaviv workqueue needs to be ordered, as we rely on work items
being executed in queuing order, this is only true for a single GPU.
Having a shared workqueue for all GPUs in the system limits concurrency
artificially.
Getting each GPU its own ordered workqueue still meets our ordering
e
This is safe to call in all paths, as the BO_PINNED flag tells us if the BO
needs unpinning.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 33 ++--
1 file changed, 12 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etna
We'll need this in some places where only the submit is available. Also
this is a first step at slimming down the cmdbuf object.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_buffer.c | 10 +-
drivers/gpu/drm/etnaviv/etnaviv_cmdbuf.h | 2 --
drivers/gpu/drm/etna
This is the fence passed out on a sucessful GPU submit. Make the name
more clear.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gem.h| 2 +-
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 12 ++--
drivers/gpu/drm/etnaviv/etnaviv_gpu.c| 4 ++--
3 files c
To make them available to the event worker even after the actual
command stream execution has finished.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_cmdbuf.c | 14 +-
drivers/gpu/drm/etnaviv/etnaviv_cmdbuf.h | 5 +---
drivers/gpu/drm/etnaviv/etnaviv_gem.h
Hi all,
this series fixes the job (submit) lifetime issues exposed by the addition
of the performance counter sampling. After this series the submits are
properly reference counted and cleanup is moved to one central location,
which makes reasoning about the GPU submit path much easier. Lifetime o
Now that the PMR lifetime issues are solved we can safely re-enable
performance counter profiling support.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_drv.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
b/driv
As long as there is an active submit, we want the GPU to stay awake. This
is slightly complicated by the fact that we really want to wake the GPU
at the last possible moment to achieve maximum power savings.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gem.h| 1 +
driv
The active count is used to check if the BO is idle, where idle is defined
as not active on the GPU and all VM mappings and reference counts dropped
to the initial state. As the idling of the mappings and references now only
happens in the submit cleanup, the active state handling must be moved to
This adds lockdep asserts to the reservation functions which state in their
documentation that obj->lock must be held. Allows builds with PROVE_LOCKING
enabled to check that the locking requirements are met.
Signed-off-by: Lucas Stach
---
drivers/dma-buf/reservation.c | 8
include/linux
On Fri, 2017-12-01 at 11:35 +0100, Lucas Stach wrote:
> If the FE is restarted before the sync point event is cleared, the GPU
> might trigger a completion IRQ for the next sync point before corrupting
> the state of the currently running worker.
I don't understand this explanation. That sounds li
On Fri, 2017-12-01 at 11:35 +0100, Lucas Stach wrote:
> Userptr, prime and shmem buffer objects have different lock ordering
> requirements. This is mostly due to the fact that we don't allow to mmap
> userptr buffers, so we won't ever end up in our fault handler for those,
> so some of the code pa
On Fri, 2017-12-01 at 11:36 +0100, Lucas Stach wrote:
> This function has only one caller and it isn't expected that there will
> be any more in the future. Folding this function into the caller is
> helping the readability.
>
> Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
regards
Phi
On Fri, 2017-12-01 at 11:36 +0100, Lucas Stach wrote:
> This function never fails, as it does nothing more than adding the GEM
> object to the global device list. Making this explicit through the void
> return type allows to drop some unnecessary error handling.
>
> Signed-off-by: Lucas Stach
Re
sii8620 supports 1MHz clock, it allows faster transmissions and according
to extensive tests allows to mitigate some obscure bugs in I2C client
logic of the chip.
Signed-off-by: Andrzej Hajda
---
arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --
On 30/11/17 14:12, Peter Ujfalusi wrote:
> Hi,
>
> Changes since v2:
> - Rebased on drm-next (v2 was based on drm-next and my
> 'drm/omap: Module parameter for display order configuration' series, thus it
> was not applying cleanly.
> - Added Acked-by from Rob to the dt-binding changes
>
> Ch
On 24/07/17 20:33, Sebastian Reichel wrote:
> This is a workaround for a hardware bug occuring on OMAP3
> with manually updated panels. Details about the HW bug are
> unknown to me, but without this fix the panel refresh does
> not work at all on Nokia N950.
>
> Signed-off-by: Sebastian Reichel
Hi,
On 24/07/17 20:33, Sebastian Reichel wrote:
> From: Tony Lindgren
>
> This adds support for get_timings() and check_timings()
> to get the driver working and properly initializes the
> timing information from DT.
I don't know if it matters much, but the timings added to dts in the
following
On 24/07/17 20:32, Sebastian Reichel wrote:
> Remove driver (un)register API defines. They do not even exist
> anymore.
>
> Signed-off-by: Sebastian Reichel
> ---
> drivers/gpu/drm/omapdrm/dss/omapdss.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/omapdrm/dss/omapd
Hi,
On 13/10/17 17:58, Laurent Pinchart wrote:
> Hello,
>
> This patch series merges the omapdrm and omapdss drivers into a single driver
> called omapdrm. The split in two drivers was historical, in order to support
> the FBDEV, V4L2 and DRM/KMS APIs. Now that the driver supports DRM/KMS only
>
Hi,
On 24/07/17 20:32, Sebastian Reichel wrote:
> Hi,
>
> This adds support for command mode DSI panels to
> omapdrm. I tested the patches on Nokia N950 (omap3)
> and Motorola Droid 4 (omap4). This is basically
> PATCHv3 of my series adding N950 display support,
> but I started from scratch witho
On 11/30/2017 11:02 PM, Nickey Yang wrote:
Hi Archit,
On 2017年10月26日 12:53, Archit Taneja wrote:
On 10/25/2017 09:21 AM, Nickey Yang wrote:
Configure dsi slave channel when driving a panel
which needs 2 DSI links.
Signed-off-by: Nickey Yang
---
.../devicetree/bindings/display/rockchip/d
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
On 29/09/17 14:49, Peter Ujfalusi wrote:
> Hi,
>
> the following series adds basic error handling and reporting for the dmm/tiler
> driver.
>
> With the error handlin
Den 19.11.2017 21.12, skrev David Lechner:
This is a new driver for ILI9225 based display panels.
Thanks, applied to drm-misc.
Noralf.
v2 changes:
* New patch for ilitek vendor prefix.
* Use "ilitek" instead of "generic" in dt-bindings
* New patch to export 2 mipi_dbi_* functions
* Clean up
Sort the dssdev array based on DT aliases.
With this change we can remove the panel ordering from dss/display.c and
have all sorting related to dssdevs in one place.
Signed-off-by: Peter Ujfalusi
---
drivers/gpu/drm/omapdrm/dss/display.c | 2 ++
drivers/gpu/drm/omapdrm/dss/omapdss.h | 1 +
dr
Instead of reaching back to DSS to iterate through the dss_devices every
time, use an internal array where we store the available and usable
dss_devices.
At the same time remove the omapdss_device_is_connected() check from
omap_modeset_init() as it became irrelevant: We are not adding dssdevs
if t
Hi,
Changes since RFC:
- Comments from Laurent have been addressed:
- Get alias ID once and store it for later use in sorting
- Commit message updated for 'drm/omap: Manage the usable omap_dss_device list
within omap_drm_private' patch
- I have kept the first patch to convert to use devm_kzal
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