On Wed, May 3, 2017 at 6:17 PM, Eric Anholt wrote:
> Laurent Pinchart writes:
>
>> Hi Daniel,
>>
>> On Wednesday 03 May 2017 16:28:56 Daniel Vetter wrote:
>>> On Wed, May 03, 2017 at 12:36:06PM +0300, Laurent Pinchart wrote:
>>> > On Wednesday 03 May 2017 11:32:17 Daniel Vetter wrote:
>>> >> On W
On Wed, May 3, 2017 at 9:57 PM, Chris Wilson wrote:
> On Thu, Mar 30, 2017 at 01:16:26PM +0300, Joonas Lahtinen wrote:
>> On ke, 2017-03-29 at 10:10 +0100, Chris Wilson wrote:
>> > Scatter a few cond_resched() in between phases of the drm_mm selftests
>> > to try and prevent us incurring the wrath
On Wed, 2017-05-03 at 18:16 +0200, Lucas Stach wrote:
> The counter load enable bit has no effect when the shadow register
> set is activated. As we always operate the PRG with shadow enabled
> it is safe to remove this.
>
> Signed-off-by: Lucas Stach
> ---
> drivers/gpu/ipu-v3/ipu-prg.c | 2 --
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