On Thu, Mar 09, 2017 at 07:57:18PM +0200, Mikko Perttunen wrote:
> Add support for sync file-based prefences and postfences
> to job submission. Fences are passed to the Host1x implementation.
>
> Signed-off-by: Mikko Perttunen
> ---
> drivers/gpu/drm/tegra/drm.c | 69
>
Current implementation of event handling assumes that vblank interrupt is
always called at the right time. It is not true, it can be delayed due to
various reasons. As a result different races can happen. The patch fixes
the issue by using hardware frame counter present in DECON to serialize
vblank
The structure platform_device is used in drm_pci.h without including
plaform_device.h so the compiler raises a warning:
In file included from drivers/gpu/drm/drm_pci.c:29:0:
./include/drm/drm_pci.h:76:64: warning: ‘struct platform_device’
declared inside parameter list
extern int drm_platform_ini
Each Vivante GPU contains a clock divider which can divide the GPU clock
by 2^n, which can lower the power dissipation from the GPU. It has been
suggested that the GC600 on Dove is responsible for 20-30% of the power
dissipation from the SoC, so lowering the GPU clock rate provides a way
to thrott
kmem_cache_alloc returns NULL on error, not ERR_PTR.
Fixes: f5985bf9cadd4e3ed8d5d9a9cbbb2e39cdb81cd9
Reported-by: Jiri Slaby
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_vq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/virtio/virtgp
On Thu, Mar 02, 2017 at 04:56:49PM +0100, Daniel Vetter wrote:
> Hi Dave,
>
> topic/designware-baytrail-2017-03-02:
> Baytrail PMIC vs. PMU race fixes from Hans de Goede
>
> This time the right version (v4), with the compile fix.
>
> Updated pull request with new tag, same story as before
>
> C
On 03/11/17 19:25, Jyri Sarha wrote:
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> index f80bf93..bd92c89 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> @@ -1,4 +1,4 @@
> -/*
> +*
> * Copyright (
On 11/03/17 19:25, Jyri Sarha wrote:
> Touching HW while clocks are off is a serious error and for instance
> breaks suspend functionality. After this patch tilcdc_crtc_update_fb()
> always updates the primary plane's framebuffer pointer, increases fb's
> reference count and stores vblank event. ti
The AMD Radeon R7 M270 card's OpenGL functionality completely broke down in
Linux kernel v4.10. Before v4.10, the card was incorrectly identified as a
Radeon R7 M265 but worked perfectly (possibly due to the similarities between
the two). It should also be noted that this issue is also present in W
Commit 3a69adfe5617 ("drm/radeon: drop oland quirks") removed
quirks for Oland but also caused a regression where M270 GPUs
would go into a lock-up when OpenGL intensive applications were used.
This reverts the change only for the M270 and fixes the lock-ups.
Signed-off-by: Umang Raghuvanshi
---
4.9-stable review patch. If anyone has any objections, please let me know.
--
From: Chris Wilson
commit 24f76b2c87ed68f79f9f0705b11ccbefaaa0d390 upstream.
We can not allow the worker to run after its fbdev, or even the module,
has been removed.
Fixes: cfe63423d9be ("drm/fb-he
4.9-stable review patch. If anyone has any objections, please let me know.
--
From: Chris Wilson
commit f21b9a92ca7c29382909eaab9facc2cf46f2cc0b upstream.
We can not allow the worker to run after its fbdev, or even the module,
has been removed.
Fixes: eaa434defaca ("drm/fb-he
4.10-stable review patch. If anyone has any objections, please let me know.
--
From: Chris Wilson
commit f21b9a92ca7c29382909eaab9facc2cf46f2cc0b upstream.
We can not allow the worker to run after its fbdev, or even the module,
has been removed.
Fixes: eaa434defaca ("drm/fb-h
4.10-stable review patch. If anyone has any objections, please let me know.
--
From: Chris Wilson
commit 24f76b2c87ed68f79f9f0705b11ccbefaaa0d390 upstream.
We can not allow the worker to run after its fbdev, or even the module,
has been removed.
Fixes: cfe63423d9be ("drm/fb-h
On Sat, Mar 11, 2017 at 5:55 AM, Dan Carpenter wrote:
> Hello Alexandre Courbot,
>
> The patch 5429f82f3415: "drm/nouveau/secboot: add
> gp102/gp104/gp106/gp107 support" from Jan 26, 2017, leads to the
> following static checker warning:
>
> drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10
https://bugs.freedesktop.org/show_bug.cgi?id=94667
--- Comment #20 from Michel Dänzer ---
Is this still happening with current kernel, Mesa and xf86-video-ati releases?
If so, please attach current Xorg log file and dmesg output.
--
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You are the assignee for
On 03/10/2017 10:35 AM, Romain Perier wrote:
> Currently, the audio sampler clock is enabled from dw_hdmi_setup() at
> step E. and is kept enabled for later use. This clock should be enabled
> and disabled along with the actual audio stream and not always on (that
> is bad for PM). Futhermore, this
Touching HW while clocks are off is a serious error and for instance
breaks suspend functionality. After this patch tilcdc_crtc_update_fb()
always updates the primary plane's framebuffer pointer, increases fb's
reference count and stores vblank event. tilcdc_crtc_update_fb() only
writes the fb's DM
Am 06.03.2017 um 13:20 schrieb Andy Shevchenko:
On Mon, Mar 6, 2017 at 1:40 PM, Christian König wrote:
+ for (i = 0; i < nbars; ++i, pos += 8) {
8 is defined somewhere in the spec? (Yes, I understand that is just 64
bits shift)
Yes, it is defined in the spec, see "Figure 7-x1 Resizable
https://bugzilla.kernel.org/show_bug.cgi?id=194867
Bug ID: 194867
Summary: DRM BUG while initializing cape verde (2nd card)
Product: Drivers
Version: 2.5
Kernel Version: 4.11-rc2
Hardware: x86-64
OS: Linux
Tre
On Mon, Mar 13, 2017 at 10:55:01AM +0200, Mikko Perttunen wrote:
>
>
> On 10.03.2017 14:43, Daniel Vetter wrote:
> > On Thu, Mar 09, 2017 at 09:09:52PM +0200, Mikko Perttunen wrote:
> > > On 03/09/2017 08:58 PM, Daniel Vetter wrote:
> > > > On Thu, Mar 9, 2017 at 6:57 PM, Mikko Perttunen
> > >
On Sun, Mar 12, 2017 at 10:34:07PM -0400, Jérémy Lefaure wrote:
> The structure platform_device is used in drm_pci.h without including
> plaform_device.h so the compiler raises a warning:
>
> In file included from drivers/gpu/drm/drm_pci.c:29:0:
> ./include/drm/drm_pci.h:76:64: warning: ‘struct pl
On Mon, Mar 13, 2017 at 09:22:26AM +0100, Gerd Hoffmann wrote:
> kmem_cache_alloc returns NULL on error, not ERR_PTR.
>
> Fixes: f5985bf9cadd4e3ed8d5d9a9cbbb2e39cdb81cd9
> Reported-by: Jiri Slaby
> Signed-off-by: Gerd Hoffmann
I guess we should have smatch integrated into 0day to catch these ..
On Sun, Mar 12, 2017 at 02:34:14PM +0100, Benjamin Gaignard wrote:
2017-03-09 18:38 GMT+01:00 Laura Abbott :
On 03/09/2017 02:00 AM, Benjamin Gaignard wrote:
2017-03-06 17:04 GMT+01:00 Daniel Vetter :
On Mon, Mar 06, 2017 at 11:58:05AM +0100, Mark Brown wrote:
On Mon, Mar 06, 2017 at 11:40:41
Hi Gustavo,
thank you for the review.
On Wed, 2017-03-08 at 11:37 -0300, Gustavo Padovan wrote:
[...]
> > @@ -385,6 +396,25 @@ int etnaviv_ioctl_gem_submit(struct drm_device *dev,
> > void *data,
> > goto err_submit_objects;
> > }
> >
> > + if (args->flags & ETNA_SUBMIT_FENCE
On Wed, 2017-03-08 at 11:48 -0300, Gustavo Padovan wrote:
[...]
> > @@ -437,10 +447,25 @@ int etnaviv_ioctl_gem_submit(struct drm_device *dev,
> > void *data,
> > goto out;
> > }
> >
> > + if (args->flags & ETNA_SUBMIT_FENCE_FD_OUT) {
> > + sync_file = sync_file_creat
On Wed, 2017-03-08 at 11:42 -0300, Gustavo Padovan wrote:
> Hi Philipp,
>
> 2017-03-08 Philipp Zabel :
>
> > The next patch will need the dma_fence to create the sync_file in
> > etnaviv_ioctl_gem_submit, in case an out_fence_fd is requested.
> >
> > Signed-off-by: Philipp Zabel
> > ---
> > dr
Hi Dan,
On Fri, 2017-03-10 at 11:11 +, Dan MacDonald wrote:
> Should your patches work fine under 4.11-rc1 Phillipp or do I need to
> test againt the very latest git? I realise that would be preferred.
The patches from the v4.10-ipu-dp-plane-fix-2 tag should work under
v4.11-rc1, they are app
HDMI 2.0 spec defines a method to reduce the RF footprint while
operating at higher pixel clocks, which is called Scrambling.
Scrambling can be controlled over a new set of I2C registers
which are accessible over existing DDC I2C lines, called SCDC
register set.
This patch series contains 6 patche
From: Thierry Reding
This patch implements a small function that finds if a
given CEA db is hdmi-forum vendor specific data block
or not.
V2: Rebase.
V3: Added R-B from Jose.
V4: Rebase
V5: Rebase
V6: Rebase
V7: Rebase
V8: Rebase
V9: Rebase
V10: Rebase
Signed-off-by: Thierry Reding
Signed-off-
This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
This structure will be used to save and indicate if sink
supports advanced HDMI 2.0 features
- Adds another structure drm_scdc within drm_hdmi_info, to
reflect scdc support and capabilities in connected HDM
From: Thierry Reding
SCDC is a mechanism defined in the HDMI 2.0 specification that allows
the source and sink devices to communicate.
This commit introduces helpers to access the SCDC and provides the
symbolic names for the various registers defined in the specification.
V2: Rebase.
V3: Added
Geminilake platform sports a native HDMI 2.0 controller, and is
capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
mendates scrambling for these higher clocks, for reduced RF footprint.
This patch checks if the monitor supports scrambling, and if required,
enables it during the modeset.
V
This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
This structure will be used to save and indicate if sink
supports advanced HDMI 2.0 features
- Adds another structure drm_scdc within drm_hdmi_info, to
reflect scdc support and capabilities in connected HDM
Geminilake has a native HDMI 2.0 controller, which is capable of
driving clocks upto 594Mhz. This patch updates the max tmds clock
limit for the same.
V2: rebase
V3: rebase
V4: added r-b from Ander
V5: rebase
V6: rebase
V7: rebase
V8: rebase
V9: rebase
V10: rebase
Cc: Ander Conselvan De Oliveira
Den 12.03.2017 19.55, skrev Daniel Vetter:
On Sun, Mar 12, 2017 at 06:50:17PM +0100, Daniel Vetter wrote:
Hi Noralf,
On Sat, Mar 11, 2017 at 10:35:31PM +0100, Noralf Trønnes wrote:
Add support for displays that have a register interface and can be
operated using a simple vtable.
I have looke
Den 12.03.2017 19.00, skrev Daniel Vetter:
On Sat, Mar 11, 2017 at 10:35:32PM +0100, Noralf Trønnes wrote:
Add tinydrm_rgb565_buf_copy() function that copies buffer rectangle to
destination buffer and also handles XRGB and byte swap conversions.
Useful for displays that only support RGB565
Hi Bjorn and others on the lists,
it's over a year that I initially came up with that, but now I
finally have the time to finish it up.
This set of patches allows device drivers to resize and most likely also
relocate the PCI BAR of devices they manage to allow the CPU to access
all of the device
From: Christian König
Just the defines and helper functions to read the possible sizes of a BAR and
update it's size.
See
https://pcisig.com/sites/default/files/specification_documents/ECN_Resizable-BAR_24Apr2008.pdf.
This is useful for hardware with large local storage (mostly GFX) which only
From: Christian König
Try to resize BAR0 to let CPU access all of VRAM.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 29 +
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 8 +---
From: Christian König
This allows device drivers to request resizing their BARs.
The function only tries to reprogram the windows of the bridge directly above
the requesting device and only the BAR of the same type (usually mem, 64bit,
prefetchable). This is done to make sure not to disturb othe
From: Christian König
Most BIOS don't enable this because of compatibility reasons.
Manually enable a 64bit BAR of 64GB size so that we have
enough room for PCI devices.
Signed-off-by: Christian König
---
arch/x86/pci/fixup.c | 53
1 file c
Hi Dave,
Please pull these two omapdrm fixes for v4.11.
Tomi
The following changes since commit 3f81e1340706e9a7f854808e2f580c3106805d0c:
drm: mxsfb: Implement drm_panel handling (2017-03-10 11:11:14 +1000)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel
On Mon, Mar 13, 2017 at 10:54:33AM +, Brian Starkey wrote:
> On Sun, Mar 12, 2017 at 02:34:14PM +0100, Benjamin Gaignard wrote:
> > Another point is how can we put secure rules (like selinux policy) on
> > heaps since all the allocations
> > go to the same device (/dev/ion) ? For example, unti
https://bugs.freedesktop.org/show_bug.cgi?id=99841
--- Comment #12 from p...@cooco.de ---
# bad: [7ce7d89f48834cefece7804d38fc5d85382edf77] Linux 4.10-rc1
# good: [69973b830859bc6529a7a0468ba0d80ee5117826] Linux 4.9
git bisect start 'v4.10-rc1' 'v4.9'
# bad: [72cca7baf4fba777b8ab770b902cf2e0894177
On Sat, Mar 11, 2017 at 11:53:04AM +0100, Daniel Vetter wrote:
> On Fri, Mar 10, 2017 at 01:13:12PM -0500, Sean Paul wrote:
> > On Fri, Mar 10, 2017 at 05:52:34PM +0100, Daniel Vetter wrote:
> > > On Fri, Mar 10, 2017 at 11:01:54AM -0500, Sean Paul wrote:
> > > > On Fri, Mar 10, 2017 at 02:12:14PM
https://bugs.freedesktop.org/show_bug.cgi?id=76490
Alex Deucher changed:
What|Removed |Added
Status|REOPENED|RESOLVED
Resolution|---
On Wed, 2017-03-08 at 12:13 +0100, Lucas Stach wrote:
> The Prefetch Resolve Engine is a prefetch and tile resolve engine
> which prefetches display data from DRAM to an internal SRAM region.
> It has a single clock for configuration register access and the
> functional units. A single shared inter
Den 12.03.2017 21.40, skrev Daniel Vetter:
On Sun, Mar 12, 2017 at 09:17:00PM +0100, Noralf Trønnes wrote:
Den 12.03.2017 20.16, skrev Daniel Vetter:
On Sun, Mar 12, 2017 at 06:50:17PM +0100, Daniel Vetter wrote:
Hi Noralf,
On Sat, Mar 11, 2017 at 10:35:31PM +0100, Noralf Trønnes wrote:
Add
In case of HW-TRIGGER te-gpios interrupt is not necessary. With this
patch we can get rid of 60 interrupt callbacks per second.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/exynos
https://bugs.freedesktop.org/show_bug.cgi?id=100089
--- Comment #3 from LunarG ---
This was observed on AMD R9 Fury and AMD RX480 graphic cards using Mesa 17.0.0
(git-cfdda19).
I do have a trace but it was not captured using this Mesa version and is a bit
old but the problem can be observed usin
On Wed, Mar 08, 2017 at 03:12:35PM +0100, Daniel Vetter wrote:
> Plus a little bit more documentation.
>
> v2: Untangle the missing forward decls to make drm_prime|gem.h
> free-standing.
>
> Signed-off-by: Daniel Vetter
> ---
> Documentation/gpu/drm-mm.rst | 3 ++
> drivers/gpu/drm/drm_prime.
On Mon, Mar 13, 2017 at 2:41 PM, Christian König
wrote:
> From: Christian König
>
> This allows device drivers to request resizing their BARs.
>
> The function only tries to reprogram the windows of the bridge directly above
> the requesting device and only the BAR of the same type (usually mem,
The newly added a5xx support fails to build when debugfs is diabled:
drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:4: error: 'struct msm_gpu_funcs' has
no member named 'show'
drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:11: error: 'a5xx_show' undeclared
here (not in a function); did you mean 'a5xx_irq'
On Mon, Mar 13, 2017 at 2:41 PM, Christian König
wrote:
> Most BIOS don't enable this because of compatibility reasons.
>
> Manually enable a 64bit BAR of 64GB size so that we have
> enough room for PCI devices.
> +static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
> +{
> + const ui
Hi Neil,
On 09-03-2017 14:27, Jose Abreu wrote:
> Hi Neil,
>
>
> On 08-03-2017 12:12, Neil Armstrong wrote:
>> Hi Jose,
>>
>> It seems here that we only have the RGB444<->YUV444 8bit tables, from the
>> Amlogic
>> source I have the following for 10bit, 12bit and 16bit for itu601 :
>>
>> static c
On Fri, Mar 03, 2017 at 04:57:10PM +0100, Peter Senna Tschudin wrote:
> Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
> B850v3 dts file.
>
> Cc: Laurent Pinchart
> Cc: Martyn Welch
> Cc: Martin Donnelly
> Cc: Javier Martinez Canillas
> Cc: Enric Balletbo i Serra
> Cc: Phili
On 13.03.2017 09:15, Thierry Reding wrote:
On Thu, Mar 09, 2017 at 07:57:18PM +0200, Mikko Perttunen wrote:
Add support for sync file-based prefences and postfences
to job submission. Fences are passed to the Host1x implementation.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/dr
Hi,
On 13-03-2017 09:36, Russell King - ARM Linux wrote:
> On Mon, Mar 13, 2017 at 10:27:08AM +0100, Neil Armstrong wrote:
>> On 03/10/2017 10:35 AM, Romain Perier wrote:
>>> Currently, the audio sampler clock is enabled from dw_hdmi_setup() at
>>> step E. and is kept enabled for later use. This
The AMD Radeon R7 M270 card's OpenGL functionality completely broke down in
Linux kernel v4.10. Before v4.10, the card was incorrectly identified as a
Radeon R7 M265 but worked perfectly (possibly due to the similarities between
the two). It should also be noted that this issue is also present in W
On Mon, Mar 13, 2017 at 10:27:08AM +0100, Neil Armstrong wrote:
> On 03/10/2017 10:35 AM, Romain Perier wrote:
> > Currently, the audio sampler clock is enabled from dw_hdmi_setup() at
> > step E. and is kept enabled for later use. This clock should be enabled
> > and disabled along with the actual
Commit 3a69adfe5617 ("drm/radeon: drop oland quirks") removed
quirks for Oland but also caused a regression where M270 GPUs
would go into a lock-up when OpenGL intensive applications were used.
This reverts the change only for the M270 and fixes the lock-ups.
Signed-off-by: Umang Raghuvanshi
---
On 10.03.2017 14:43, Daniel Vetter wrote:
On Thu, Mar 09, 2017 at 09:09:52PM +0200, Mikko Perttunen wrote:
On 03/09/2017 08:58 PM, Daniel Vetter wrote:
On Thu, Mar 9, 2017 at 6:57 PM, Mikko Perttunen wrote:
Hi everyone,
this series adds support for using sync fences as prefences and
postfe
On Mon, Mar 13, 2017 at 12:55:58PM +, Jose Abreu wrote:
> Hi,
>
>
> On 13-03-2017 09:36, Russell King - ARM Linux wrote:
> > On Mon, Mar 13, 2017 at 10:27:08AM +0100, Neil Armstrong wrote:
> >> On 03/10/2017 10:35 AM, Romain Perier wrote:
> >>> Currently, the audio sampler clock is enabled fr
On 12/03/2017 15:17, Rob Herring wrote:
> On Fri, Mar 03, 2017 at 04:21:56PM +0100, Richard Genoud wrote:
>> This adds support for the Winstar Display Co. WF35LTIACD 3.5" QVGA TFT
>> LCD panel, which can be supported by the simple panel driver.
>>
>> Signed-off-by: Richard Genoud
>> ---
>> .../bi
On Mon, Mar 13, 2017 at 2:41 PM, Christian König
wrote:
> From: Christian König
>
> Try to resize BAR0 to let CPU access all of VRAM.
> +void amdgpu_resize_bar0(struct amdgpu_device *adev)
> +{
> + u32 size = max(ilog2(adev->mc.real_vram_size - 1) + 1, 20) - 20;
> + int r;
> +
> +
On Wed, Mar 08, 2017 at 03:12:41PM +0100, Daniel Vetter wrote:
> This was originally added by David Herrmann for range checks, but
> entirely unused. It confused me, so let's remove it.
>
> Cc: David Herrmann
> Signed-off-by: Daniel Vetter
Reviewed-by: Sean Paul
> ---
> include/drm/drmP.h | 1
On Mon, Mar 13, 2017 at 12:43 PM, Arnd Bergmann wrote:
> The newly added a5xx support fails to build when debugfs is diabled:
>
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:4: error: 'struct msm_gpu_funcs'
> has no member named 'show'
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:11: error: 'a5xx_sh
On Wed, Mar 08, 2017 at 03:12:56PM +0100, Daniel Vetter wrote:
> Less code ftw.
>
> This converts all drivers except the tinydrm helper module. That one
> needs more work, since it gets the THIS_MODULE reference from
> tinydrm.ko instead of the actual driver module like it should.
> Probably needs
On Wed, Mar 08, 2017 at 03:12:43PM +0100, Daniel Vetter wrote:
> We might as well dump the drm_file pointer, that's about as useful
> a cookie as the pid. Noticed while typing docs for drm_file and friends.
>
> Since the only consumer of this is the tracepoints I think we can safely
> change this
2017-03-13 Philipp Zabel :
> On Wed, 2017-03-08 at 11:42 -0300, Gustavo Padovan wrote:
> > Hi Philipp,
> >
> > 2017-03-08 Philipp Zabel :
> >
> > > The next patch will need the dma_fence to create the sync_file in
> > > etnaviv_ioctl_gem_submit, in case an out_fence_fd is requested.
> > >
> > >
On Tue, Mar 7, 2017 at 12:02 PM, Jordan Crouse wrote:
> If a OPP table is defined for the GPU device in the device tree use
> that in lieu of the downstream style GPU frequency table. If we do
> use the downstream table convert it to a OPP table so that we can
> take advantage of the OPP lookup fa
Hi Philipp,
2017-03-13 Philipp Zabel :
> Hi Gustavo,
>
> thank you for the review.
>
> On Wed, 2017-03-08 at 11:37 -0300, Gustavo Padovan wrote:
> [...]
> > > @@ -385,6 +396,25 @@ int etnaviv_ioctl_gem_submit(struct drm_device *dev,
> > > void *data,
> > > goto err_submit_objects;
>
On Mon, Mar 13, 2017 at 11:07:28AM +0200, Mikko Perttunen wrote:
>
>
> On 13.03.2017 09:15, Thierry Reding wrote:
> > On Thu, Mar 09, 2017 at 07:57:18PM +0200, Mikko Perttunen wrote:
> > > Add support for sync file-based prefences and postfences
> > > to job submission. Fences are passed to the H
On Wed, Mar 08, 2017 at 03:12:44PM +0100, Daniel Vetter wrote:
> Well, mostly drm_file.h, and clean up all related things:
>
> - I didnt' figure out the difference between preclose and postclose.
> The existing explanation in drm-internals.rst didn't convince me,
> since it's also really outda
https://bugs.freedesktop.org/show_bug.cgi?id=100089
--- Comment #4 from LunarG ---
I'm having trouble adding the trace. I can't trim my current trace to the
allowable upload size (including compressing it). I also can't create a new
trace; apitrace gets an abort signal when trying to run the game
On 13 March 2017 at 17:00, Rob Clark wrote:
> On Mon, Mar 13, 2017 at 12:43 PM, Arnd Bergmann wrote:
>> The newly added a5xx support fails to build when debugfs is diabled:
>>
>> drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:4: error: 'struct msm_gpu_funcs'
>> has no member named 'show'
>> drivers/g
https://bugs.freedesktop.org/show_bug.cgi?id=100089
--- Comment #5 from Samuel Pitoiset ---
You might want to upload the trace with gdrive or dropbox.
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dri-devel mailing list
On Wed, Mar 08, 2017 at 03:12:46PM +0100, Daniel Vetter wrote:
> I didn't spot anything that would require ordering here (well not
> anywhere else either), and I'm trying to unify at least modern drivers
> on one close hook.
>
> Cc: Rob Clark
> Cc: linux-arm-...@vger.kernel.org
> Cc: freedr...@li
On Wed, Mar 08, 2017 at 03:12:47PM +0100, Daniel Vetter wrote:
> Again no apparent explanation for the split except hysterical raisins.
> Merging them also makes it a bit more obviuos what's going on wrt the
> runtime pm refdancing.
Yeah, holding the pm reference from preclose to postclose had me
On Wed, Mar 08, 2017 at 03:12:49PM +0100, Daniel Vetter wrote:
> I didn't spot anything that would require ordering here (well not
> anywhere else either), and I'm trying to unify at least modern drivers
> on one close hook.
>
> Cc: Thierry Reding
> Cc: linux-te...@vger.kernel.org
> Signed-off-by
On Wed, Mar 08, 2017 at 03:12:50PM +0100, Daniel Vetter wrote:
> I didn't spot anything that would require ordering here (well not
> anywhere else either), and I'm trying to unify at least modern drivers
> on one close hook.
>
> Cc: Chris Wilson
> Signed-off-by: Daniel Vetter
Reviewed-by: Sean
On Wed, Mar 08, 2017 at 03:12:53PM +0100, Daniel Vetter wrote:
> Again no apparent explanation for the split except hysterical raisins.
> Merging them also makes it a bit more obviuos what's going on wrt the
> runtime pm refdancing.
Commit message copypasta.
The code is
Reviewed-by: Sean Paul
On Wed, Mar 08, 2017 at 03:12:54PM +0100, Daniel Vetter wrote:
> The core takes care of handling the send_event vs. close() issues, we
> can remove that driver code.
>
> Cc: Rob Clark
> Cc: linux-arm-...@vger.kernel.org
> Cc: freedr...@lists.freedesktop.org
> Signed-off-by: Daniel Vetter
> ---
>
On Wed, Mar 08, 2017 at 03:12:55PM +0100, Daniel Vetter wrote:
> With all drivers converted there's only legacy dri1 drivers using it.
> Not going to touch those, instead just hide it like we've done with
> other dri1 driver hooks like firstopen.
>
> In all this I didn't find any real reason why w
On Sat, Mar 11, 2017 at 11:21 AM, Umang Raghuvanshi wrote:
> Commit 3a69adfe5617 ("drm/radeon: drop oland quirks") removed
> quirks for Oland but also caused a regression where M270 GPUs
> would go into a lock-up when OpenGL intensive applications were used.
> This reverts the change only for the
On Wed, Mar 08, 2017 at 03:12:56PM +0100, Daniel Vetter wrote:
> Less code ftw.
>
> This converts all drivers except the tinydrm helper module. That one
> needs more work, since it gets the THIS_MODULE reference from
> tinydrm.ko instead of the actual driver module like it should.
> Probably needs
On Mon, Mar 13, 2017 at 03:31:40PM -0400, Sean Paul wrote:
> On Wed, Mar 08, 2017 at 03:12:56PM +0100, Daniel Vetter wrote:
> > Less code ftw.
> >
> > This converts all drivers except the tinydrm helper module. That one
> > needs more work, since it gets the THIS_MODULE reference from
> > tinydrm.
On Wed, Mar 08, 2017 at 03:12:57PM +0100, Daniel Vetter wrote:
> Sadly there's only 1 driver which can use it, everyone else is special
> for some reason:
>
> - gma500 has a horrible runtime PM ioctl wrapper that probably doesn't
> really work but meh.
> - i915 needs special compat_ioctl handler
On Mon, Mar 13, 2017 at 06:09:17PM +, Emil Velikov wrote:
> On 13 March 2017 at 17:00, Rob Clark wrote:
> > On Mon, Mar 13, 2017 at 12:43 PM, Arnd Bergmann wrote:
> >> The newly added a5xx support fails to build when debugfs is diabled:
> >>
> >> drivers/gpu/drm/msm/adreno/a5xx_gpu.c:849:4: e
https://bugs.freedesktop.org/show_bug.cgi?id=99950
Vedran Miletić changed:
What|Removed |Added
Blocks||99764
Referenced Bugs:
https://bugs.f
https://bugs.freedesktop.org/show_bug.cgi?id=84663
Marek Olšák changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
On Wed, Mar 08, 2017 at 10:27:54AM +0800, Chris Zhong wrote:
> Hi all
> This series is to correct some mistakes in clk_get_rate and the register
> address. And in order to better develop, adding more prints.
>
>
> Chris Zhong (3):
> drm/rockchip: cdn-dp: return error code when clk_get_rate fail
On Wed, Mar 08, 2017 at 01:58:14PM +0800, Jeffy Chen wrote:
> Currently we are adding all components from the dts, if one of their
> drivers been disabled, we would not be able to bring up others.
>
> Refactor component match logic, follow exynos drm.
>
> Signed-off-by: Jeffy Chen
>
> ---
>
>
On 03/12/2017 12:05 PM, Daniel Vetter wrote:
> On Sun, Mar 12, 2017 at 2:34 PM, Benjamin Gaignard
> wrote:
>> 2017-03-09 18:38 GMT+01:00 Laura Abbott :
>>> On 03/09/2017 02:00 AM, Benjamin Gaignard wrote:
2017-03-06 17:04 GMT+01:00 Daniel Vetter :
> On Mon, Mar 06, 2017 at 11:58:05AM +010
On 03/13/2017 03:54 AM, Brian Starkey wrote:
> On Sun, Mar 12, 2017 at 02:34:14PM +0100, Benjamin Gaignard wrote:
>> 2017-03-09 18:38 GMT+01:00 Laura Abbott :
>>> On 03/09/2017 02:00 AM, Benjamin Gaignard wrote:
2017-03-06 17:04 GMT+01:00 Daniel Vetter :
> On Mon, Mar 06, 2017 at 11:58:05A
On Mon, Mar 13, 2017 at 5:09 PM, Laura Abbott wrote:
>> Hm, we might want to expose all the heaps as individual
>> /dev/ion_$heapname nodes? Should we do this from the start, since
>> we're massively revamping the uapi anyway (imo not needed, current
>> state seems to work too)?
>> -Daniel
>>
>
>
https://bugs.freedesktop.org/show_bug.cgi?id=100189
Bug ID: 100189
Summary: segfault at 234 error 4 in i915_dri.so
Product: Mesa
Version: 17.0
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity:
On 03/13/2017 06:21 AM, Mark Brown wrote:
> On Mon, Mar 13, 2017 at 10:54:33AM +, Brian Starkey wrote:
>> On Sun, Mar 12, 2017 at 02:34:14PM +0100, Benjamin Gaignard wrote:
>
>>> Another point is how can we put secure rules (like selinux policy) on
>>> heaps since all the allocations
>>> go to
On 03/13/2017 02:29 PM, Rob Clark wrote:
> On Mon, Mar 13, 2017 at 5:09 PM, Laura Abbott wrote:
>>> Hm, we might want to expose all the heaps as individual
>>> /dev/ion_$heapname nodes? Should we do this from the start, since
>>> we're massively revamping the uapi anyway (imo not needed, current
>
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